1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/airoha,en7581-eth.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Airoha EN7581 Frame Engine Ethernet controller 8 9maintainers: 10 - Lorenzo Bianconi <lorenzo@kernel.org> 11 12description: 13 The frame engine ethernet controller can be found on Airoha SoCs. 14 These SoCs have multi-GMAC ports. 15 16properties: 17 compatible: 18 enum: 19 - airoha,en7581-eth 20 21 reg: 22 items: 23 - description: Frame engine base address 24 - description: QDMA0 base address 25 - description: QDMA1 base address 26 27 reg-names: 28 items: 29 - const: fe 30 - const: qdma0 31 - const: qdma1 32 33 interrupts: 34 items: 35 - description: QDMA lan irq0 36 - description: QDMA lan irq1 37 - description: QDMA lan irq2 38 - description: QDMA lan irq3 39 - description: QDMA wan irq0 40 - description: QDMA wan irq1 41 - description: QDMA wan irq2 42 - description: QDMA wan irq3 43 - description: FE error irq 44 - description: PDMA irq 45 46 resets: 47 maxItems: 8 48 49 reset-names: 50 items: 51 - const: fe 52 - const: pdma 53 - const: qdma 54 - const: xsi-mac 55 - const: hsi0-mac 56 - const: hsi1-mac 57 - const: hsi-mac 58 - const: xfp-mac 59 60 "#address-cells": 61 const: 1 62 63 "#size-cells": 64 const: 0 65 66 airoha,npu: 67 $ref: /schemas/types.yaml#/definitions/phandle 68 description: 69 Phandle to the node used to configure the NPU module. 70 The Airoha Network Processor Unit (NPU) provides a configuration 71 interface to implement hardware flow offloading programming Packet 72 Processor Engine (PPE) flow table. 73 74patternProperties: 75 "^ethernet@[1-4]$": 76 type: object 77 unevaluatedProperties: false 78 $ref: ethernet-controller.yaml# 79 description: 80 Ethernet GMAC port associated to the MAC controller 81 properties: 82 compatible: 83 const: airoha,eth-mac 84 85 reg: 86 minimum: 1 87 maximum: 4 88 description: GMAC port identifier 89 90 required: 91 - reg 92 - compatible 93 94required: 95 - compatible 96 - reg 97 - interrupts 98 - resets 99 - reset-names 100 101unevaluatedProperties: false 102 103examples: 104 - | 105 #include <dt-bindings/interrupt-controller/arm-gic.h> 106 #include <dt-bindings/interrupt-controller/irq.h> 107 #include <dt-bindings/clock/en7523-clk.h> 108 109 soc { 110 #address-cells = <2>; 111 #size-cells = <2>; 112 113 eth: ethernet@1fb50000 { 114 compatible = "airoha,en7581-eth"; 115 reg = <0 0x1fb50000 0 0x2600>, 116 <0 0x1fb54000 0 0x2000>, 117 <0 0x1fb56000 0 0x2000>; 118 reg-names = "fe", "qdma0", "qdma1"; 119 120 resets = <&scuclk 44>, 121 <&scuclk 30>, 122 <&scuclk 31>, 123 <&scuclk 6>, 124 <&scuclk 15>, 125 <&scuclk 16>, 126 <&scuclk 17>, 127 <&scuclk 26>; 128 reset-names = "fe", "pdma", "qdma", "xsi-mac", 129 "hsi0-mac", "hsi1-mac", "hsi-mac", 130 "xfp-mac"; 131 132 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 133 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 134 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 135 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 136 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 137 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 138 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 139 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 140 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 141 <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 142 143 airoha,npu = <&npu>; 144 145 #address-cells = <1>; 146 #size-cells = <0>; 147 148 mac: ethernet@1 { 149 compatible = "airoha,eth-mac"; 150 reg = <1>; 151 }; 152 }; 153 }; 154