xref: /linux/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml (revision f6e8dc9edf963dbc99085e54f6ced6da9daa6100) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2023 Imagination Technologies Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/gpu/img,powervr-rogue.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Imagination Technologies PowerVR and IMG Rogue GPUs
9
10maintainers:
11  - Frank Binns <frank.binns@imgtec.com>
12
13properties:
14  compatible:
15    oneOf:
16      - items:
17          - enum:
18              - renesas,r8a7796-gpu
19              - renesas,r8a77961-gpu
20          - const: img,img-gx6250
21          - const: img,img-rogue
22      - items:
23          - enum:
24              - ti,am62-gpu
25          - const: img,img-axe-1-16m
26          # This deprecated element must be kept around to allow old kernels to
27          # work with newer dts.
28          - const: img,img-axe
29          - const: img,img-rogue
30      - items:
31          - enum:
32              - thead,th1520-gpu
33          - const: img,img-bxm-4-64
34          - const: img,img-rogue
35      - items:
36          - enum:
37              - ti,j721s2-gpu
38          - const: img,img-bxs-4-64
39          - const: img,img-rogue
40
41      # This legacy combination of compatible strings was introduced early on
42      # before the more specific GPU identifiers were used.
43      - items:
44          - enum:
45              - ti,am62-gpu
46          - const: img,img-axe
47        deprecated: true
48
49  reg:
50    maxItems: 1
51
52  clocks:
53    minItems: 1
54    maxItems: 3
55
56  clock-names:
57    items:
58      - const: core
59      - const: mem
60      - const: sys
61    minItems: 1
62
63  interrupts:
64    maxItems: 1
65
66  power-domains:
67    minItems: 1
68    maxItems: 2
69
70  power-domain-names:
71    items:
72      - const: a
73      - const: b
74    minItems: 1
75
76  dma-coherent: true
77
78  resets:
79    maxItems: 1
80
81required:
82  - compatible
83  - reg
84  - clocks
85  - clock-names
86  - interrupts
87
88additionalProperties: false
89
90allOf:
91  - if:
92      properties:
93        compatible:
94          contains:
95            enum:
96              - ti,am62-gpu
97              - ti,j721s2-gpu
98    then:
99      properties:
100        clocks:
101          maxItems: 1
102
103
104  - if:
105      properties:
106        compatible:
107          contains:
108            enum:
109              - img,img-gx6250
110              - thead,th1520-gpu
111    then:
112      properties:
113        clocks:
114          minItems: 3
115        clock-names:
116          minItems: 3
117
118  - if:
119      properties:
120        compatible:
121          contains:
122            const: img,img-axe-1-16m
123    then:
124      properties:
125        power-domains:
126          maxItems: 1
127        power-domain-names:
128          maxItems: 1
129      required:
130        - power-domains
131        - power-domain-names
132
133  - if:
134      properties:
135        compatible:
136          contains:
137            enum:
138              - img,img-gx6250
139              - img,img-bxs-4-64
140    then:
141      properties:
142        power-domains:
143          minItems: 2
144        power-domain-names:
145          minItems: 2
146      required:
147        - power-domains
148        - power-domain-names
149
150  - if:
151      properties:
152        compatible:
153          contains:
154            const: thead,th1520-gpu
155    then:
156      properties:
157        power-domains:
158          items:
159            - description: The single, unified power domain for the GPU on the
160                TH1520 SoC, integrating all internal IP power domains.
161        power-domain-names: false
162      required:
163        - power-domains
164
165examples:
166  - |
167    #include <dt-bindings/interrupt-controller/irq.h>
168    #include <dt-bindings/interrupt-controller/arm-gic.h>
169    #include <dt-bindings/soc/ti,sci_pm_domain.h>
170
171    gpu@fd00000 {
172        compatible = "ti,am62-gpu", "img,img-axe-1-16m", "img,img-axe",
173                     "img,img-rogue";
174        reg = <0x0fd00000 0x20000>;
175        clocks = <&k3_clks 187 0>;
176        clock-names = "core";
177        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
178        power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
179        power-domain-names = "a";
180    };
181