1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip specific extensions to the Synopsys Designware MIPI DSI 8 9maintainers: 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 13properties: 14 compatible: 15 items: 16 - enum: 17 - rockchip,px30-mipi-dsi 18 - rockchip,rk3128-mipi-dsi 19 - rockchip,rk3288-mipi-dsi 20 - rockchip,rk3399-mipi-dsi 21 - rockchip,rk3568-mipi-dsi 22 - rockchip,rv1126-mipi-dsi 23 - const: snps,dw-mipi-dsi 24 25 interrupts: 26 maxItems: 1 27 28 clocks: 29 minItems: 1 30 maxItems: 4 31 32 clock-names: 33 oneOf: 34 - minItems: 2 35 items: 36 - const: ref 37 - const: pclk 38 - const: phy_cfg 39 - const: grf 40 - const: pclk 41 42 rockchip,grf: 43 $ref: /schemas/types.yaml#/definitions/phandle 44 description: 45 This SoC uses GRF regs to switch between vopl/vopb. 46 47 phys: 48 maxItems: 1 49 50 phy-names: 51 const: dphy 52 53 "#phy-cells": 54 const: 0 55 description: 56 Defined when in use as ISP phy. 57 58 power-domains: 59 maxItems: 1 60 61required: 62 - compatible 63 - clocks 64 - clock-names 65 - rockchip,grf 66 67allOf: 68 - $ref: /schemas/display/bridge/snps,dw-mipi-dsi.yaml# 69 - if: 70 properties: 71 compatible: 72 contains: 73 enum: 74 - rockchip,px30-mipi-dsi 75 - rockchip,rk3128-mipi-dsi 76 - rockchip,rk3568-mipi-dsi 77 - rockchip,rv1126-mipi-dsi 78 79 then: 80 properties: 81 clocks: 82 maxItems: 1 83 84 clock-names: 85 maxItems: 1 86 87 required: 88 - phys 89 - phy-names 90 91 - if: 92 properties: 93 compatible: 94 contains: 95 const: rockchip,rk3288-mipi-dsi 96 97 then: 98 properties: 99 clocks: 100 maxItems: 2 101 102 clock-names: 103 maxItems: 2 104 105 - if: 106 properties: 107 compatible: 108 contains: 109 const: rockchip,rk3399-mipi-dsi 110 111 then: 112 properties: 113 clocks: 114 minItems: 4 115 116 clock-names: 117 minItems: 4 118 119unevaluatedProperties: false 120 121examples: 122 - | 123 #include <dt-bindings/clock/rk3288-cru.h> 124 #include <dt-bindings/interrupt-controller/arm-gic.h> 125 #include <dt-bindings/interrupt-controller/irq.h> 126 127 mipi_dsi: dsi@ff960000 { 128 compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; 129 reg = <0xff960000 0x4000>; 130 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 131 clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; 132 clock-names = "ref", "pclk"; 133 resets = <&cru SRST_MIPIDSI0>; 134 reset-names = "apb"; 135 rockchip,grf = <&grf>; 136 137 ports { 138 #address-cells = <1>; 139 #size-cells = <0>; 140 141 mipi_in: port@0 { 142 reg = <0>; 143 #address-cells = <1>; 144 #size-cells = <0>; 145 146 mipi_in_vopb: endpoint@0 { 147 reg = <0>; 148 remote-endpoint = <&vopb_out_mipi>; 149 }; 150 mipi_in_vopl: endpoint@1 { 151 reg = <1>; 152 remote-endpoint = <&vopl_out_mipi>; 153 }; 154 }; 155 156 mipi_out: port@1 { 157 reg = <1>; 158 159 mipi_out_panel: endpoint { 160 remote-endpoint = <&panel_in_mipi>; 161 }; 162 }; 163 }; 164 }; 165