xref: /linux/Documentation/devicetree/bindings/display/renesas,shmobile-lcdc.yaml (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1*613676ecSGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*613676ecSGeert Uytterhoeven%YAML 1.2
3*613676ecSGeert Uytterhoeven---
4*613676ecSGeert Uytterhoeven$id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
5*613676ecSGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml#
6*613676ecSGeert Uytterhoeven
7*613676ecSGeert Uytterhoeventitle: Renesas SH-Mobile LCD Controller (LCDC)
8*613676ecSGeert Uytterhoeven
9*613676ecSGeert Uytterhoevenmaintainers:
10*613676ecSGeert Uytterhoeven  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11*613676ecSGeert Uytterhoeven  - Geert Uytterhoeven <geert+renesas@glider.be>
12*613676ecSGeert Uytterhoeven
13*613676ecSGeert Uytterhoevenproperties:
14*613676ecSGeert Uytterhoeven  compatible:
15*613676ecSGeert Uytterhoeven    enum:
16*613676ecSGeert Uytterhoeven      - renesas,r8a7740-lcdc # R-Mobile A1
17*613676ecSGeert Uytterhoeven      - renesas,sh73a0-lcdc  # SH-Mobile AG5
18*613676ecSGeert Uytterhoeven
19*613676ecSGeert Uytterhoeven  reg:
20*613676ecSGeert Uytterhoeven    maxItems: 1
21*613676ecSGeert Uytterhoeven
22*613676ecSGeert Uytterhoeven  interrupts:
23*613676ecSGeert Uytterhoeven    maxItems: 1
24*613676ecSGeert Uytterhoeven
25*613676ecSGeert Uytterhoeven  clocks:
26*613676ecSGeert Uytterhoeven    minItems: 1
27*613676ecSGeert Uytterhoeven    maxItems: 5
28*613676ecSGeert Uytterhoeven    description:
29*613676ecSGeert Uytterhoeven      Only the functional clock is mandatory.
30*613676ecSGeert Uytterhoeven      Some of the optional clocks are model-dependent (e.g. "video" (a.k.a.
31*613676ecSGeert Uytterhoeven      "vou" or "dv_clk") is available on R-Mobile A1 only).
32*613676ecSGeert Uytterhoeven
33*613676ecSGeert Uytterhoeven  clock-names:
34*613676ecSGeert Uytterhoeven    minItems: 1
35*613676ecSGeert Uytterhoeven    items:
36*613676ecSGeert Uytterhoeven      - const: fck
37*613676ecSGeert Uytterhoeven      - enum: [ media, lclk, hdmi, video ]
38*613676ecSGeert Uytterhoeven      - enum: [ media, lclk, hdmi, video ]
39*613676ecSGeert Uytterhoeven      - enum: [ media, lclk, hdmi, video ]
40*613676ecSGeert Uytterhoeven      - enum: [ media, lclk, hdmi, video ]
41*613676ecSGeert Uytterhoeven
42*613676ecSGeert Uytterhoeven  power-domains:
43*613676ecSGeert Uytterhoeven    maxItems: 1
44*613676ecSGeert Uytterhoeven
45*613676ecSGeert Uytterhoeven  ports:
46*613676ecSGeert Uytterhoeven    $ref: /schemas/graph.yaml#/properties/ports
47*613676ecSGeert Uytterhoeven
48*613676ecSGeert Uytterhoeven    properties:
49*613676ecSGeert Uytterhoeven      port@0:
50*613676ecSGeert Uytterhoeven        $ref: /schemas/graph.yaml#/properties/port
51*613676ecSGeert Uytterhoeven        description: LCD port (R-Mobile A1 and SH-Mobile AG5)
52*613676ecSGeert Uytterhoeven        unevaluatedProperties: false
53*613676ecSGeert Uytterhoeven
54*613676ecSGeert Uytterhoeven      port@1:
55*613676ecSGeert Uytterhoeven        $ref: /schemas/graph.yaml#/properties/port
56*613676ecSGeert Uytterhoeven        description: HDMI port (R-Mobile A1 LCDC1 and SH-Mobile AG5)
57*613676ecSGeert Uytterhoeven        unevaluatedProperties: false
58*613676ecSGeert Uytterhoeven
59*613676ecSGeert Uytterhoeven      port@2:
60*613676ecSGeert Uytterhoeven        $ref: /schemas/graph.yaml#/properties/port
61*613676ecSGeert Uytterhoeven        description: MIPI-DSI port (SH-Mobile AG5)
62*613676ecSGeert Uytterhoeven        unevaluatedProperties: false
63*613676ecSGeert Uytterhoeven
64*613676ecSGeert Uytterhoeven    required:
65*613676ecSGeert Uytterhoeven      - port@0
66*613676ecSGeert Uytterhoeven
67*613676ecSGeert Uytterhoeven    unevaluatedProperties: false
68*613676ecSGeert Uytterhoeven
69*613676ecSGeert Uytterhoevenrequired:
70*613676ecSGeert Uytterhoeven  - compatible
71*613676ecSGeert Uytterhoeven  - reg
72*613676ecSGeert Uytterhoeven  - interrupts
73*613676ecSGeert Uytterhoeven  - clocks
74*613676ecSGeert Uytterhoeven  - clock-names
75*613676ecSGeert Uytterhoeven  - power-domains
76*613676ecSGeert Uytterhoeven  - ports
77*613676ecSGeert Uytterhoeven
78*613676ecSGeert UytterhoevenadditionalProperties: false
79*613676ecSGeert Uytterhoeven
80*613676ecSGeert UytterhoevenallOf:
81*613676ecSGeert Uytterhoeven  - if:
82*613676ecSGeert Uytterhoeven      properties:
83*613676ecSGeert Uytterhoeven        compatible:
84*613676ecSGeert Uytterhoeven          contains:
85*613676ecSGeert Uytterhoeven            const: renesas,r8a7740-lcdc
86*613676ecSGeert Uytterhoeven    then:
87*613676ecSGeert Uytterhoeven      properties:
88*613676ecSGeert Uytterhoeven        ports:
89*613676ecSGeert Uytterhoeven          properties:
90*613676ecSGeert Uytterhoeven            port@2: false
91*613676ecSGeert Uytterhoeven
92*613676ecSGeert Uytterhoeven  - if:
93*613676ecSGeert Uytterhoeven      properties:
94*613676ecSGeert Uytterhoeven        compatible:
95*613676ecSGeert Uytterhoeven          contains:
96*613676ecSGeert Uytterhoeven            const: renesas,sh73a0-lcdc
97*613676ecSGeert Uytterhoeven    then:
98*613676ecSGeert Uytterhoeven      properties:
99*613676ecSGeert Uytterhoeven        ports:
100*613676ecSGeert Uytterhoeven          required:
101*613676ecSGeert Uytterhoeven            - port@1
102*613676ecSGeert Uytterhoeven            - port@2
103*613676ecSGeert Uytterhoeven
104*613676ecSGeert Uytterhoevenexamples:
105*613676ecSGeert Uytterhoeven  - |
106*613676ecSGeert Uytterhoeven    #include <dt-bindings/clock/r8a7740-clock.h>
107*613676ecSGeert Uytterhoeven    #include <dt-bindings/interrupt-controller/arm-gic.h>
108*613676ecSGeert Uytterhoeven
109*613676ecSGeert Uytterhoeven    lcd-controller@fe940000 {
110*613676ecSGeert Uytterhoeven        compatible = "renesas,r8a7740-lcdc";
111*613676ecSGeert Uytterhoeven        reg = <0xfe940000 0x4000>;
112*613676ecSGeert Uytterhoeven        interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
113*613676ecSGeert Uytterhoeven        clocks = <&mstp1_clks R8A7740_CLK_LCDC0>,
114*613676ecSGeert Uytterhoeven                 <&cpg_clocks R8A7740_CLK_M3>, <&lcdlclk0_clk>,
115*613676ecSGeert Uytterhoeven                 <&vou_clk>;
116*613676ecSGeert Uytterhoeven        clock-names = "fck", "media", "lclk", "video";
117*613676ecSGeert Uytterhoeven        power-domains = <&pd_a4lc>;
118*613676ecSGeert Uytterhoeven
119*613676ecSGeert Uytterhoeven        ports {
120*613676ecSGeert Uytterhoeven            #address-cells = <1>;
121*613676ecSGeert Uytterhoeven            #size-cells = <0>;
122*613676ecSGeert Uytterhoeven
123*613676ecSGeert Uytterhoeven            port@0 {
124*613676ecSGeert Uytterhoeven                reg = <0>;
125*613676ecSGeert Uytterhoeven
126*613676ecSGeert Uytterhoeven                lcdc0_rgb: endpoint {
127*613676ecSGeert Uytterhoeven                };
128*613676ecSGeert Uytterhoeven            };
129*613676ecSGeert Uytterhoeven        };
130*613676ecSGeert Uytterhoeven    };
131