xref: /illumos-gate/usr/src/uts/i86pc/cpu/amd_opteron/ao_main.c (revision e4d060fb4c00d44cd578713eb9a921f594b733b8)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 /*
28  * The CPU module for the AMD Athlon64 and Opteron processors
29  */
30 
31 #include <sys/types.h>
32 #include <sys/cmn_err.h>
33 #include <sys/sunddi.h>
34 #include <sys/cpu_module.h>
35 #include <sys/cpu_module_ms_impl.h>
36 #include <sys/cpuvar.h>
37 #include <sys/x86_archext.h>
38 #include <sys/kmem.h>
39 #include <sys/pghw.h>
40 #include <sys/modctl.h>
41 #include <sys/mc.h>
42 #include <sys/mca_x86.h>
43 
44 #include "ao.h"
45 
46 int ao_ms_support_disable = 0;
47 
48 static struct ao_chipshared *ao_shared[AO_MAX_CHIPS];
49 
50 /*
51  * This cpu module supports AMD family 0xf revisions B/C/D/E/F/G.  If
52  * a family 0xf cpu beyond the rev G model limit is detected then
53  * return ENOTSUP and let the generic x86 CPU module load instead.
54  */
55 uint_t ao_model_limit = 0x6f;
56 
57 int
58 ao_ms_init(cmi_hdl_t hdl, void **datap)
59 {
60 	uint_t chipid = cmi_hdl_chipid(hdl);
61 	struct ao_chipshared *sp, *osp;
62 	ao_ms_data_t *ao;
63 	uint64_t cap;
64 
65 	if (ao_ms_support_disable || cmi_hdl_model(hdl) >= ao_model_limit)
66 		return (ENOTSUP);
67 
68 	if (!(x86_feature & X86_MCA))
69 		return (ENOTSUP);
70 
71 	if (cmi_hdl_rdmsr(hdl, IA32_MSR_MCG_CAP, &cap) != CMI_SUCCESS)
72 		return (ENOTSUP);
73 
74 	if (!(cap & MCG_CAP_CTL_P))
75 		return (ENOTSUP);
76 
77 	if ((cap & MCG_CAP_COUNT_MASK) != AMD_MCA_BANK_COUNT) {
78 		cmn_err(CE_WARN, "Chip %d core %d has %llu MCA banks, "
79 		    "expected %u: disabling AMD-specific MCA support on "
80 		    "this CPU", chipid, cmi_hdl_coreid(hdl),
81 		    (u_longlong_t)cap & MCG_CAP_COUNT_MASK,
82 		    AMD_MCA_BANK_COUNT);
83 		return (ENOTSUP);
84 	}
85 
86 	ao = *datap = kmem_zalloc(sizeof (ao_ms_data_t), KM_SLEEP);
87 	cmi_hdl_hold(hdl);	/* release in fini */
88 	ao->ao_ms_hdl = hdl;
89 
90 	/*
91 	 * Allocate the chipshared structure if it appears not to have been
92 	 * allocated already (by a sibling core).  Install the newly
93 	 * allocated pointer atomically in case a sibling core beats
94 	 * us to it.
95 	 */
96 	if ((sp = ao_shared[chipid]) == NULL) {
97 		sp = kmem_zalloc(sizeof (struct ao_chipshared), KM_SLEEP);
98 		sp->aos_chiprev = cmi_hdl_chiprev(hdl);
99 		membar_producer();
100 
101 		osp = atomic_cas_ptr(&ao_shared[chipid], NULL, sp);
102 		if (osp != NULL) {
103 			kmem_free(sp, sizeof (struct ao_chipshared));
104 			sp = osp;
105 		}
106 	}
107 	ao->ao_ms_shared = sp;
108 
109 	return (0);
110 }
111 
112 /*ARGSUSED*/
113 void
114 ao_ms_post_mpstartup(cmi_hdl_t hdl)
115 {
116 	(void) ddi_install_driver("mc-amd");
117 }
118 
119 cms_api_ver_t _cms_api_version = CMS_API_VERSION_1;
120 
121 const cms_ops_t _cms_ops = {
122 	ao_ms_init,			/* cms_init */
123 	ao_ms_post_startup,		/* cms_post_startup */
124 	ao_ms_post_mpstartup,		/* cms_post_mpstartup */
125 	NULL,				/* cms_logout_size */
126 	ao_ms_mcgctl_val,		/* cms_mcgctl_val */
127 	ao_ms_bankctl_skipinit,		/* cms_bankctl_skipinit */
128 	ao_ms_bankctl_val,		/* cms_bankctl_val */
129 	NULL,				/* cms_bankstatus_skipinit */
130 	NULL,				/* cms_bankstatus_val */
131 	ao_ms_mca_init,			/* cms_mca_init */
132 	ao_ms_poll_ownermask,		/* cms_poll_ownermask */
133 	NULL,				/* cms_bank_logout */
134 	ao_ms_error_action,		/* cms_error_action */
135 	ao_ms_disp_match,		/* cms_disp_match */
136 	ao_ms_ereport_class,		/* cms_ereport_class */
137 	NULL,				/* cms_ereport_detector */
138 	ao_ms_ereport_includestack,	/* cms_ereport_includestack */
139 	ao_ms_ereport_add_logout,	/* cms_ereport_add_logout */
140 	ao_ms_msrinject,		/* cms_msrinject */
141 	NULL,				/* cms_fini */
142 };
143 
144 static struct modlcpu modlcpu = {
145 	&mod_cpuops,
146 	"AMD Athlon64/Opteron Model-Specific Support"
147 };
148 
149 static struct modlinkage modlinkage = {
150 	MODREV_1,
151 	(void *)&modlcpu,
152 	NULL
153 };
154 
155 int
156 _init(void)
157 {
158 	return (mod_install(&modlinkage));
159 }
160 
161 int
162 _info(struct modinfo *modinfop)
163 {
164 	return (mod_info(&modlinkage, modinfop));
165 }
166 
167 int
168 _fini(void)
169 {
170 	return (mod_remove(&modlinkage));
171 }
172