1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 /* 31 * This file and its contents are supplied under the terms of the 32 * Common Development and Distribution License ("CDDL"), version 1.0. 33 * You may only use this file in accordance with the terms of version 34 * 1.0 of the CDDL. 35 * 36 * A full copy of the text of the CDDL should have accompanied this 37 * source. A copy of the CDDL is also available via the Internet at 38 * http://www.illumos.org/license/CDDL. 39 * 40 * Copyright 2015 Pluribus Networks Inc. 41 * Copyright 2019 Joyent, Inc. 42 * Copyright 2023 Oxide Computer Company 43 */ 44 45 #include <sys/cdefs.h> 46 __FBSDID("$FreeBSD$"); 47 48 #include <sys/param.h> 49 #include <sys/types.h> 50 #include <sys/sysctl.h> 51 #include <sys/errno.h> 52 #include <sys/mman.h> 53 #include <sys/cpuset.h> 54 #include <sys/fp.h> 55 56 #include <stdio.h> 57 #include <stdlib.h> 58 #include <stdbool.h> 59 #include <string.h> 60 #include <unistd.h> 61 #include <libgen.h> 62 #include <libutil.h> 63 #include <fcntl.h> 64 #include <getopt.h> 65 #include <time.h> 66 #include <assert.h> 67 #include <libutil.h> 68 69 #include <machine/cpufunc.h> 70 #include <machine/specialreg.h> 71 #include <machine/vmm.h> 72 #include <machine/vmm_dev.h> 73 #include <sys/vmm_data.h> 74 #include <vmmapi.h> 75 76 #include "amd/vmcb.h" 77 #include "intel/vmcs.h" 78 79 #define MB (1UL << 20) 80 #define GB (1UL << 30) 81 82 #define REQ_ARG required_argument 83 #define NO_ARG no_argument 84 #define OPT_ARG optional_argument 85 86 static const char *progname; 87 88 static void 89 usage(bool cpu_intel) 90 { 91 92 (void)fprintf(stderr, 93 "Usage: %s --vm=<vmname>\n" 94 " [--cpu=<vcpu_number>]\n" 95 " [--create]\n" 96 " [--destroy]\n" 97 " [--pmtmr-port=ioport]\n" 98 " [--wrlock-cycle]\n" 99 " [--get-all]\n" 100 " [--get-stats]\n" 101 " [--set-desc-ds]\n" 102 " [--get-desc-ds]\n" 103 " [--set-desc-es]\n" 104 " [--get-desc-es]\n" 105 " [--set-desc-gs]\n" 106 " [--get-desc-gs]\n" 107 " [--set-desc-fs]\n" 108 " [--get-desc-fs]\n" 109 " [--set-desc-cs]\n" 110 " [--get-desc-cs]\n" 111 " [--set-desc-ss]\n" 112 " [--get-desc-ss]\n" 113 " [--set-desc-tr]\n" 114 " [--get-desc-tr]\n" 115 " [--set-desc-ldtr]\n" 116 " [--get-desc-ldtr]\n" 117 " [--set-desc-gdtr]\n" 118 " [--get-desc-gdtr]\n" 119 " [--set-desc-idtr]\n" 120 " [--get-desc-idtr]\n" 121 " [--run]\n" 122 " [--pause]\n" 123 " [--resume]\n" 124 " [--capname=<capname>]\n" 125 " [--getcap]\n" 126 " [--setcap=<0|1>]\n" 127 " [--desc-base=<BASE>]\n" 128 " [--desc-limit=<LIMIT>]\n" 129 " [--desc-access=<ACCESS>]\n" 130 " [--set-cr0=<CR0>]\n" 131 " [--get-cr0]\n" 132 " [--set-cr2=<CR2>]\n" 133 " [--get-cr2]\n" 134 " [--set-cr3=<CR3>]\n" 135 " [--get-cr3]\n" 136 " [--set-cr4=<CR4>]\n" 137 " [--get-cr4]\n" 138 " [--set-dr0=<DR0>]\n" 139 " [--get-dr0]\n" 140 " [--set-dr1=<DR1>]\n" 141 " [--get-dr1]\n" 142 " [--set-dr2=<DR2>]\n" 143 " [--get-dr2]\n" 144 " [--set-dr3=<DR3>]\n" 145 " [--get-dr3]\n" 146 " [--set-dr6=<DR6>]\n" 147 " [--get-dr6]\n" 148 " [--set-dr7=<DR7>]\n" 149 " [--get-dr7]\n" 150 " [--set-rsp=<RSP>]\n" 151 " [--get-rsp]\n" 152 " [--set-rip=<RIP>]\n" 153 " [--get-rip]\n" 154 " [--get-rax]\n" 155 " [--set-rax=<RAX>]\n" 156 " [--get-rbx]\n" 157 " [--get-rcx]\n" 158 " [--get-rdx]\n" 159 " [--get-rsi]\n" 160 " [--get-rdi]\n" 161 " [--get-rbp]\n" 162 " [--get-r8]\n" 163 " [--get-r9]\n" 164 " [--get-r10]\n" 165 " [--get-r11]\n" 166 " [--get-r12]\n" 167 " [--get-r13]\n" 168 " [--get-r14]\n" 169 " [--get-r15]\n" 170 " [--set-rflags=<RFLAGS>]\n" 171 " [--get-rflags]\n" 172 " [--set-cs]\n" 173 " [--get-cs]\n" 174 " [--set-ds]\n" 175 " [--get-ds]\n" 176 " [--set-es]\n" 177 " [--get-es]\n" 178 " [--set-fs]\n" 179 " [--get-fs]\n" 180 " [--set-gs]\n" 181 " [--get-gs]\n" 182 " [--set-ss]\n" 183 " [--get-ss]\n" 184 " [--get-tr]\n" 185 " [--get-ldtr]\n" 186 " [--set-x2apic-state=<state>]\n" 187 " [--get-x2apic-state]\n" 188 " [--set-mem=<memory in units of MB>]\n" 189 " [--get-lowmem]\n" 190 " [--get-highmem]\n" 191 " [--get-gpa-pmap]\n" 192 " [--assert-lapic-lvt=<pin>]\n" 193 " [--inject-nmi]\n" 194 " [--force-reset]\n" 195 " [--force-poweroff]\n" 196 " [--get-rtc-time]\n" 197 " [--set-rtc-time=<secs>]\n" 198 " [--get-rtc-nvram]\n" 199 " [--set-rtc-nvram=<val>]\n" 200 " [--rtc-nvram-offset=<offset>]\n" 201 " [--get-active-cpus]\n" 202 " [--get-intinfo]\n" 203 " [--get-eptp]\n" 204 " [--set-exception-bitmap]\n" 205 " [--get-exception-bitmap]\n" 206 " [--get-tsc-offset]\n" 207 " [--get-guest-pat]\n" 208 " [--get-io-bitmap-address]\n" 209 " [--get-msr-bitmap]\n" 210 " [--get-msr-bitmap-address]\n" 211 " [--get-guest-sysenter]\n" 212 " [--get-exit-reason]\n" 213 " [--get-cpu-topology]\n", 214 progname); 215 216 if (cpu_intel) { 217 (void)fprintf(stderr, 218 " [--get-vmcs-pinbased-ctls]\n" 219 " [--get-vmcs-procbased-ctls]\n" 220 " [--get-vmcs-procbased-ctls2]\n" 221 " [--get-vmcs-entry-interruption-info]\n" 222 " [--set-vmcs-entry-interruption-info=<info>]\n" 223 " [--get-vmcs-guest-physical-address\n" 224 " [--get-vmcs-guest-linear-address\n" 225 " [--get-vmcs-host-pat]\n" 226 " [--get-vmcs-host-cr0]\n" 227 " [--get-vmcs-host-cr3]\n" 228 " [--get-vmcs-host-cr4]\n" 229 " [--get-vmcs-host-rip]\n" 230 " [--get-vmcs-host-rsp]\n" 231 " [--get-vmcs-cr0-mask]\n" 232 " [--get-vmcs-cr0-shadow]\n" 233 " [--get-vmcs-cr4-mask]\n" 234 " [--get-vmcs-cr4-shadow]\n" 235 " [--get-vmcs-cr3-targets]\n" 236 " [--get-vmcs-apic-access-address]\n" 237 " [--get-vmcs-virtual-apic-address]\n" 238 " [--get-vmcs-tpr-threshold]\n" 239 " [--get-vmcs-vpid]\n" 240 " [--get-vmcs-instruction-error]\n" 241 " [--get-vmcs-exit-ctls]\n" 242 " [--get-vmcs-entry-ctls]\n" 243 " [--get-vmcs-link]\n" 244 " [--get-vmcs-exit-qualification]\n" 245 " [--get-vmcs-exit-interruption-info]\n" 246 " [--get-vmcs-exit-interruption-error]\n" 247 " [--get-vmcs-interruptibility]\n" 248 ); 249 } else { 250 (void)fprintf(stderr, 251 " [--get-vmcb-intercepts]\n" 252 " [--get-vmcb-asid]\n" 253 " [--get-vmcb-exit-details]\n" 254 " [--get-vmcb-tlb-ctrl]\n" 255 " [--get-vmcb-virq]\n" 256 " [--get-avic-apic-bar]\n" 257 " [--get-avic-backing-page]\n" 258 " [--get-avic-table]\n" 259 ); 260 } 261 exit(1); 262 } 263 264 static int get_rtc_time, set_rtc_time; 265 static int get_rtc_nvram, set_rtc_nvram; 266 static int rtc_nvram_offset; 267 static uint8_t rtc_nvram_value; 268 static time_t rtc_secs; 269 270 static int get_stats, getcap, setcap, capval, get_gpa_pmap; 271 static int inject_nmi, assert_lapic_lvt; 272 static int force_reset, force_poweroff; 273 static const char *capname; 274 static int create, destroy, get_memmap, get_memseg; 275 static int get_intinfo; 276 static int get_active_cpus; 277 static uint64_t memsize; 278 static int set_cr0, get_cr0, set_cr2, get_cr2, set_cr3, get_cr3; 279 static int set_cr4, get_cr4; 280 static int set_efer, get_efer; 281 static int set_dr0, get_dr0; 282 static int set_dr1, get_dr1; 283 static int set_dr2, get_dr2; 284 static int set_dr3, get_dr3; 285 static int set_dr6, get_dr6; 286 static int set_dr7, get_dr7; 287 static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags; 288 static int set_rax, get_rax; 289 static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp; 290 static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15; 291 static int set_desc_ds, get_desc_ds; 292 static int set_desc_es, get_desc_es; 293 static int set_desc_fs, get_desc_fs; 294 static int set_desc_gs, get_desc_gs; 295 static int set_desc_cs, get_desc_cs; 296 static int set_desc_ss, get_desc_ss; 297 static int set_desc_gdtr, get_desc_gdtr; 298 static int set_desc_idtr, get_desc_idtr; 299 static int set_desc_tr, get_desc_tr; 300 static int set_desc_ldtr, get_desc_ldtr; 301 static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr; 302 static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr; 303 static int set_x2apic_state, get_x2apic_state; 304 enum x2apic_state x2apic_state; 305 static int run; 306 static int do_pause, do_resume; 307 static int get_cpu_topology; 308 static int pmtmr_port; 309 static int wrlock_cycle; 310 static int get_fpu; 311 312 /* 313 * VMCB specific. 314 */ 315 static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl; 316 static int get_vmcb_virq, get_avic_table; 317 318 /* 319 * VMCS-specific fields 320 */ 321 static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2; 322 static int get_eptp, get_io_bitmap, get_tsc_offset; 323 static int get_vmcs_entry_interruption_info, set_vmcs_entry_interruption_info; 324 static int get_vmcs_interruptibility; 325 uint32_t vmcs_entry_interruption_info; 326 static int get_vmcs_gpa, get_vmcs_gla; 327 static int get_exception_bitmap, set_exception_bitmap, exception_bitmap; 328 static int get_cr0_mask, get_cr0_shadow; 329 static int get_cr4_mask, get_cr4_shadow; 330 static int get_cr3_targets; 331 static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold; 332 static int get_msr_bitmap, get_msr_bitmap_address; 333 static int get_guest_msrs; 334 static int get_vpid_asid; 335 static int get_inst_err, get_exit_ctls, get_entry_ctls; 336 static int get_host_cr0, get_host_cr3, get_host_cr4; 337 static int get_host_rip, get_host_rsp; 338 static int get_host_pat; 339 static int get_vmcs_link; 340 static int get_exit_reason, get_vmcs_exit_qualification; 341 static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error; 342 static int get_vmcs_exit_inst_length; 343 344 static uint64_t desc_base; 345 static uint32_t desc_limit, desc_access; 346 347 static int get_all; 348 349 static void 350 dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu) 351 { 352 printf("vm exit[%d]\n", vcpu); 353 printf("\trip\t\t0x%016lx\n", vmexit->rip); 354 printf("\tinst_length\t%d\n", vmexit->inst_length); 355 switch (vmexit->exitcode) { 356 case VM_EXITCODE_INOUT: 357 printf("\treason\t\tINOUT\n"); 358 printf("\tdirection\t%s\n", 359 (vmexit->u.inout.flags & INOUT_IN) ? "IN" : "OUT"); 360 printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes); 361 printf("\tport\t\t0x%04x\n", vmexit->u.inout.port); 362 printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax); 363 break; 364 case VM_EXITCODE_MMIO: 365 printf("\treason\t\tMMIO\n"); 366 printf("\toperation\t%s\n", 367 vmexit->u.mmio.read ? "READ" : "WRITE"); 368 printf("\tbytes\t\t%d\n", vmexit->u.mmio.bytes); 369 printf("\tgpa\t\t0x%08x\n", vmexit->u.mmio.gpa); 370 printf("\tdata\t\t0x%08x\n", vmexit->u.mmio.data); 371 break; 372 case VM_EXITCODE_VMX: 373 printf("\treason\t\tVMX\n"); 374 printf("\tstatus\t\t%d\n", vmexit->u.vmx.status); 375 printf("\texit_reason\t0x%08x (%u)\n", 376 vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason); 377 printf("\tqualification\t0x%016lx\n", 378 vmexit->u.vmx.exit_qualification); 379 printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type); 380 printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error); 381 break; 382 case VM_EXITCODE_SVM: 383 printf("\treason\t\tSVM\n"); 384 printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode); 385 printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1); 386 printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2); 387 break; 388 default: 389 printf("*** unknown vm run exitcode %d\n", vmexit->exitcode); 390 break; 391 } 392 } 393 394 /* AMD 6th generation and Intel compatible MSRs */ 395 #define MSR_AMD6TH_START 0xC0000000 396 #define MSR_AMD6TH_END 0xC0001FFF 397 /* AMD 7th and 8th generation compatible MSRs */ 398 #define MSR_AMD7TH_START 0xC0010000 399 #define MSR_AMD7TH_END 0xC0011FFF 400 401 /* Until a safe method is created, arbitrary VMCS reads/writes are forbidden */ 402 static int 403 vm_get_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t *ret_val) 404 { 405 *ret_val = 0; 406 return (0); 407 } 408 409 static int 410 vm_set_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t val) 411 { 412 return (EINVAL); 413 } 414 415 /* Until a safe method is created, arbitrary VMCB reads/writes are forbidden */ 416 static int 417 vm_get_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 418 uint64_t *ret_val) 419 { 420 *ret_val = 0; 421 return (0); 422 } 423 424 static int 425 vm_set_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 426 uint64_t val) 427 { 428 return (EINVAL); 429 } 430 431 enum { 432 VMNAME = 1000, /* avoid collision with return values from getopt */ 433 VCPU, 434 SET_MEM, 435 SET_EFER, 436 SET_CR0, 437 SET_CR2, 438 SET_CR3, 439 SET_CR4, 440 SET_DR0, 441 SET_DR1, 442 SET_DR2, 443 SET_DR3, 444 SET_DR6, 445 SET_DR7, 446 SET_RSP, 447 SET_RIP, 448 SET_RAX, 449 SET_RFLAGS, 450 DESC_BASE, 451 DESC_LIMIT, 452 DESC_ACCESS, 453 SET_CS, 454 SET_DS, 455 SET_ES, 456 SET_FS, 457 SET_GS, 458 SET_SS, 459 SET_TR, 460 SET_LDTR, 461 SET_X2APIC_STATE, 462 SET_EXCEPTION_BITMAP, 463 SET_VMCS_ENTRY_INTERRUPTION_INFO, 464 SET_CAP, 465 CAPNAME, 466 UNASSIGN_PPTDEV, 467 GET_GPA_PMAP, 468 ASSERT_LAPIC_LVT, 469 SET_RTC_TIME, 470 SET_RTC_NVRAM, 471 RTC_NVRAM_OFFSET, 472 PMTMR_PORT, 473 }; 474 475 static void 476 print_cpus(const char *banner, const cpuset_t *cpus) 477 { 478 int i; 479 int first; 480 481 first = 1; 482 printf("%s:\t", banner); 483 if (!CPU_EMPTY(cpus)) { 484 for (i = 0; i < CPU_SETSIZE; i++) { 485 if (CPU_ISSET(i, cpus)) { 486 printf("%s%d", first ? " " : ", ", i); 487 first = 0; 488 } 489 } 490 } else 491 printf(" (none)"); 492 printf("\n"); 493 } 494 495 static void 496 print_intinfo(const char *banner, uint64_t info) 497 { 498 printf("%s:\t", banner); 499 if (VM_INTINFO_PENDING(info)) { 500 switch (VM_INTINFO_TYPE(info)) { 501 case VM_INTINFO_HWINTR: 502 printf("extint"); 503 break; 504 case VM_INTINFO_NMI: 505 printf("nmi"); 506 break; 507 case VM_INTINFO_SWINTR: 508 printf("swint"); 509 break; 510 default: 511 printf("exception"); 512 break; 513 } 514 printf(" vector %hhd", VM_INTINFO_VECTOR(info)); 515 if (VM_INTINFO_HAS_ERRCODE(info)) { 516 printf(" errcode %#x", VM_INTINFO_ERRCODE(info)); 517 } 518 } else { 519 printf("n/a"); 520 } 521 printf("\n"); 522 } 523 524 static bool 525 cpu_vendor_intel(void) 526 { 527 u_int regs[4]; 528 char cpu_vendor[13]; 529 530 do_cpuid(0, regs); 531 ((u_int *)&cpu_vendor)[0] = regs[1]; 532 ((u_int *)&cpu_vendor)[1] = regs[3]; 533 ((u_int *)&cpu_vendor)[2] = regs[2]; 534 cpu_vendor[12] = '\0'; 535 536 if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { 537 return (false); 538 } else if (strcmp(cpu_vendor, "HygonGenuine") == 0) { 539 return (false); 540 } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) { 541 return (true); 542 } else { 543 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor); 544 exit(1); 545 } 546 } 547 548 static int 549 get_all_registers(struct vmctx *ctx, int vcpu) 550 { 551 uint64_t cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 552 uint64_t rsp, rip, rflags, efer; 553 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp; 554 uint64_t r8, r9, r10, r11, r12, r13, r14, r15; 555 int error = 0; 556 557 if (!error && (get_efer || get_all)) { 558 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_EFER, &efer); 559 if (error == 0) 560 printf("efer[%d]\t\t0x%016lx\n", vcpu, efer); 561 } 562 563 if (!error && (get_cr0 || get_all)) { 564 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR0, &cr0); 565 if (error == 0) 566 printf("cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 567 } 568 569 if (!error && (get_cr2 || get_all)) { 570 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR2, &cr2); 571 if (error == 0) 572 printf("cr2[%d]\t\t0x%016lx\n", vcpu, cr2); 573 } 574 575 if (!error && (get_cr3 || get_all)) { 576 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR3, &cr3); 577 if (error == 0) 578 printf("cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 579 } 580 581 if (!error && (get_cr4 || get_all)) { 582 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR4, &cr4); 583 if (error == 0) 584 printf("cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 585 } 586 587 if (!error && (get_dr0 || get_all)) { 588 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR0, &dr0); 589 if (error == 0) 590 printf("dr0[%d]\t\t0x%016lx\n", vcpu, dr0); 591 } 592 593 if (!error && (get_dr1 || get_all)) { 594 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR1, &dr1); 595 if (error == 0) 596 printf("dr1[%d]\t\t0x%016lx\n", vcpu, dr1); 597 } 598 599 if (!error && (get_dr2 || get_all)) { 600 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR2, &dr2); 601 if (error == 0) 602 printf("dr2[%d]\t\t0x%016lx\n", vcpu, dr2); 603 } 604 605 if (!error && (get_dr3 || get_all)) { 606 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR3, &dr3); 607 if (error == 0) 608 printf("dr3[%d]\t\t0x%016lx\n", vcpu, dr3); 609 } 610 611 if (!error && (get_dr6 || get_all)) { 612 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR6, &dr6); 613 if (error == 0) 614 printf("dr6[%d]\t\t0x%016lx\n", vcpu, dr6); 615 } 616 617 if (!error && (get_dr7 || get_all)) { 618 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR7, &dr7); 619 if (error == 0) 620 printf("dr7[%d]\t\t0x%016lx\n", vcpu, dr7); 621 } 622 623 if (!error && (get_rsp || get_all)) { 624 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSP, &rsp); 625 if (error == 0) 626 printf("rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 627 } 628 629 if (!error && (get_rip || get_all)) { 630 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RIP, &rip); 631 if (error == 0) 632 printf("rip[%d]\t\t0x%016lx\n", vcpu, rip); 633 } 634 635 if (!error && (get_rax || get_all)) { 636 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RAX, &rax); 637 if (error == 0) 638 printf("rax[%d]\t\t0x%016lx\n", vcpu, rax); 639 } 640 641 if (!error && (get_rbx || get_all)) { 642 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBX, &rbx); 643 if (error == 0) 644 printf("rbx[%d]\t\t0x%016lx\n", vcpu, rbx); 645 } 646 647 if (!error && (get_rcx || get_all)) { 648 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RCX, &rcx); 649 if (error == 0) 650 printf("rcx[%d]\t\t0x%016lx\n", vcpu, rcx); 651 } 652 653 if (!error && (get_rdx || get_all)) { 654 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDX, &rdx); 655 if (error == 0) 656 printf("rdx[%d]\t\t0x%016lx\n", vcpu, rdx); 657 } 658 659 if (!error && (get_rsi || get_all)) { 660 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSI, &rsi); 661 if (error == 0) 662 printf("rsi[%d]\t\t0x%016lx\n", vcpu, rsi); 663 } 664 665 if (!error && (get_rdi || get_all)) { 666 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDI, &rdi); 667 if (error == 0) 668 printf("rdi[%d]\t\t0x%016lx\n", vcpu, rdi); 669 } 670 671 if (!error && (get_rbp || get_all)) { 672 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBP, &rbp); 673 if (error == 0) 674 printf("rbp[%d]\t\t0x%016lx\n", vcpu, rbp); 675 } 676 677 if (!error && (get_r8 || get_all)) { 678 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R8, &r8); 679 if (error == 0) 680 printf("r8[%d]\t\t0x%016lx\n", vcpu, r8); 681 } 682 683 if (!error && (get_r9 || get_all)) { 684 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R9, &r9); 685 if (error == 0) 686 printf("r9[%d]\t\t0x%016lx\n", vcpu, r9); 687 } 688 689 if (!error && (get_r10 || get_all)) { 690 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R10, &r10); 691 if (error == 0) 692 printf("r10[%d]\t\t0x%016lx\n", vcpu, r10); 693 } 694 695 if (!error && (get_r11 || get_all)) { 696 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R11, &r11); 697 if (error == 0) 698 printf("r11[%d]\t\t0x%016lx\n", vcpu, r11); 699 } 700 701 if (!error && (get_r12 || get_all)) { 702 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R12, &r12); 703 if (error == 0) 704 printf("r12[%d]\t\t0x%016lx\n", vcpu, r12); 705 } 706 707 if (!error && (get_r13 || get_all)) { 708 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R13, &r13); 709 if (error == 0) 710 printf("r13[%d]\t\t0x%016lx\n", vcpu, r13); 711 } 712 713 if (!error && (get_r14 || get_all)) { 714 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R14, &r14); 715 if (error == 0) 716 printf("r14[%d]\t\t0x%016lx\n", vcpu, r14); 717 } 718 719 if (!error && (get_r15 || get_all)) { 720 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R15, &r15); 721 if (error == 0) 722 printf("r15[%d]\t\t0x%016lx\n", vcpu, r15); 723 } 724 725 if (!error && (get_rflags || get_all)) { 726 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 727 &rflags); 728 if (error == 0) 729 printf("rflags[%d]\t0x%016lx\n", vcpu, rflags); 730 } 731 732 return (error); 733 } 734 735 static int 736 get_all_segments(struct vmctx *ctx, int vcpu) 737 { 738 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 739 int error = 0; 740 741 if (!error && (get_desc_ds || get_all)) { 742 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_DS, 743 &desc_base, &desc_limit, &desc_access); 744 if (error == 0) { 745 printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 746 vcpu, desc_base, desc_limit, desc_access); 747 } 748 } 749 750 if (!error && (get_desc_es || get_all)) { 751 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_ES, 752 &desc_base, &desc_limit, &desc_access); 753 if (error == 0) { 754 printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 755 vcpu, desc_base, desc_limit, desc_access); 756 } 757 } 758 759 if (!error && (get_desc_fs || get_all)) { 760 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_FS, 761 &desc_base, &desc_limit, &desc_access); 762 if (error == 0) { 763 printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 764 vcpu, desc_base, desc_limit, desc_access); 765 } 766 } 767 768 if (!error && (get_desc_gs || get_all)) { 769 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GS, 770 &desc_base, &desc_limit, &desc_access); 771 if (error == 0) { 772 printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 773 vcpu, desc_base, desc_limit, desc_access); 774 } 775 } 776 777 if (!error && (get_desc_ss || get_all)) { 778 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS, 779 &desc_base, &desc_limit, &desc_access); 780 if (error == 0) { 781 printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 782 vcpu, desc_base, desc_limit, desc_access); 783 } 784 } 785 786 if (!error && (get_desc_cs || get_all)) { 787 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_CS, 788 &desc_base, &desc_limit, &desc_access); 789 if (error == 0) { 790 printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 791 vcpu, desc_base, desc_limit, desc_access); 792 } 793 } 794 795 if (!error && (get_desc_tr || get_all)) { 796 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR, 797 &desc_base, &desc_limit, &desc_access); 798 if (error == 0) { 799 printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 800 vcpu, desc_base, desc_limit, desc_access); 801 } 802 } 803 804 if (!error && (get_desc_ldtr || get_all)) { 805 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 806 &desc_base, &desc_limit, &desc_access); 807 if (error == 0) { 808 printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 809 vcpu, desc_base, desc_limit, desc_access); 810 } 811 } 812 813 if (!error && (get_desc_gdtr || get_all)) { 814 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 815 &desc_base, &desc_limit, &desc_access); 816 if (error == 0) { 817 printf("gdtr[%d]\t\t0x%016lx/0x%08x\n", 818 vcpu, desc_base, desc_limit); 819 } 820 } 821 822 if (!error && (get_desc_idtr || get_all)) { 823 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 824 &desc_base, &desc_limit, &desc_access); 825 if (error == 0) { 826 printf("idtr[%d]\t\t0x%016lx/0x%08x\n", 827 vcpu, desc_base, desc_limit); 828 } 829 } 830 831 if (!error && (get_cs || get_all)) { 832 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CS, &cs); 833 if (error == 0) 834 printf("cs[%d]\t\t0x%04lx\n", vcpu, cs); 835 } 836 837 if (!error && (get_ds || get_all)) { 838 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DS, &ds); 839 if (error == 0) 840 printf("ds[%d]\t\t0x%04lx\n", vcpu, ds); 841 } 842 843 if (!error && (get_es || get_all)) { 844 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_ES, &es); 845 if (error == 0) 846 printf("es[%d]\t\t0x%04lx\n", vcpu, es); 847 } 848 849 if (!error && (get_fs || get_all)) { 850 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_FS, &fs); 851 if (error == 0) 852 printf("fs[%d]\t\t0x%04lx\n", vcpu, fs); 853 } 854 855 if (!error && (get_gs || get_all)) { 856 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_GS, &gs); 857 if (error == 0) 858 printf("gs[%d]\t\t0x%04lx\n", vcpu, gs); 859 } 860 861 if (!error && (get_ss || get_all)) { 862 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_SS, &ss); 863 if (error == 0) 864 printf("ss[%d]\t\t0x%04lx\n", vcpu, ss); 865 } 866 867 if (!error && (get_tr || get_all)) { 868 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_TR, &tr); 869 if (error == 0) 870 printf("tr[%d]\t\t0x%04lx\n", vcpu, tr); 871 } 872 873 if (!error && (get_ldtr || get_all)) { 874 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_LDTR, &ldtr); 875 if (error == 0) 876 printf("ldtr[%d]\t\t0x%04lx\n", vcpu, ldtr); 877 } 878 879 return (error); 880 } 881 882 static int 883 get_misc_vmcs(struct vmctx *ctx, int vcpu) 884 { 885 uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64; 886 int error = 0; 887 888 if (!error && (get_cr0_mask || get_all)) { 889 uint64_t cr0mask; 890 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_MASK, &cr0mask); 891 if (error == 0) 892 printf("cr0_mask[%d]\t\t0x%016lx\n", vcpu, cr0mask); 893 } 894 895 if (!error && (get_cr0_shadow || get_all)) { 896 uint64_t cr0shadow; 897 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_SHADOW, 898 &cr0shadow); 899 if (error == 0) 900 printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpu, cr0shadow); 901 } 902 903 if (!error && (get_cr4_mask || get_all)) { 904 uint64_t cr4mask; 905 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_MASK, &cr4mask); 906 if (error == 0) 907 printf("cr4_mask[%d]\t\t0x%016lx\n", vcpu, cr4mask); 908 } 909 910 if (!error && (get_cr4_shadow || get_all)) { 911 uint64_t cr4shadow; 912 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_SHADOW, 913 &cr4shadow); 914 if (error == 0) 915 printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpu, cr4shadow); 916 } 917 918 if (!error && (get_cr3_targets || get_all)) { 919 uint64_t target_count, target_addr; 920 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET_COUNT, 921 &target_count); 922 if (error == 0) { 923 printf("cr3_target_count[%d]\t0x%016lx\n", 924 vcpu, target_count); 925 } 926 927 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET0, 928 &target_addr); 929 if (error == 0) { 930 printf("cr3_target0[%d]\t\t0x%016lx\n", 931 vcpu, target_addr); 932 } 933 934 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET1, 935 &target_addr); 936 if (error == 0) { 937 printf("cr3_target1[%d]\t\t0x%016lx\n", 938 vcpu, target_addr); 939 } 940 941 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET2, 942 &target_addr); 943 if (error == 0) { 944 printf("cr3_target2[%d]\t\t0x%016lx\n", 945 vcpu, target_addr); 946 } 947 948 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET3, 949 &target_addr); 950 if (error == 0) { 951 printf("cr3_target3[%d]\t\t0x%016lx\n", 952 vcpu, target_addr); 953 } 954 } 955 956 if (!error && (get_pinbased_ctls || get_all)) { 957 error = vm_get_vmcs_field(ctx, vcpu, VMCS_PIN_BASED_CTLS, &ctl); 958 if (error == 0) 959 printf("pinbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 960 } 961 962 if (!error && (get_procbased_ctls || get_all)) { 963 error = vm_get_vmcs_field(ctx, vcpu, 964 VMCS_PRI_PROC_BASED_CTLS, &ctl); 965 if (error == 0) 966 printf("procbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 967 } 968 969 if (!error && (get_procbased_ctls2 || get_all)) { 970 error = vm_get_vmcs_field(ctx, vcpu, 971 VMCS_SEC_PROC_BASED_CTLS, &ctl); 972 if (error == 0) 973 printf("procbased_ctls2[%d]\t0x%016lx\n", vcpu, ctl); 974 } 975 976 if (!error && (get_vmcs_gla || get_all)) { 977 error = vm_get_vmcs_field(ctx, vcpu, 978 VMCS_GUEST_LINEAR_ADDRESS, &u64); 979 if (error == 0) 980 printf("gla[%d]\t\t0x%016lx\n", vcpu, u64); 981 } 982 983 if (!error && (get_vmcs_gpa || get_all)) { 984 error = vm_get_vmcs_field(ctx, vcpu, 985 VMCS_GUEST_PHYSICAL_ADDRESS, &u64); 986 if (error == 0) 987 printf("gpa[%d]\t\t0x%016lx\n", vcpu, u64); 988 } 989 990 if (!error && (get_vmcs_entry_interruption_info || 991 get_all)) { 992 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,&u64); 993 if (error == 0) { 994 printf("entry_interruption_info[%d]\t0x%016lx\n", 995 vcpu, u64); 996 } 997 } 998 999 if (!error && (get_tpr_threshold || get_all)) { 1000 uint64_t threshold; 1001 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TPR_THRESHOLD, 1002 &threshold); 1003 if (error == 0) 1004 printf("tpr_threshold[%d]\t0x%016lx\n", vcpu, threshold); 1005 } 1006 1007 if (!error && (get_inst_err || get_all)) { 1008 uint64_t insterr; 1009 error = vm_get_vmcs_field(ctx, vcpu, VMCS_INSTRUCTION_ERROR, 1010 &insterr); 1011 if (error == 0) { 1012 printf("instruction_error[%d]\t0x%016lx\n", 1013 vcpu, insterr); 1014 } 1015 } 1016 1017 if (!error && (get_exit_ctls || get_all)) { 1018 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_CTLS, &ctl); 1019 if (error == 0) 1020 printf("exit_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1021 } 1022 1023 if (!error && (get_entry_ctls || get_all)) { 1024 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_CTLS, &ctl); 1025 if (error == 0) 1026 printf("entry_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1027 } 1028 1029 if (!error && (get_host_pat || get_all)) { 1030 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_IA32_PAT, &pat); 1031 if (error == 0) 1032 printf("host_pat[%d]\t\t0x%016lx\n", vcpu, pat); 1033 } 1034 1035 if (!error && (get_host_cr0 || get_all)) { 1036 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR0, &cr0); 1037 if (error == 0) 1038 printf("host_cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 1039 } 1040 1041 if (!error && (get_host_cr3 || get_all)) { 1042 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR3, &cr3); 1043 if (error == 0) 1044 printf("host_cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 1045 } 1046 1047 if (!error && (get_host_cr4 || get_all)) { 1048 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR4, &cr4); 1049 if (error == 0) 1050 printf("host_cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 1051 } 1052 1053 if (!error && (get_host_rip || get_all)) { 1054 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RIP, &rip); 1055 if (error == 0) 1056 printf("host_rip[%d]\t\t0x%016lx\n", vcpu, rip); 1057 } 1058 1059 if (!error && (get_host_rsp || get_all)) { 1060 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RSP, &rsp); 1061 if (error == 0) 1062 printf("host_rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 1063 } 1064 1065 if (!error && (get_vmcs_link || get_all)) { 1066 error = vm_get_vmcs_field(ctx, vcpu, VMCS_LINK_POINTER, &addr); 1067 if (error == 0) 1068 printf("vmcs_pointer[%d]\t0x%016lx\n", vcpu, addr); 1069 } 1070 1071 if (!error && (get_vmcs_exit_interruption_info || get_all)) { 1072 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_INFO, &u64); 1073 if (error == 0) { 1074 printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n", 1075 vcpu, u64); 1076 } 1077 } 1078 1079 if (!error && (get_vmcs_exit_interruption_error || get_all)) { 1080 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_ERRCODE, 1081 &u64); 1082 if (error == 0) { 1083 printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n", 1084 vcpu, u64); 1085 } 1086 } 1087 1088 if (!error && (get_vmcs_interruptibility || get_all)) { 1089 error = vm_get_vmcs_field(ctx, vcpu, 1090 VMCS_GUEST_INTERRUPTIBILITY, &u64); 1091 if (error == 0) { 1092 printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n", 1093 vcpu, u64); 1094 } 1095 } 1096 1097 if (!error && (get_vmcs_exit_inst_length || get_all)) { 1098 error = vm_get_vmcs_field(ctx, vcpu, 1099 VMCS_EXIT_INSTRUCTION_LENGTH, &u64); 1100 if (error == 0) 1101 printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu, 1102 (uint32_t)u64); 1103 } 1104 1105 if (!error && (get_vmcs_exit_qualification || get_all)) { 1106 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION, 1107 &u64); 1108 if (error == 0) 1109 printf("vmcs_exit_qualification[%d]\t0x%016lx\n", 1110 vcpu, u64); 1111 } 1112 1113 return (error); 1114 } 1115 1116 static int 1117 get_misc_vmcb(struct vmctx *ctx, int vcpu) 1118 { 1119 uint64_t ctl, addr; 1120 int error = 0; 1121 1122 if (!error && (get_vmcb_intercept || get_all)) { 1123 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_CR_INTERCEPT, 4, 1124 &ctl); 1125 if (error == 0) 1126 printf("cr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1127 1128 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_DR_INTERCEPT, 4, 1129 &ctl); 1130 if (error == 0) 1131 printf("dr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1132 1133 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXC_INTERCEPT, 4, 1134 &ctl); 1135 if (error == 0) 1136 printf("exc_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1137 1138 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST1_INTERCEPT, 1139 4, &ctl); 1140 if (error == 0) 1141 printf("inst1_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1142 1143 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST2_INTERCEPT, 1144 4, &ctl); 1145 if (error == 0) 1146 printf("inst2_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1147 } 1148 1149 if (!error && (get_vmcb_tlb_ctrl || get_all)) { 1150 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_TLB_CTRL, 1151 4, &ctl); 1152 if (error == 0) 1153 printf("TLB ctrl[%d]\t0x%016lx\n", vcpu, ctl); 1154 } 1155 1156 if (!error && (get_vmcb_exit_details || get_all)) { 1157 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO1, 1158 8, &ctl); 1159 if (error == 0) 1160 printf("exitinfo1[%d]\t0x%016lx\n", vcpu, ctl); 1161 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO2, 1162 8, &ctl); 1163 if (error == 0) 1164 printf("exitinfo2[%d]\t0x%016lx\n", vcpu, ctl); 1165 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINTINFO, 1166 8, &ctl); 1167 if (error == 0) 1168 printf("exitintinfo[%d]\t0x%016lx\n", vcpu, ctl); 1169 } 1170 1171 if (!error && (get_vmcb_virq || get_all)) { 1172 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_VIRQ, 1173 8, &ctl); 1174 if (error == 0) 1175 printf("v_irq/tpr[%d]\t0x%016lx\n", vcpu, ctl); 1176 } 1177 1178 if (!error && (get_apic_access_addr || get_all)) { 1179 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_BAR, 8, 1180 &addr); 1181 if (error == 0) 1182 printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpu, addr); 1183 } 1184 1185 if (!error && (get_virtual_apic_addr || get_all)) { 1186 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PAGE, 8, 1187 &addr); 1188 if (error == 0) 1189 printf("AVIC backing page[%d]\t0x%016lx\n", vcpu, addr); 1190 } 1191 1192 if (!error && (get_avic_table || get_all)) { 1193 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_LT, 8, 1194 &addr); 1195 if (error == 0) 1196 printf("AVIC logical table[%d]\t0x%016lx\n", 1197 vcpu, addr); 1198 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PT, 8, 1199 &addr); 1200 if (error == 0) 1201 printf("AVIC physical table[%d]\t0x%016lx\n", 1202 vcpu, addr); 1203 } 1204 1205 return (error); 1206 } 1207 1208 static struct option * 1209 setup_options(bool cpu_intel) 1210 { 1211 const struct option common_opts[] = { 1212 { "vm", REQ_ARG, 0, VMNAME }, 1213 { "cpu", REQ_ARG, 0, VCPU }, 1214 { "set-mem", REQ_ARG, 0, SET_MEM }, 1215 { "set-efer", REQ_ARG, 0, SET_EFER }, 1216 { "set-cr0", REQ_ARG, 0, SET_CR0 }, 1217 { "set-cr2", REQ_ARG, 0, SET_CR2 }, 1218 { "set-cr3", REQ_ARG, 0, SET_CR3 }, 1219 { "set-cr4", REQ_ARG, 0, SET_CR4 }, 1220 { "set-dr0", REQ_ARG, 0, SET_DR0 }, 1221 { "set-dr1", REQ_ARG, 0, SET_DR1 }, 1222 { "set-dr2", REQ_ARG, 0, SET_DR2 }, 1223 { "set-dr3", REQ_ARG, 0, SET_DR3 }, 1224 { "set-dr6", REQ_ARG, 0, SET_DR6 }, 1225 { "set-dr7", REQ_ARG, 0, SET_DR7 }, 1226 { "set-rsp", REQ_ARG, 0, SET_RSP }, 1227 { "set-rip", REQ_ARG, 0, SET_RIP }, 1228 { "set-rax", REQ_ARG, 0, SET_RAX }, 1229 { "set-rflags", REQ_ARG, 0, SET_RFLAGS }, 1230 { "desc-base", REQ_ARG, 0, DESC_BASE }, 1231 { "desc-limit", REQ_ARG, 0, DESC_LIMIT }, 1232 { "desc-access",REQ_ARG, 0, DESC_ACCESS }, 1233 { "set-cs", REQ_ARG, 0, SET_CS }, 1234 { "set-ds", REQ_ARG, 0, SET_DS }, 1235 { "set-es", REQ_ARG, 0, SET_ES }, 1236 { "set-fs", REQ_ARG, 0, SET_FS }, 1237 { "set-gs", REQ_ARG, 0, SET_GS }, 1238 { "set-ss", REQ_ARG, 0, SET_SS }, 1239 { "set-tr", REQ_ARG, 0, SET_TR }, 1240 { "set-ldtr", REQ_ARG, 0, SET_LDTR }, 1241 { "set-x2apic-state",REQ_ARG, 0, SET_X2APIC_STATE }, 1242 { "set-exception-bitmap", 1243 REQ_ARG, 0, SET_EXCEPTION_BITMAP }, 1244 { "capname", REQ_ARG, 0, CAPNAME }, 1245 { "unassign-pptdev", REQ_ARG, 0, UNASSIGN_PPTDEV }, 1246 { "setcap", REQ_ARG, 0, SET_CAP }, 1247 { "get-gpa-pmap", REQ_ARG, 0, GET_GPA_PMAP }, 1248 { "assert-lapic-lvt", REQ_ARG, 0, ASSERT_LAPIC_LVT }, 1249 { "get-rtc-time", NO_ARG, &get_rtc_time, 1 }, 1250 { "set-rtc-time", REQ_ARG, 0, SET_RTC_TIME }, 1251 { "rtc-nvram-offset", REQ_ARG, 0, RTC_NVRAM_OFFSET }, 1252 { "get-rtc-nvram", NO_ARG, &get_rtc_nvram, 1 }, 1253 { "set-rtc-nvram", REQ_ARG, 0, SET_RTC_NVRAM }, 1254 { "getcap", NO_ARG, &getcap, 1 }, 1255 { "get-stats", NO_ARG, &get_stats, 1 }, 1256 { "get-desc-ds",NO_ARG, &get_desc_ds, 1 }, 1257 { "set-desc-ds",NO_ARG, &set_desc_ds, 1 }, 1258 { "get-desc-es",NO_ARG, &get_desc_es, 1 }, 1259 { "set-desc-es",NO_ARG, &set_desc_es, 1 }, 1260 { "get-desc-ss",NO_ARG, &get_desc_ss, 1 }, 1261 { "set-desc-ss",NO_ARG, &set_desc_ss, 1 }, 1262 { "get-desc-cs",NO_ARG, &get_desc_cs, 1 }, 1263 { "set-desc-cs",NO_ARG, &set_desc_cs, 1 }, 1264 { "get-desc-fs",NO_ARG, &get_desc_fs, 1 }, 1265 { "set-desc-fs",NO_ARG, &set_desc_fs, 1 }, 1266 { "get-desc-gs",NO_ARG, &get_desc_gs, 1 }, 1267 { "set-desc-gs",NO_ARG, &set_desc_gs, 1 }, 1268 { "get-desc-tr",NO_ARG, &get_desc_tr, 1 }, 1269 { "set-desc-tr",NO_ARG, &set_desc_tr, 1 }, 1270 { "set-desc-ldtr", NO_ARG, &set_desc_ldtr, 1 }, 1271 { "get-desc-ldtr", NO_ARG, &get_desc_ldtr, 1 }, 1272 { "set-desc-gdtr", NO_ARG, &set_desc_gdtr, 1 }, 1273 { "get-desc-gdtr", NO_ARG, &get_desc_gdtr, 1 }, 1274 { "set-desc-idtr", NO_ARG, &set_desc_idtr, 1 }, 1275 { "get-desc-idtr", NO_ARG, &get_desc_idtr, 1 }, 1276 { "get-memmap", NO_ARG, &get_memmap, 1 }, 1277 { "get-memseg", NO_ARG, &get_memseg, 1 }, 1278 { "get-efer", NO_ARG, &get_efer, 1 }, 1279 { "get-cr0", NO_ARG, &get_cr0, 1 }, 1280 { "get-cr2", NO_ARG, &get_cr2, 1 }, 1281 { "get-cr3", NO_ARG, &get_cr3, 1 }, 1282 { "get-cr4", NO_ARG, &get_cr4, 1 }, 1283 { "get-dr0", NO_ARG, &get_dr0, 1 }, 1284 { "get-dr1", NO_ARG, &get_dr1, 1 }, 1285 { "get-dr2", NO_ARG, &get_dr2, 1 }, 1286 { "get-dr3", NO_ARG, &get_dr3, 1 }, 1287 { "get-dr6", NO_ARG, &get_dr6, 1 }, 1288 { "get-dr7", NO_ARG, &get_dr7, 1 }, 1289 { "get-rsp", NO_ARG, &get_rsp, 1 }, 1290 { "get-rip", NO_ARG, &get_rip, 1 }, 1291 { "get-rax", NO_ARG, &get_rax, 1 }, 1292 { "get-rbx", NO_ARG, &get_rbx, 1 }, 1293 { "get-rcx", NO_ARG, &get_rcx, 1 }, 1294 { "get-rdx", NO_ARG, &get_rdx, 1 }, 1295 { "get-rsi", NO_ARG, &get_rsi, 1 }, 1296 { "get-rdi", NO_ARG, &get_rdi, 1 }, 1297 { "get-rbp", NO_ARG, &get_rbp, 1 }, 1298 { "get-r8", NO_ARG, &get_r8, 1 }, 1299 { "get-r9", NO_ARG, &get_r9, 1 }, 1300 { "get-r10", NO_ARG, &get_r10, 1 }, 1301 { "get-r11", NO_ARG, &get_r11, 1 }, 1302 { "get-r12", NO_ARG, &get_r12, 1 }, 1303 { "get-r13", NO_ARG, &get_r13, 1 }, 1304 { "get-r14", NO_ARG, &get_r14, 1 }, 1305 { "get-r15", NO_ARG, &get_r15, 1 }, 1306 { "get-rflags", NO_ARG, &get_rflags, 1 }, 1307 { "get-cs", NO_ARG, &get_cs, 1 }, 1308 { "get-ds", NO_ARG, &get_ds, 1 }, 1309 { "get-es", NO_ARG, &get_es, 1 }, 1310 { "get-fs", NO_ARG, &get_fs, 1 }, 1311 { "get-gs", NO_ARG, &get_gs, 1 }, 1312 { "get-ss", NO_ARG, &get_ss, 1 }, 1313 { "get-tr", NO_ARG, &get_tr, 1 }, 1314 { "get-ldtr", NO_ARG, &get_ldtr, 1 }, 1315 { "get-eptp", NO_ARG, &get_eptp, 1 }, 1316 { "get-exception-bitmap", 1317 NO_ARG, &get_exception_bitmap, 1 }, 1318 { "get-io-bitmap-address", 1319 NO_ARG, &get_io_bitmap, 1 }, 1320 { "get-tsc-offset", NO_ARG, &get_tsc_offset, 1 }, 1321 { "get-msr-bitmap", 1322 NO_ARG, &get_msr_bitmap, 1 }, 1323 { "get-msr-bitmap-address", 1324 NO_ARG, &get_msr_bitmap_address, 1 }, 1325 { "get-guest-msrs", NO_ARG, &get_guest_msrs, 1 }, 1326 { "get-exit-reason", 1327 NO_ARG, &get_exit_reason, 1 }, 1328 { "get-x2apic-state", NO_ARG, &get_x2apic_state, 1 }, 1329 { "get-all", NO_ARG, &get_all, 1 }, 1330 { "run", NO_ARG, &run, 1 }, 1331 { "pause", NO_ARG, &do_pause, 1 }, 1332 { "resume", NO_ARG, &do_resume, 1 }, 1333 { "create", NO_ARG, &create, 1 }, 1334 { "destroy", NO_ARG, &destroy, 1 }, 1335 { "inject-nmi", NO_ARG, &inject_nmi, 1 }, 1336 { "force-reset", NO_ARG, &force_reset, 1 }, 1337 { "force-poweroff", NO_ARG, &force_poweroff, 1 }, 1338 { "get-active-cpus", NO_ARG, &get_active_cpus, 1 }, 1339 { "get-intinfo", NO_ARG, &get_intinfo, 1 }, 1340 { "get-cpu-topology", NO_ARG, &get_cpu_topology, 1 }, 1341 { "pmtmr-port", REQ_ARG, 0, PMTMR_PORT }, 1342 { "wrlock-cycle", NO_ARG, &wrlock_cycle, 1 }, 1343 { "get-fpu", NO_ARG, &get_fpu, 1 }, 1344 }; 1345 1346 const struct option intel_opts[] = { 1347 { "get-vmcs-pinbased-ctls", 1348 NO_ARG, &get_pinbased_ctls, 1 }, 1349 { "get-vmcs-procbased-ctls", 1350 NO_ARG, &get_procbased_ctls, 1 }, 1351 { "get-vmcs-procbased-ctls2", 1352 NO_ARG, &get_procbased_ctls2, 1 }, 1353 { "get-vmcs-guest-linear-address", 1354 NO_ARG, &get_vmcs_gla, 1 }, 1355 { "get-vmcs-guest-physical-address", 1356 NO_ARG, &get_vmcs_gpa, 1 }, 1357 { "get-vmcs-entry-interruption-info", 1358 NO_ARG, &get_vmcs_entry_interruption_info, 1}, 1359 { "get-vmcs-cr0-mask", NO_ARG, &get_cr0_mask, 1 }, 1360 { "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 }, 1361 { "get-vmcs-cr4-mask", NO_ARG, &get_cr4_mask, 1 }, 1362 { "get-vmcs-cr4-shadow", NO_ARG, &get_cr4_shadow, 1 }, 1363 { "get-vmcs-cr3-targets", NO_ARG, &get_cr3_targets, 1 }, 1364 { "get-vmcs-tpr-threshold", 1365 NO_ARG, &get_tpr_threshold, 1 }, 1366 { "get-vmcs-vpid", NO_ARG, &get_vpid_asid, 1 }, 1367 { "get-vmcs-exit-ctls", NO_ARG, &get_exit_ctls, 1 }, 1368 { "get-vmcs-entry-ctls", 1369 NO_ARG, &get_entry_ctls, 1 }, 1370 { "get-vmcs-instruction-error", 1371 NO_ARG, &get_inst_err, 1 }, 1372 { "get-vmcs-host-pat", NO_ARG, &get_host_pat, 1 }, 1373 { "get-vmcs-host-cr0", 1374 NO_ARG, &get_host_cr0, 1 }, 1375 { "set-vmcs-entry-interruption-info", 1376 REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO }, 1377 { "get-vmcs-exit-qualification", 1378 NO_ARG, &get_vmcs_exit_qualification, 1 }, 1379 { "get-vmcs-exit-inst-length", 1380 NO_ARG, &get_vmcs_exit_inst_length, 1 }, 1381 { "get-vmcs-interruptibility", 1382 NO_ARG, &get_vmcs_interruptibility, 1 }, 1383 { "get-vmcs-exit-interruption-error", 1384 NO_ARG, &get_vmcs_exit_interruption_error, 1 }, 1385 { "get-vmcs-exit-interruption-info", 1386 NO_ARG, &get_vmcs_exit_interruption_info, 1 }, 1387 { "get-vmcs-link", NO_ARG, &get_vmcs_link, 1 }, 1388 { "get-vmcs-host-cr3", 1389 NO_ARG, &get_host_cr3, 1 }, 1390 { "get-vmcs-host-cr4", 1391 NO_ARG, &get_host_cr4, 1 }, 1392 { "get-vmcs-host-rip", 1393 NO_ARG, &get_host_rip, 1 }, 1394 { "get-vmcs-host-rsp", 1395 NO_ARG, &get_host_rsp, 1 }, 1396 { "get-apic-access-address", 1397 NO_ARG, &get_apic_access_addr, 1}, 1398 { "get-virtual-apic-address", 1399 NO_ARG, &get_virtual_apic_addr, 1} 1400 }; 1401 1402 const struct option amd_opts[] = { 1403 { "get-vmcb-intercepts", 1404 NO_ARG, &get_vmcb_intercept, 1 }, 1405 { "get-vmcb-asid", 1406 NO_ARG, &get_vpid_asid, 1 }, 1407 { "get-vmcb-exit-details", 1408 NO_ARG, &get_vmcb_exit_details, 1 }, 1409 { "get-vmcb-tlb-ctrl", 1410 NO_ARG, &get_vmcb_tlb_ctrl, 1 }, 1411 { "get-vmcb-virq", 1412 NO_ARG, &get_vmcb_virq, 1 }, 1413 { "get-avic-apic-bar", 1414 NO_ARG, &get_apic_access_addr, 1 }, 1415 { "get-avic-backing-page", 1416 NO_ARG, &get_virtual_apic_addr, 1 }, 1417 { "get-avic-table", 1418 NO_ARG, &get_avic_table, 1 } 1419 }; 1420 1421 const struct option null_opt = { 1422 NULL, 0, NULL, 0 1423 }; 1424 1425 struct option *all_opts; 1426 char *cp; 1427 int optlen; 1428 1429 optlen = sizeof(common_opts); 1430 1431 if (cpu_intel) 1432 optlen += sizeof(intel_opts); 1433 else 1434 optlen += sizeof(amd_opts); 1435 1436 optlen += sizeof(null_opt); 1437 1438 all_opts = malloc(optlen); 1439 1440 cp = (char *)all_opts; 1441 memcpy(cp, common_opts, sizeof(common_opts)); 1442 cp += sizeof(common_opts); 1443 1444 if (cpu_intel) { 1445 memcpy(cp, intel_opts, sizeof(intel_opts)); 1446 cp += sizeof(intel_opts); 1447 } else { 1448 memcpy(cp, amd_opts, sizeof(amd_opts)); 1449 cp += sizeof(amd_opts); 1450 } 1451 1452 memcpy(cp, &null_opt, sizeof(null_opt)); 1453 cp += sizeof(null_opt); 1454 1455 return (all_opts); 1456 } 1457 1458 static const char * 1459 wday_str(int idx) 1460 { 1461 static const char *weekdays[] = { 1462 "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat" 1463 }; 1464 1465 if (idx >= 0 && idx < 7) 1466 return (weekdays[idx]); 1467 else 1468 return ("UNK"); 1469 } 1470 1471 static const char * 1472 mon_str(int idx) 1473 { 1474 static const char *months[] = { 1475 "Jan", "Feb", "Mar", "Apr", "May", "Jun", 1476 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" 1477 }; 1478 1479 if (idx >= 0 && idx < 12) 1480 return (months[idx]); 1481 else 1482 return ("UNK"); 1483 } 1484 1485 static int 1486 show_memmap(struct vmctx *ctx) 1487 { 1488 char name[SPECNAMELEN + 1], numbuf[8]; 1489 vm_ooffset_t segoff; 1490 vm_paddr_t gpa; 1491 size_t maplen, seglen; 1492 int error, flags, prot, segid, delim; 1493 1494 printf("Address Length Segment Offset "); 1495 printf("Prot Flags\n"); 1496 1497 gpa = 0; 1498 while (1) { 1499 error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen, 1500 &prot, &flags); 1501 if (error) 1502 return (errno == ENOENT ? 0 : error); 1503 1504 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1505 if (error) 1506 return (error); 1507 1508 printf("%-12lX", gpa); 1509 humanize_number(numbuf, sizeof(numbuf), maplen, "B", 1510 HN_AUTOSCALE, HN_NOSPACE); 1511 printf("%-12s", numbuf); 1512 1513 printf("%-12s", name[0] ? name : "sysmem"); 1514 printf("%-12lX", segoff); 1515 printf("%c%c%c ", prot & PROT_READ ? 'R' : '-', 1516 prot & PROT_WRITE ? 'W' : '-', 1517 prot & PROT_EXEC ? 'X' : '-'); 1518 1519 delim = '\0'; 1520 if (flags & VM_MEMMAP_F_WIRED) { 1521 printf("%cwired", delim); 1522 delim = '/'; 1523 } 1524 if (flags & VM_MEMMAP_F_IOMMU) { 1525 printf("%ciommu", delim); 1526 delim = '/'; 1527 } 1528 printf("\n"); 1529 1530 gpa += maplen; 1531 } 1532 } 1533 1534 static int 1535 show_memseg(struct vmctx *ctx) 1536 { 1537 char name[SPECNAMELEN + 1], numbuf[8]; 1538 size_t seglen; 1539 int error, segid; 1540 1541 printf("ID Length Name\n"); 1542 1543 segid = 0; 1544 while (1) { 1545 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1546 if (error) 1547 return (errno == EINVAL ? 0 : error); 1548 1549 if (seglen) { 1550 printf("%-4d", segid); 1551 humanize_number(numbuf, sizeof(numbuf), seglen, "B", 1552 HN_AUTOSCALE, HN_NOSPACE); 1553 printf("%-12s", numbuf); 1554 printf("%s", name[0] ? name : "sysmem"); 1555 printf("\n"); 1556 } 1557 segid++; 1558 } 1559 } 1560 1561 static int 1562 show_fpu(struct vmctx *ctx, int vcpu) 1563 { 1564 int res, fd; 1565 1566 struct vm_fpu_desc_entry entries[64]; 1567 struct vm_fpu_desc desc = { 1568 .vfd_entry_data = entries, 1569 .vfd_num_entries = 64, 1570 }; 1571 fd = vm_get_device_fd(ctx); 1572 res = ioctl(fd, VM_DESC_FPU_AREA, &desc); 1573 if (res != 0) { 1574 return (errno); 1575 } 1576 for (uint_t i = 0; i < desc.vfd_num_entries; i++) { 1577 const struct vm_fpu_desc_entry *entry = &entries[i]; 1578 1579 /* confirm that AVX fields are where we expect */ 1580 if (entry->vfde_feature == XFEATURE_AVX) { 1581 if (entry->vfde_size != 0x100 || 1582 entry->vfde_off != 0x240) { 1583 (void) fprintf(stderr, 1584 "show_fpu: unexpected AVX size/placement " 1585 "- size:%x off:%x\n", 1586 entry->vfde_size, entry->vfde_off); 1587 return (EINVAL); 1588 } 1589 } 1590 } 1591 void *buf = malloc(desc.vfd_req_size); 1592 if (buf == NULL) { 1593 return (ENOMEM); 1594 } 1595 struct vm_fpu_state req = { 1596 .vcpuid = vcpu, 1597 .buf = buf, 1598 .len = desc.vfd_req_size, 1599 }; 1600 res = ioctl(fd, VM_GET_FPU, &req); 1601 if (res != 0) { 1602 res = errno; 1603 free(buf); 1604 return (res); 1605 } 1606 1607 const struct xsave_state *state = buf; 1608 const struct fxsave_state *fx = &state->xs_fxsave; 1609 (void) printf("fpu_fcw[%d]\t\t0x%04x\n", vcpu, fx->fx_fcw); 1610 (void) printf("fpu_fsw[%d]\t\t0x%04x\n", vcpu, fx->fx_fsw); 1611 (void) printf("fpu_ftw[%d]\t\t0x%04x\n", vcpu, fx->fx_fctw); 1612 (void) printf("fpu_fop[%d]\t\t0x%04x\n", vcpu, fx->fx_fop); 1613 (void) printf("fpu_rip[%d]\t\t0x%016lx\n", vcpu, fx->fx_rip); 1614 (void) printf("fpu_rdp[%d]\t\t0x%016lx\n", vcpu, fx->fx_rdp); 1615 (void) printf("fpu_mxcsr[%d]\t\t0x%08x\n", vcpu, fx->fx_mxcsr); 1616 (void) printf("fpu_mxcsr_mask[%d]\t0x%08x\n", vcpu, 1617 fx->fx_mxcsr_mask); 1618 /* ST/MMX regs */ 1619 for (uint_t i = 0; i < 8; i++) { 1620 (void) printf("fpu_st%u[%d]\t\t0x%08x%08x%08x%08x\n", vcpu, i, 1621 fx->fx_st[i].__fpr_pad[0], fx->fx_st[i].__fpr_pad[1], 1622 fx->fx_st[i].__fpr_pad[2], fx->fx_st[i].__fpr_pad[3]); 1623 } 1624 /* SSE regs */ 1625 for (uint_t i = 0; i < 16; i++) { 1626 (void) printf("fpu_xmm%u[%d]\t\t0x%08x%08x%08x%08x\n", 1627 i, vcpu, 1628 fx->fx_xmm[i]._l[0], fx->fx_xmm[i]._l[1], 1629 fx->fx_xmm[i]._l[2], fx->fx_xmm[i]._l[3]); 1630 } 1631 1632 if (state->xs_header.xsh_xstate_bv & XFEATURE_AVX) { 1633 /* AVX regs */ 1634 for (uint_t i = 0; i < 16; i++) { 1635 (void) printf("fpu_ymm%u[%d]\t\t0x%08x%08x%08x%08x\n", 1636 i, vcpu, 1637 state->xs_ymm[i]._l[0], state->xs_ymm[i]._l[1], 1638 state->xs_ymm[i]._l[2], state->xs_ymm[i]._l[3]); 1639 } 1640 } 1641 1642 free(buf); 1643 return (0); 1644 } 1645 1646 static const char * 1647 msr_name(uint32_t msr) 1648 { 1649 #define MSR_IDENT_MAP(x) case x: return (#x); 1650 switch (msr) { 1651 MSR_IDENT_MAP(MSR_PAT) 1652 MSR_IDENT_MAP(MSR_SYSENTER_CS_MSR) 1653 MSR_IDENT_MAP(MSR_SYSENTER_ESP_MSR) 1654 MSR_IDENT_MAP(MSR_SYSENTER_EIP_MSR) 1655 MSR_IDENT_MAP(MSR_STAR) 1656 MSR_IDENT_MAP(MSR_LSTAR) 1657 MSR_IDENT_MAP(MSR_CSTAR) 1658 MSR_IDENT_MAP(MSR_SF_MASK) 1659 MSR_IDENT_MAP(MSR_FSBASE) 1660 MSR_IDENT_MAP(MSR_GSBASE) 1661 MSR_IDENT_MAP(MSR_KGSBASE) 1662 MSR_IDENT_MAP(MSR_EFER) 1663 MSR_IDENT_MAP(MSR_MTRRcap) 1664 MSR_IDENT_MAP(MSR_MTRRdefType) 1665 case MSR_TSC: 1666 return ("MSR_TSC (offset from system boot)"); 1667 default: 1668 return (NULL); 1669 } 1670 } 1671 1672 static int 1673 show_msrs(struct vmctx *ctx, int vcpu) 1674 { 1675 struct vdi_field_entry_v1 *msrs; 1676 struct vm_data_xfer xfer = { 1677 .vdx_vcpuid = vcpu, 1678 .vdx_class = VDC_MSR, 1679 .vdx_version = 1, 1680 .vdx_len = 0, 1681 .vdx_data = &msrs, 1682 }; 1683 int fd = vm_get_device_fd(ctx); 1684 int res; 1685 1686 /* Figure out how many entries we need to alloc for */ 1687 res = ioctl(fd, VM_DATA_READ, &xfer); 1688 if (res == 0) { 1689 return (EINVAL); 1690 } else if (errno != ENOSPC) { 1691 return (errno); 1692 } 1693 const uint32_t len = xfer.vdx_result_len; 1694 msrs = malloc(len); 1695 if (msrs == NULL) { 1696 return (ENOMEM); 1697 } 1698 bzero(msrs, len); 1699 xfer.vdx_data = msrs; 1700 xfer.vdx_len = len; 1701 1702 /* Query the actual data, now that we should have an adequate buffer */ 1703 res = ioctl(fd, VM_DATA_READ, &xfer); 1704 if (res != 0) { 1705 free(msrs); 1706 return (errno); 1707 } 1708 1709 const uint_t count = 1710 xfer.vdx_result_len / sizeof (struct vdi_field_entry_v1); 1711 for (uint_t i = 0; i < count; i++) { 1712 const uint32_t ident = msrs[i].vfe_ident; 1713 const uint64_t value = msrs[i].vfe_value; 1714 1715 const char *name = msr_name(ident); 1716 1717 if (name != NULL) { 1718 printf("msr[%s]\t = %x\n", name, value); 1719 } else { 1720 printf("msr[%08x]\t = %x\n", ident, value); 1721 } 1722 } 1723 free(msrs); 1724 return (0); 1725 } 1726 1727 int 1728 main(int argc, char *argv[]) 1729 { 1730 char *vmname; 1731 int error, ch, vcpu, ptenum; 1732 vm_paddr_t gpa_pmap; 1733 struct vm_exit vmexit; 1734 uint64_t rax, cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 1735 uint64_t rsp, rip, rflags, efer; 1736 uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2]; 1737 struct vmctx *ctx; 1738 cpuset_t cpus; 1739 bool cpu_intel; 1740 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 1741 struct tm tm; 1742 struct option *opts; 1743 1744 cpu_intel = cpu_vendor_intel(); 1745 opts = setup_options(cpu_intel); 1746 1747 vcpu = 0; 1748 vmname = NULL; 1749 assert_lapic_lvt = -1; 1750 progname = basename(argv[0]); 1751 1752 while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) { 1753 switch (ch) { 1754 case 0: 1755 break; 1756 case VMNAME: 1757 vmname = optarg; 1758 break; 1759 case VCPU: 1760 vcpu = atoi(optarg); 1761 break; 1762 case SET_MEM: 1763 memsize = atoi(optarg) * MB; 1764 memsize = roundup(memsize, 2 * MB); 1765 break; 1766 case SET_EFER: 1767 efer = strtoul(optarg, NULL, 0); 1768 set_efer = 1; 1769 break; 1770 case SET_CR0: 1771 cr0 = strtoul(optarg, NULL, 0); 1772 set_cr0 = 1; 1773 break; 1774 case SET_CR2: 1775 cr2 = strtoul(optarg, NULL, 0); 1776 set_cr2 = 1; 1777 break; 1778 case SET_CR3: 1779 cr3 = strtoul(optarg, NULL, 0); 1780 set_cr3 = 1; 1781 break; 1782 case SET_CR4: 1783 cr4 = strtoul(optarg, NULL, 0); 1784 set_cr4 = 1; 1785 break; 1786 case SET_DR0: 1787 dr0 = strtoul(optarg, NULL, 0); 1788 set_dr0 = 1; 1789 break; 1790 case SET_DR1: 1791 dr1 = strtoul(optarg, NULL, 0); 1792 set_dr1 = 1; 1793 break; 1794 case SET_DR2: 1795 dr2 = strtoul(optarg, NULL, 0); 1796 set_dr2 = 1; 1797 break; 1798 case SET_DR3: 1799 dr3 = strtoul(optarg, NULL, 0); 1800 set_dr3 = 1; 1801 break; 1802 case SET_DR6: 1803 dr6 = strtoul(optarg, NULL, 0); 1804 set_dr6 = 1; 1805 break; 1806 case SET_DR7: 1807 dr7 = strtoul(optarg, NULL, 0); 1808 set_dr7 = 1; 1809 break; 1810 case SET_RSP: 1811 rsp = strtoul(optarg, NULL, 0); 1812 set_rsp = 1; 1813 break; 1814 case SET_RIP: 1815 rip = strtoul(optarg, NULL, 0); 1816 set_rip = 1; 1817 break; 1818 case SET_RAX: 1819 rax = strtoul(optarg, NULL, 0); 1820 set_rax = 1; 1821 break; 1822 case SET_RFLAGS: 1823 rflags = strtoul(optarg, NULL, 0); 1824 set_rflags = 1; 1825 break; 1826 case DESC_BASE: 1827 desc_base = strtoul(optarg, NULL, 0); 1828 break; 1829 case DESC_LIMIT: 1830 desc_limit = strtoul(optarg, NULL, 0); 1831 break; 1832 case DESC_ACCESS: 1833 desc_access = strtoul(optarg, NULL, 0); 1834 break; 1835 case SET_CS: 1836 cs = strtoul(optarg, NULL, 0); 1837 set_cs = 1; 1838 break; 1839 case SET_DS: 1840 ds = strtoul(optarg, NULL, 0); 1841 set_ds = 1; 1842 break; 1843 case SET_ES: 1844 es = strtoul(optarg, NULL, 0); 1845 set_es = 1; 1846 break; 1847 case SET_FS: 1848 fs = strtoul(optarg, NULL, 0); 1849 set_fs = 1; 1850 break; 1851 case SET_GS: 1852 gs = strtoul(optarg, NULL, 0); 1853 set_gs = 1; 1854 break; 1855 case SET_SS: 1856 ss = strtoul(optarg, NULL, 0); 1857 set_ss = 1; 1858 break; 1859 case SET_TR: 1860 tr = strtoul(optarg, NULL, 0); 1861 set_tr = 1; 1862 break; 1863 case SET_LDTR: 1864 ldtr = strtoul(optarg, NULL, 0); 1865 set_ldtr = 1; 1866 break; 1867 case SET_X2APIC_STATE: 1868 x2apic_state = strtol(optarg, NULL, 0); 1869 set_x2apic_state = 1; 1870 break; 1871 case SET_EXCEPTION_BITMAP: 1872 exception_bitmap = strtoul(optarg, NULL, 0); 1873 set_exception_bitmap = 1; 1874 break; 1875 case SET_VMCS_ENTRY_INTERRUPTION_INFO: 1876 vmcs_entry_interruption_info = strtoul(optarg, NULL, 0); 1877 set_vmcs_entry_interruption_info = 1; 1878 break; 1879 case SET_CAP: 1880 capval = strtoul(optarg, NULL, 0); 1881 setcap = 1; 1882 break; 1883 case SET_RTC_TIME: 1884 rtc_secs = strtoul(optarg, NULL, 0); 1885 set_rtc_time = 1; 1886 break; 1887 case SET_RTC_NVRAM: 1888 rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0); 1889 set_rtc_nvram = 1; 1890 break; 1891 case RTC_NVRAM_OFFSET: 1892 rtc_nvram_offset = strtoul(optarg, NULL, 0); 1893 break; 1894 case GET_GPA_PMAP: 1895 gpa_pmap = strtoul(optarg, NULL, 0); 1896 get_gpa_pmap = 1; 1897 break; 1898 case CAPNAME: 1899 capname = optarg; 1900 break; 1901 case ASSERT_LAPIC_LVT: 1902 assert_lapic_lvt = atoi(optarg); 1903 break; 1904 case PMTMR_PORT: 1905 pmtmr_port = strtoul(optarg, NULL, 16); 1906 break; 1907 default: 1908 usage(cpu_intel); 1909 } 1910 } 1911 argc -= optind; 1912 argv += optind; 1913 1914 if (vmname == NULL) 1915 usage(cpu_intel); 1916 1917 error = 0; 1918 1919 if (!error && create) 1920 error = vm_create(vmname, 0); 1921 1922 if (!error) { 1923 ctx = vm_open(vmname); 1924 if (ctx == NULL) { 1925 fprintf(stderr, 1926 "vm_open: %s could not be opened: %s\n", 1927 vmname, strerror(errno)); 1928 exit (1); 1929 } 1930 } 1931 1932 if (!error && pmtmr_port) { 1933 error = vm_pmtmr_set_location(ctx, pmtmr_port); 1934 exit(error); 1935 } 1936 1937 if (!error && wrlock_cycle) { 1938 error = vm_wrlock_cycle(ctx); 1939 exit(error); 1940 } 1941 1942 if (!error && memsize) 1943 error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL); 1944 1945 if (!error && set_efer) 1946 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_EFER, efer); 1947 1948 if (!error && set_cr0) 1949 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR0, cr0); 1950 1951 if (!error && set_cr2) 1952 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR2, cr2); 1953 1954 if (!error && set_cr3) 1955 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR3, cr3); 1956 1957 if (!error && set_cr4) 1958 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR4, cr4); 1959 1960 if (!error && set_dr0) 1961 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR0, dr0); 1962 1963 if (!error && set_dr1) 1964 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR1, dr1); 1965 1966 if (!error && set_dr2) 1967 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR2, dr2); 1968 1969 if (!error && set_dr3) 1970 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR3, dr3); 1971 1972 if (!error && set_dr6) 1973 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR6, dr6); 1974 1975 if (!error && set_dr7) 1976 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR7, dr7); 1977 1978 if (!error && set_rsp) 1979 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RSP, rsp); 1980 1981 if (!error && set_rip) 1982 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, rip); 1983 1984 if (!error && set_rax) 1985 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, rax); 1986 1987 if (!error && set_rflags) { 1988 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 1989 rflags); 1990 } 1991 1992 if (!error && set_desc_ds) { 1993 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_DS, 1994 desc_base, desc_limit, desc_access); 1995 } 1996 1997 if (!error && set_desc_es) { 1998 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_ES, 1999 desc_base, desc_limit, desc_access); 2000 } 2001 2002 if (!error && set_desc_ss) { 2003 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_SS, 2004 desc_base, desc_limit, desc_access); 2005 } 2006 2007 if (!error && set_desc_cs) { 2008 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_CS, 2009 desc_base, desc_limit, desc_access); 2010 } 2011 2012 if (!error && set_desc_fs) { 2013 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_FS, 2014 desc_base, desc_limit, desc_access); 2015 } 2016 2017 if (!error && set_desc_gs) { 2018 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GS, 2019 desc_base, desc_limit, desc_access); 2020 } 2021 2022 if (!error && set_desc_tr) { 2023 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_TR, 2024 desc_base, desc_limit, desc_access); 2025 } 2026 2027 if (!error && set_desc_ldtr) { 2028 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 2029 desc_base, desc_limit, desc_access); 2030 } 2031 2032 if (!error && set_desc_gdtr) { 2033 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 2034 desc_base, desc_limit, 0); 2035 } 2036 2037 if (!error && set_desc_idtr) { 2038 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 2039 desc_base, desc_limit, 0); 2040 } 2041 2042 if (!error && set_cs) 2043 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CS, cs); 2044 2045 if (!error && set_ds) 2046 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DS, ds); 2047 2048 if (!error && set_es) 2049 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_ES, es); 2050 2051 if (!error && set_fs) 2052 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_FS, fs); 2053 2054 if (!error && set_gs) 2055 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_GS, gs); 2056 2057 if (!error && set_ss) 2058 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_SS, ss); 2059 2060 if (!error && set_tr) 2061 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_TR, tr); 2062 2063 if (!error && set_ldtr) 2064 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_LDTR, ldtr); 2065 2066 if (!error && set_x2apic_state) 2067 error = vm_set_x2apic_state(ctx, vcpu, x2apic_state); 2068 2069 if (!error && set_exception_bitmap) { 2070 if (cpu_intel) 2071 error = vm_set_vmcs_field(ctx, vcpu, 2072 VMCS_EXCEPTION_BITMAP, 2073 exception_bitmap); 2074 else 2075 error = vm_set_vmcb_field(ctx, vcpu, 2076 VMCB_OFF_EXC_INTERCEPT, 2077 4, exception_bitmap); 2078 } 2079 2080 if (!error && cpu_intel && set_vmcs_entry_interruption_info) { 2081 error = vm_set_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO, 2082 vmcs_entry_interruption_info); 2083 } 2084 2085 if (!error && inject_nmi) { 2086 error = vm_inject_nmi(ctx, vcpu); 2087 } 2088 2089 if (!error && assert_lapic_lvt != -1) { 2090 error = vm_lapic_local_irq(ctx, vcpu, assert_lapic_lvt); 2091 } 2092 2093 if (!error && (get_memseg || get_all)) 2094 error = show_memseg(ctx); 2095 2096 if (!error && (get_memmap || get_all)) 2097 error = show_memmap(ctx); 2098 2099 if (!error) 2100 error = get_all_registers(ctx, vcpu); 2101 2102 if (!error) 2103 error = get_all_segments(ctx, vcpu); 2104 2105 if (!error && (get_fpu || get_all)) { 2106 error = show_fpu(ctx, vcpu); 2107 } 2108 2109 if (!error) { 2110 if (cpu_intel) 2111 error = get_misc_vmcs(ctx, vcpu); 2112 else 2113 error = get_misc_vmcb(ctx, vcpu); 2114 } 2115 2116 if (!error && (get_x2apic_state || get_all)) { 2117 error = vm_get_x2apic_state(ctx, vcpu, &x2apic_state); 2118 if (error == 0) 2119 printf("x2apic_state[%d]\t%d\n", vcpu, x2apic_state); 2120 } 2121 2122 if (!error && (get_eptp || get_all)) { 2123 if (cpu_intel) 2124 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EPTP, &eptp); 2125 else 2126 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_NPT_BASE, 2127 8, &eptp); 2128 if (error == 0) 2129 printf("%s[%d]\t\t0x%016lx\n", 2130 cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp); 2131 } 2132 2133 if (!error && (get_exception_bitmap || get_all)) { 2134 if(cpu_intel) 2135 error = vm_get_vmcs_field(ctx, vcpu, 2136 VMCS_EXCEPTION_BITMAP, &bm); 2137 else 2138 error = vm_get_vmcb_field(ctx, vcpu, 2139 VMCB_OFF_EXC_INTERCEPT, 2140 4, &bm); 2141 if (error == 0) 2142 printf("exception_bitmap[%d]\t%#lx\n", vcpu, bm); 2143 } 2144 2145 if (!error && (get_io_bitmap || get_all)) { 2146 if (cpu_intel) { 2147 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_A, 2148 &bm); 2149 if (error == 0) 2150 printf("io_bitmap_a[%d]\t%#lx\n", vcpu, bm); 2151 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_B, 2152 &bm); 2153 if (error == 0) 2154 printf("io_bitmap_b[%d]\t%#lx\n", vcpu, bm); 2155 } else { 2156 error = vm_get_vmcb_field(ctx, vcpu, 2157 VMCB_OFF_IO_PERM, 8, &bm); 2158 if (error == 0) 2159 printf("io_bitmap[%d]\t%#lx\n", vcpu, bm); 2160 } 2161 } 2162 2163 if (!error && (get_tsc_offset || get_all)) { 2164 uint64_t tscoff; 2165 if (cpu_intel) 2166 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TSC_OFFSET, 2167 &tscoff); 2168 else 2169 error = vm_get_vmcb_field(ctx, vcpu, 2170 VMCB_OFF_TSC_OFFSET, 2171 8, &tscoff); 2172 if (error == 0) 2173 printf("tsc_offset[%d]\t0x%016lx\n", vcpu, tscoff); 2174 } 2175 2176 if (!error && (get_msr_bitmap_address || get_all)) { 2177 if (cpu_intel) 2178 error = vm_get_vmcs_field(ctx, vcpu, VMCS_MSR_BITMAP, 2179 &addr); 2180 else 2181 error = vm_get_vmcb_field(ctx, vcpu, 2182 VMCB_OFF_MSR_PERM, 8, &addr); 2183 if (error == 0) 2184 printf("msr_bitmap[%d]\t\t%#lx\n", vcpu, addr); 2185 } 2186 2187 if (!error && (get_vpid_asid || get_all)) { 2188 uint64_t vpid; 2189 if (cpu_intel) 2190 error = vm_get_vmcs_field(ctx, vcpu, VMCS_VPID, &vpid); 2191 else 2192 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_ASID, 2193 4, &vpid); 2194 if (error == 0) 2195 printf("%s[%d]\t\t0x%04lx\n", 2196 cpu_intel ? "vpid" : "asid", vcpu, vpid); 2197 } 2198 2199 if (!error && (get_guest_msrs || get_all)) { 2200 error = show_msrs(ctx, vcpu); 2201 } 2202 2203 if (!error && (get_exit_reason || get_all)) { 2204 if (cpu_intel) 2205 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_REASON, 2206 &u64); 2207 else 2208 error = vm_get_vmcb_field(ctx, vcpu, 2209 VMCB_OFF_EXIT_REASON, 8, 2210 &u64); 2211 if (error == 0) 2212 printf("exit_reason[%d]\t%#lx\n", vcpu, u64); 2213 } 2214 2215 if (!error && setcap) { 2216 int captype; 2217 captype = vm_capability_name2type(capname); 2218 error = vm_set_capability(ctx, vcpu, captype, capval); 2219 if (error != 0 && errno == ENOENT) 2220 printf("Capability \"%s\" is not available\n", capname); 2221 } 2222 2223 if (!error && get_gpa_pmap) { 2224 error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum); 2225 if (error == 0) { 2226 printf("gpa %#lx:", gpa_pmap); 2227 pte = &pteval[0]; 2228 while (ptenum-- > 0) 2229 printf(" %#lx", *pte++); 2230 printf("\n"); 2231 } 2232 } 2233 2234 if (!error && set_rtc_nvram) 2235 error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value); 2236 2237 if (!error && (get_rtc_nvram || get_all)) { 2238 error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value); 2239 if (error == 0) { 2240 printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset, 2241 rtc_nvram_value); 2242 } 2243 } 2244 2245 if (!error && set_rtc_time) { 2246 timespec_t ts = { 2247 .tv_sec = rtc_secs, 2248 .tv_nsec = 0, 2249 }; 2250 2251 error = vm_rtc_settime(ctx, &ts); 2252 } 2253 2254 if (!error && (get_rtc_time || get_all)) { 2255 timespec_t ts; 2256 2257 error = vm_rtc_gettime(ctx, &ts); 2258 if (error == 0) { 2259 gmtime_r(&ts.tv_sec, &tm); 2260 printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n", 2261 ts.tv_sec, wday_str(tm.tm_wday), mon_str(tm.tm_mon), 2262 tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec, 2263 1900 + tm.tm_year); 2264 } 2265 } 2266 2267 if (!error && (getcap || get_all)) { 2268 int captype, val, getcaptype; 2269 2270 if (getcap && capname) 2271 getcaptype = vm_capability_name2type(capname); 2272 else 2273 getcaptype = -1; 2274 2275 for (captype = 0; captype < VM_CAP_MAX; captype++) { 2276 if (getcaptype >= 0 && captype != getcaptype) 2277 continue; 2278 error = vm_get_capability(ctx, vcpu, captype, &val); 2279 if (error == 0) { 2280 printf("Capability \"%s\" is %s on vcpu %d\n", 2281 vm_capability_type2name(captype), 2282 val ? "set" : "not set", vcpu); 2283 } else if (errno == ENOENT) { 2284 error = 0; 2285 printf("Capability \"%s\" is not available\n", 2286 vm_capability_type2name(captype)); 2287 } else { 2288 break; 2289 } 2290 } 2291 } 2292 2293 if (!error && (get_active_cpus || get_all)) { 2294 error = vm_active_cpus(ctx, &cpus); 2295 if (!error) 2296 print_cpus("active cpus", &cpus); 2297 } 2298 2299 if (!error && (get_intinfo || get_all)) { 2300 error = vm_get_intinfo(ctx, vcpu, &info[0], &info[1]); 2301 if (!error) { 2302 print_intinfo("pending", info[0]); 2303 print_intinfo("current", info[1]); 2304 } 2305 } 2306 2307 if (!error && (get_stats || get_all)) { 2308 int i, num_stats; 2309 uint64_t *stats; 2310 struct timeval tv; 2311 const char *desc; 2312 2313 stats = vm_get_stats(ctx, vcpu, &tv, &num_stats); 2314 if (stats != NULL) { 2315 printf("vcpu%d stats:\n", vcpu); 2316 for (i = 0; i < num_stats; i++) { 2317 desc = vm_get_stat_desc(ctx, i); 2318 printf("%-40s\t%ld\n", desc, stats[i]); 2319 } 2320 } 2321 } 2322 2323 if (!error && (get_cpu_topology || get_all)) { 2324 uint16_t sockets, cores, threads, maxcpus; 2325 2326 vm_get_topology(ctx, &sockets, &cores, &threads, &maxcpus); 2327 printf("cpu_topology:\tsockets=%hu, cores=%hu, threads=%hu, " 2328 "maxcpus=%hu\n", sockets, cores, threads, maxcpus); 2329 } 2330 2331 if (!error && run) { 2332 struct vm_entry entry; 2333 2334 bzero(&entry, sizeof (entry)); 2335 2336 error = vm_run(ctx, vcpu, &entry, &vmexit); 2337 if (error == 0) 2338 dump_vm_run_exitcode(&vmexit, vcpu); 2339 else 2340 printf("vm_run error %d\n", error); 2341 } 2342 2343 if (!error && do_pause) { 2344 error = ioctl(vm_get_device_fd(ctx), VM_PAUSE, vcpu); 2345 2346 if (error != 0) { 2347 printf("vm_pause error %d\n", errno); 2348 } 2349 } 2350 if (!error && do_resume) { 2351 error = ioctl(vm_get_device_fd(ctx), VM_RESUME, vcpu); 2352 2353 if (error != 0) { 2354 printf("vm_resume error %d\n", errno); 2355 } 2356 } 2357 2358 if (!error && force_reset) 2359 error = vm_suspend(ctx, VM_SUSPEND_RESET); 2360 2361 if (!error && force_poweroff) 2362 error = vm_suspend(ctx, VM_SUSPEND_POWEROFF); 2363 2364 if (error) 2365 printf("errno = %d\n", errno); 2366 2367 if (!error && destroy) 2368 vm_destroy(ctx); 2369 2370 free (opts); 2371 exit(error); 2372 } 2373