1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2011 NetApp, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28 /*
29 * This file and its contents are supplied under the terms of the
30 * Common Development and Distribution License ("CDDL"), version 1.0.
31 * You may only use this file in accordance with the terms of version
32 * 1.0 of the CDDL.
33 *
34 * A full copy of the text of the CDDL should have accompanied this
35 * source. A copy of the CDDL is also available via the Internet at
36 * http://www.illumos.org/license/CDDL.
37 *
38 * Copyright 2015 Pluribus Networks Inc.
39 * Copyright 2019 Joyent, Inc.
40 * Copyright 2023 Oxide Computer Company
41 */
42
43 #include <sys/cdefs.h>
44
45 #include <sys/param.h>
46 #include <sys/types.h>
47 #include <sys/sysctl.h>
48 #include <sys/errno.h>
49 #include <sys/mman.h>
50 #include <sys/cpuset.h>
51 #include <sys/fp.h>
52
53 #include <stdio.h>
54 #include <stdlib.h>
55 #include <stdbool.h>
56 #include <string.h>
57 #include <unistd.h>
58 #include <libgen.h>
59 #include <libutil.h>
60 #include <fcntl.h>
61 #include <getopt.h>
62 #include <time.h>
63 #include <assert.h>
64 #include <libutil.h>
65
66 #include <machine/cpufunc.h>
67 #include <machine/specialreg.h>
68 #include <machine/vmm.h>
69 #include <machine/vmm_dev.h>
70 #include <sys/vmm_data.h>
71 #include <vmmapi.h>
72
73 #include "amd/vmcb.h"
74 #include "intel/vmcs.h"
75
76 #define MB (1UL << 20)
77 #define GB (1UL << 30)
78
79 #define REQ_ARG required_argument
80 #define NO_ARG no_argument
81 #define OPT_ARG optional_argument
82
83 static const char *progname;
84
85 static void
usage(bool cpu_intel)86 usage(bool cpu_intel)
87 {
88
89 (void)fprintf(stderr,
90 "Usage: %s --vm=<vmname>\n"
91 " [--cpu=<vcpu_number>]\n"
92 " [--create]\n"
93 " [--destroy]\n"
94 " [--pmtmr-port=ioport]\n"
95 " [--wrlock-cycle]\n"
96 " [--get-all]\n"
97 " [--get-stats]\n"
98 " [--set-desc-ds]\n"
99 " [--get-desc-ds]\n"
100 " [--set-desc-es]\n"
101 " [--get-desc-es]\n"
102 " [--set-desc-gs]\n"
103 " [--get-desc-gs]\n"
104 " [--set-desc-fs]\n"
105 " [--get-desc-fs]\n"
106 " [--set-desc-cs]\n"
107 " [--get-desc-cs]\n"
108 " [--set-desc-ss]\n"
109 " [--get-desc-ss]\n"
110 " [--set-desc-tr]\n"
111 " [--get-desc-tr]\n"
112 " [--set-desc-ldtr]\n"
113 " [--get-desc-ldtr]\n"
114 " [--set-desc-gdtr]\n"
115 " [--get-desc-gdtr]\n"
116 " [--set-desc-idtr]\n"
117 " [--get-desc-idtr]\n"
118 " [--run]\n"
119 " [--pause]\n"
120 " [--resume]\n"
121 " [--capname=<capname>]\n"
122 " [--getcap]\n"
123 " [--setcap=<0|1>]\n"
124 " [--desc-base=<BASE>]\n"
125 " [--desc-limit=<LIMIT>]\n"
126 " [--desc-access=<ACCESS>]\n"
127 " [--set-cr0=<CR0>]\n"
128 " [--get-cr0]\n"
129 " [--set-cr2=<CR2>]\n"
130 " [--get-cr2]\n"
131 " [--set-cr3=<CR3>]\n"
132 " [--get-cr3]\n"
133 " [--set-cr4=<CR4>]\n"
134 " [--get-cr4]\n"
135 " [--set-dr0=<DR0>]\n"
136 " [--get-dr0]\n"
137 " [--set-dr1=<DR1>]\n"
138 " [--get-dr1]\n"
139 " [--set-dr2=<DR2>]\n"
140 " [--get-dr2]\n"
141 " [--set-dr3=<DR3>]\n"
142 " [--get-dr3]\n"
143 " [--set-dr6=<DR6>]\n"
144 " [--get-dr6]\n"
145 " [--set-dr7=<DR7>]\n"
146 " [--get-dr7]\n"
147 " [--set-rsp=<RSP>]\n"
148 " [--get-rsp]\n"
149 " [--set-rip=<RIP>]\n"
150 " [--get-rip]\n"
151 " [--get-rax]\n"
152 " [--set-rax=<RAX>]\n"
153 " [--get-rbx]\n"
154 " [--get-rcx]\n"
155 " [--get-rdx]\n"
156 " [--get-rsi]\n"
157 " [--get-rdi]\n"
158 " [--get-rbp]\n"
159 " [--get-r8]\n"
160 " [--get-r9]\n"
161 " [--get-r10]\n"
162 " [--get-r11]\n"
163 " [--get-r12]\n"
164 " [--get-r13]\n"
165 " [--get-r14]\n"
166 " [--get-r15]\n"
167 " [--set-rflags=<RFLAGS>]\n"
168 " [--get-rflags]\n"
169 " [--set-cs]\n"
170 " [--get-cs]\n"
171 " [--set-ds]\n"
172 " [--get-ds]\n"
173 " [--set-es]\n"
174 " [--get-es]\n"
175 " [--set-fs]\n"
176 " [--get-fs]\n"
177 " [--set-gs]\n"
178 " [--get-gs]\n"
179 " [--set-ss]\n"
180 " [--get-ss]\n"
181 " [--get-tr]\n"
182 " [--get-ldtr]\n"
183 " [--set-x2apic-state=<state>]\n"
184 " [--get-x2apic-state]\n"
185 " [--set-mem=<memory in units of MB>]\n"
186 " [--get-lowmem]\n"
187 " [--get-highmem]\n"
188 " [--get-gpa-pmap]\n"
189 " [--assert-lapic-lvt=<pin>]\n"
190 " [--inject-nmi]\n"
191 " [--force-reset]\n"
192 " [--force-poweroff]\n"
193 " [--get-rtc-time]\n"
194 " [--set-rtc-time=<secs>]\n"
195 " [--get-rtc-nvram]\n"
196 " [--set-rtc-nvram=<val>]\n"
197 " [--rtc-nvram-offset=<offset>]\n"
198 " [--get-active-cpus]\n"
199 " [--get-debug-cpus]\n"
200 " [--get-intinfo]\n"
201 " [--get-eptp]\n"
202 " [--set-exception-bitmap]\n"
203 " [--get-exception-bitmap]\n"
204 " [--get-tsc-offset]\n"
205 " [--get-guest-pat]\n"
206 " [--get-io-bitmap-address]\n"
207 " [--get-msr-bitmap]\n"
208 " [--get-msr-bitmap-address]\n"
209 " [--get-guest-sysenter]\n"
210 " [--get-exit-reason]\n"
211 " [--get-cpu-topology]\n",
212 progname);
213
214 if (cpu_intel) {
215 (void)fprintf(stderr,
216 " [--get-vmcs-pinbased-ctls]\n"
217 " [--get-vmcs-procbased-ctls]\n"
218 " [--get-vmcs-procbased-ctls2]\n"
219 " [--get-vmcs-entry-interruption-info]\n"
220 " [--set-vmcs-entry-interruption-info=<info>]\n"
221 " [--get-vmcs-guest-physical-address\n"
222 " [--get-vmcs-guest-linear-address\n"
223 " [--get-vmcs-host-pat]\n"
224 " [--get-vmcs-host-cr0]\n"
225 " [--get-vmcs-host-cr3]\n"
226 " [--get-vmcs-host-cr4]\n"
227 " [--get-vmcs-host-rip]\n"
228 " [--get-vmcs-host-rsp]\n"
229 " [--get-vmcs-cr0-mask]\n"
230 " [--get-vmcs-cr0-shadow]\n"
231 " [--get-vmcs-cr4-mask]\n"
232 " [--get-vmcs-cr4-shadow]\n"
233 " [--get-vmcs-cr3-targets]\n"
234 " [--get-vmcs-apic-access-address]\n"
235 " [--get-vmcs-virtual-apic-address]\n"
236 " [--get-vmcs-tpr-threshold]\n"
237 " [--get-vmcs-vpid]\n"
238 " [--get-vmcs-instruction-error]\n"
239 " [--get-vmcs-exit-ctls]\n"
240 " [--get-vmcs-entry-ctls]\n"
241 " [--get-vmcs-link]\n"
242 " [--get-vmcs-exit-qualification]\n"
243 " [--get-vmcs-exit-interruption-info]\n"
244 " [--get-vmcs-exit-interruption-error]\n"
245 " [--get-vmcs-interruptibility]\n"
246 );
247 } else {
248 (void)fprintf(stderr,
249 " [--get-vmcb-intercepts]\n"
250 " [--get-vmcb-asid]\n"
251 " [--get-vmcb-exit-details]\n"
252 " [--get-vmcb-tlb-ctrl]\n"
253 " [--get-vmcb-virq]\n"
254 " [--get-avic-apic-bar]\n"
255 " [--get-avic-backing-page]\n"
256 " [--get-avic-table]\n"
257 );
258 }
259 exit(1);
260 }
261
262 static int get_rtc_time, set_rtc_time;
263 static int get_rtc_nvram, set_rtc_nvram;
264 static int rtc_nvram_offset;
265 static uint8_t rtc_nvram_value;
266 static time_t rtc_secs;
267
268 static int get_stats, getcap, setcap, capval, get_gpa_pmap;
269 static int inject_nmi, assert_lapic_lvt;
270 static int force_reset, force_poweroff;
271 static const char *capname;
272 static int create, destroy, get_memmap, get_memseg;
273 static int get_intinfo;
274 static int get_active_cpus, get_debug_cpus;
275 static uint64_t memsize;
276 static int set_cr0, get_cr0, set_cr2, get_cr2, set_cr3, get_cr3;
277 static int set_cr4, get_cr4;
278 static int set_efer, get_efer;
279 static int set_dr0, get_dr0;
280 static int set_dr1, get_dr1;
281 static int set_dr2, get_dr2;
282 static int set_dr3, get_dr3;
283 static int set_dr6, get_dr6;
284 static int set_dr7, get_dr7;
285 static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags;
286 static int set_rax, get_rax;
287 static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp;
288 static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15;
289 static int set_desc_ds, get_desc_ds;
290 static int set_desc_es, get_desc_es;
291 static int set_desc_fs, get_desc_fs;
292 static int set_desc_gs, get_desc_gs;
293 static int set_desc_cs, get_desc_cs;
294 static int set_desc_ss, get_desc_ss;
295 static int set_desc_gdtr, get_desc_gdtr;
296 static int set_desc_idtr, get_desc_idtr;
297 static int set_desc_tr, get_desc_tr;
298 static int set_desc_ldtr, get_desc_ldtr;
299 static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr;
300 static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr;
301 static int set_x2apic_state, get_x2apic_state;
302 static enum x2apic_state x2apic_state;
303 static int run;
304 static int do_pause, do_resume;
305 static int get_cpu_topology;
306 static int pmtmr_port;
307 static int wrlock_cycle;
308 static int get_fpu;
309
310 /*
311 * VMCB specific.
312 */
313 static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl;
314 static int get_vmcb_virq, get_avic_table;
315
316 /*
317 * VMCS-specific fields
318 */
319 static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2;
320 static int get_eptp, get_io_bitmap, get_tsc_offset;
321 static int get_vmcs_entry_interruption_info, set_vmcs_entry_interruption_info;
322 static int get_vmcs_interruptibility;
323 uint32_t vmcs_entry_interruption_info;
324 static int get_vmcs_gpa, get_vmcs_gla;
325 static int get_exception_bitmap, set_exception_bitmap, exception_bitmap;
326 static int get_cr0_mask, get_cr0_shadow;
327 static int get_cr4_mask, get_cr4_shadow;
328 static int get_cr3_targets;
329 static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold;
330 static int get_msr_bitmap, get_msr_bitmap_address;
331 static int get_guest_msrs;
332 static int get_vpid_asid;
333 static int get_inst_err, get_exit_ctls, get_entry_ctls;
334 static int get_host_cr0, get_host_cr3, get_host_cr4;
335 static int get_host_rip, get_host_rsp;
336 static int get_host_pat;
337 static int get_vmcs_link;
338 static int get_exit_reason, get_vmcs_exit_qualification;
339 static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error;
340 static int get_vmcs_exit_inst_length;
341
342 static uint64_t desc_base;
343 static uint32_t desc_limit, desc_access;
344
345 static int get_all;
346
347 static void
dump_vm_run_exitcode(struct vm_exit * vmexit,int vcpu)348 dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu)
349 {
350 printf("vm exit[%d]\n", vcpu);
351 printf("\trip\t\t0x%016lx\n", vmexit->rip);
352 printf("\tinst_length\t%d\n", vmexit->inst_length);
353 switch (vmexit->exitcode) {
354 case VM_EXITCODE_INOUT:
355 printf("\treason\t\tINOUT\n");
356 printf("\tdirection\t%s\n",
357 (vmexit->u.inout.flags & INOUT_IN) ? "IN" : "OUT");
358 printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes);
359 printf("\tport\t\t0x%04x\n", vmexit->u.inout.port);
360 printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax);
361 break;
362 case VM_EXITCODE_MMIO:
363 printf("\treason\t\tMMIO\n");
364 printf("\toperation\t%s\n",
365 vmexit->u.mmio.read ? "READ" : "WRITE");
366 printf("\tbytes\t\t%d\n", vmexit->u.mmio.bytes);
367 printf("\tgpa\t\t0x%08x\n", vmexit->u.mmio.gpa);
368 printf("\tdata\t\t0x%08x\n", vmexit->u.mmio.data);
369 break;
370 case VM_EXITCODE_VMX:
371 printf("\treason\t\tVMX\n");
372 printf("\tstatus\t\t%d\n", vmexit->u.vmx.status);
373 printf("\texit_reason\t0x%08x (%u)\n",
374 vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason);
375 printf("\tqualification\t0x%016lx\n",
376 vmexit->u.vmx.exit_qualification);
377 printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type);
378 printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error);
379 break;
380 case VM_EXITCODE_SVM:
381 printf("\treason\t\tSVM\n");
382 printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode);
383 printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1);
384 printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2);
385 break;
386 default:
387 printf("*** unknown vm run exitcode %d\n", vmexit->exitcode);
388 break;
389 }
390 }
391
392 /* AMD 6th generation and Intel compatible MSRs */
393 #define MSR_AMD6TH_START 0xC0000000
394 #define MSR_AMD6TH_END 0xC0001FFF
395 /* AMD 7th and 8th generation compatible MSRs */
396 #define MSR_AMD7TH_START 0xC0010000
397 #define MSR_AMD7TH_END 0xC0011FFF
398
399 /* Until a safe method is created, arbitrary VMCS reads/writes are forbidden */
400 static int
vm_get_vmcs_field(struct vcpu * vcpu,int field,uint64_t * ret_val)401 vm_get_vmcs_field(struct vcpu *vcpu, int field, uint64_t *ret_val)
402 {
403 *ret_val = 0;
404 return (0);
405 }
406
407 static int
vm_set_vmcs_field(struct vcpu * vcpu,int field,uint64_t val)408 vm_set_vmcs_field(struct vcpu *vcpu, int field, uint64_t val)
409 {
410 return (EINVAL);
411 }
412
413 /* Until a safe method is created, arbitrary VMCB reads/writes are forbidden */
414 static int
vm_get_vmcb_field(struct vcpu * vcpu,int off,int bytes,uint64_t * ret_val)415 vm_get_vmcb_field(struct vcpu *vcpu, int off, int bytes,
416 uint64_t *ret_val)
417 {
418 *ret_val = 0;
419 return (0);
420 }
421
422 static int
vm_set_vmcb_field(struct vcpu * vcpu,int off,int bytes,uint64_t val)423 vm_set_vmcb_field(struct vcpu *vcpu, int off, int bytes,
424 uint64_t val)
425 {
426 return (EINVAL);
427 }
428
429 enum {
430 VMNAME = 1000, /* avoid collision with return values from getopt */
431 VCPU,
432 SET_MEM,
433 SET_EFER,
434 SET_CR0,
435 SET_CR2,
436 SET_CR3,
437 SET_CR4,
438 SET_DR0,
439 SET_DR1,
440 SET_DR2,
441 SET_DR3,
442 SET_DR6,
443 SET_DR7,
444 SET_RSP,
445 SET_RIP,
446 SET_RAX,
447 SET_RFLAGS,
448 DESC_BASE,
449 DESC_LIMIT,
450 DESC_ACCESS,
451 SET_CS,
452 SET_DS,
453 SET_ES,
454 SET_FS,
455 SET_GS,
456 SET_SS,
457 SET_TR,
458 SET_LDTR,
459 SET_X2APIC_STATE,
460 SET_EXCEPTION_BITMAP,
461 SET_VMCS_ENTRY_INTERRUPTION_INFO,
462 SET_CAP,
463 CAPNAME,
464 UNASSIGN_PPTDEV,
465 GET_GPA_PMAP,
466 ASSERT_LAPIC_LVT,
467 SET_RTC_TIME,
468 SET_RTC_NVRAM,
469 RTC_NVRAM_OFFSET,
470 PMTMR_PORT,
471 };
472
473 static void
print_cpus(const char * banner,const cpuset_t * cpus)474 print_cpus(const char *banner, const cpuset_t *cpus)
475 {
476 int i;
477 int first;
478
479 first = 1;
480 printf("%s:\t", banner);
481 if (!CPU_EMPTY(cpus)) {
482 for (i = 0; i < CPU_SETSIZE; i++) {
483 if (CPU_ISSET(i, cpus)) {
484 printf("%s%d", first ? " " : ", ", i);
485 first = 0;
486 }
487 }
488 } else
489 printf(" (none)");
490 printf("\n");
491 }
492
493 static void
print_intinfo(const char * banner,uint64_t info)494 print_intinfo(const char *banner, uint64_t info)
495 {
496 printf("%s:\t", banner);
497 if (VM_INTINFO_PENDING(info)) {
498 switch (VM_INTINFO_TYPE(info)) {
499 case VM_INTINFO_HWINTR:
500 printf("extint");
501 break;
502 case VM_INTINFO_NMI:
503 printf("nmi");
504 break;
505 case VM_INTINFO_SWINTR:
506 printf("swint");
507 break;
508 default:
509 printf("exception");
510 break;
511 }
512 printf(" vector %hhd", VM_INTINFO_VECTOR(info));
513 if (VM_INTINFO_HAS_ERRCODE(info)) {
514 printf(" errcode %#x", VM_INTINFO_ERRCODE(info));
515 }
516 } else {
517 printf("n/a");
518 }
519 printf("\n");
520 }
521
522 static bool
cpu_vendor_intel(void)523 cpu_vendor_intel(void)
524 {
525 u_int regs[4], v[3];
526
527 do_cpuid(0, regs);
528 v[0] = regs[1];
529 v[1] = regs[3];
530 v[2] = regs[2];
531
532 if (memcmp(v, "GenuineIntel", sizeof(v)) == 0)
533 return (true);
534 if (memcmp(v, "AuthenticAMD", sizeof(v)) == 0 ||
535 memcmp(v, "HygonGenuine", sizeof(v)) == 0)
536 return (false);
537 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", (const char *)v);
538 exit(1);
539 }
540
541 static int
get_all_registers(struct vcpu * vcpu)542 get_all_registers(struct vcpu *vcpu)
543 {
544 uint64_t cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7;
545 uint64_t rsp, rip, rflags, efer;
546 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp;
547 uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
548 int vcpuid = vcpu_id(vcpu);
549 int error = 0;
550
551 if (!error && (get_efer || get_all)) {
552 error = vm_get_register(vcpu, VM_REG_GUEST_EFER, &efer);
553 if (error == 0)
554 printf("efer[%d]\t\t0x%016lx\n", vcpuid, efer);
555 }
556
557 if (!error && (get_cr0 || get_all)) {
558 error = vm_get_register(vcpu, VM_REG_GUEST_CR0, &cr0);
559 if (error == 0)
560 printf("cr0[%d]\t\t0x%016lx\n", vcpuid, cr0);
561 }
562
563 if (!error && (get_cr2 || get_all)) {
564 error = vm_get_register(vcpu, VM_REG_GUEST_CR2, &cr2);
565 if (error == 0)
566 printf("cr2[%d]\t\t0x%016lx\n", vcpuid, cr2);
567 }
568
569 if (!error && (get_cr3 || get_all)) {
570 error = vm_get_register(vcpu, VM_REG_GUEST_CR3, &cr3);
571 if (error == 0)
572 printf("cr3[%d]\t\t0x%016lx\n", vcpuid, cr3);
573 }
574
575 if (!error && (get_cr4 || get_all)) {
576 error = vm_get_register(vcpu, VM_REG_GUEST_CR4, &cr4);
577 if (error == 0)
578 printf("cr4[%d]\t\t0x%016lx\n", vcpuid, cr4);
579 }
580
581 if (!error && (get_dr0 || get_all)) {
582 error = vm_get_register(vcpu, VM_REG_GUEST_DR0, &dr0);
583 if (error == 0)
584 printf("dr0[%d]\t\t0x%016lx\n", vcpuid, dr0);
585 }
586
587 if (!error && (get_dr1 || get_all)) {
588 error = vm_get_register(vcpu, VM_REG_GUEST_DR1, &dr1);
589 if (error == 0)
590 printf("dr1[%d]\t\t0x%016lx\n", vcpuid, dr1);
591 }
592
593 if (!error && (get_dr2 || get_all)) {
594 error = vm_get_register(vcpu, VM_REG_GUEST_DR2, &dr2);
595 if (error == 0)
596 printf("dr2[%d]\t\t0x%016lx\n", vcpuid, dr2);
597 }
598
599 if (!error && (get_dr3 || get_all)) {
600 error = vm_get_register(vcpu, VM_REG_GUEST_DR3, &dr3);
601 if (error == 0)
602 printf("dr3[%d]\t\t0x%016lx\n", vcpuid, dr3);
603 }
604
605 if (!error && (get_dr6 || get_all)) {
606 error = vm_get_register(vcpu, VM_REG_GUEST_DR6, &dr6);
607 if (error == 0)
608 printf("dr6[%d]\t\t0x%016lx\n", vcpuid, dr6);
609 }
610
611 if (!error && (get_dr7 || get_all)) {
612 error = vm_get_register(vcpu, VM_REG_GUEST_DR7, &dr7);
613 if (error == 0)
614 printf("dr7[%d]\t\t0x%016lx\n", vcpuid, dr7);
615 }
616
617 if (!error && (get_rsp || get_all)) {
618 error = vm_get_register(vcpu, VM_REG_GUEST_RSP, &rsp);
619 if (error == 0)
620 printf("rsp[%d]\t\t0x%016lx\n", vcpuid, rsp);
621 }
622
623 if (!error && (get_rip || get_all)) {
624 error = vm_get_register(vcpu, VM_REG_GUEST_RIP, &rip);
625 if (error == 0)
626 printf("rip[%d]\t\t0x%016lx\n", vcpuid, rip);
627 }
628
629 if (!error && (get_rax || get_all)) {
630 error = vm_get_register(vcpu, VM_REG_GUEST_RAX, &rax);
631 if (error == 0)
632 printf("rax[%d]\t\t0x%016lx\n", vcpuid, rax);
633 }
634
635 if (!error && (get_rbx || get_all)) {
636 error = vm_get_register(vcpu, VM_REG_GUEST_RBX, &rbx);
637 if (error == 0)
638 printf("rbx[%d]\t\t0x%016lx\n", vcpuid, rbx);
639 }
640
641 if (!error && (get_rcx || get_all)) {
642 error = vm_get_register(vcpu, VM_REG_GUEST_RCX, &rcx);
643 if (error == 0)
644 printf("rcx[%d]\t\t0x%016lx\n", vcpuid, rcx);
645 }
646
647 if (!error && (get_rdx || get_all)) {
648 error = vm_get_register(vcpu, VM_REG_GUEST_RDX, &rdx);
649 if (error == 0)
650 printf("rdx[%d]\t\t0x%016lx\n", vcpuid, rdx);
651 }
652
653 if (!error && (get_rsi || get_all)) {
654 error = vm_get_register(vcpu, VM_REG_GUEST_RSI, &rsi);
655 if (error == 0)
656 printf("rsi[%d]\t\t0x%016lx\n", vcpuid, rsi);
657 }
658
659 if (!error && (get_rdi || get_all)) {
660 error = vm_get_register(vcpu, VM_REG_GUEST_RDI, &rdi);
661 if (error == 0)
662 printf("rdi[%d]\t\t0x%016lx\n", vcpuid, rdi);
663 }
664
665 if (!error && (get_rbp || get_all)) {
666 error = vm_get_register(vcpu, VM_REG_GUEST_RBP, &rbp);
667 if (error == 0)
668 printf("rbp[%d]\t\t0x%016lx\n", vcpuid, rbp);
669 }
670
671 if (!error && (get_r8 || get_all)) {
672 error = vm_get_register(vcpu, VM_REG_GUEST_R8, &r8);
673 if (error == 0)
674 printf("r8[%d]\t\t0x%016lx\n", vcpuid, r8);
675 }
676
677 if (!error && (get_r9 || get_all)) {
678 error = vm_get_register(vcpu, VM_REG_GUEST_R9, &r9);
679 if (error == 0)
680 printf("r9[%d]\t\t0x%016lx\n", vcpuid, r9);
681 }
682
683 if (!error && (get_r10 || get_all)) {
684 error = vm_get_register(vcpu, VM_REG_GUEST_R10, &r10);
685 if (error == 0)
686 printf("r10[%d]\t\t0x%016lx\n", vcpuid, r10);
687 }
688
689 if (!error && (get_r11 || get_all)) {
690 error = vm_get_register(vcpu, VM_REG_GUEST_R11, &r11);
691 if (error == 0)
692 printf("r11[%d]\t\t0x%016lx\n", vcpuid, r11);
693 }
694
695 if (!error && (get_r12 || get_all)) {
696 error = vm_get_register(vcpu, VM_REG_GUEST_R12, &r12);
697 if (error == 0)
698 printf("r12[%d]\t\t0x%016lx\n", vcpuid, r12);
699 }
700
701 if (!error && (get_r13 || get_all)) {
702 error = vm_get_register(vcpu, VM_REG_GUEST_R13, &r13);
703 if (error == 0)
704 printf("r13[%d]\t\t0x%016lx\n", vcpuid, r13);
705 }
706
707 if (!error && (get_r14 || get_all)) {
708 error = vm_get_register(vcpu, VM_REG_GUEST_R14, &r14);
709 if (error == 0)
710 printf("r14[%d]\t\t0x%016lx\n", vcpuid, r14);
711 }
712
713 if (!error && (get_r15 || get_all)) {
714 error = vm_get_register(vcpu, VM_REG_GUEST_R15, &r15);
715 if (error == 0)
716 printf("r15[%d]\t\t0x%016lx\n", vcpuid, r15);
717 }
718
719 if (!error && (get_rflags || get_all)) {
720 error = vm_get_register(vcpu, VM_REG_GUEST_RFLAGS,
721 &rflags);
722 if (error == 0)
723 printf("rflags[%d]\t0x%016lx\n", vcpuid, rflags);
724 }
725
726 return (error);
727 }
728
729 static int
get_all_segments(struct vcpu * vcpu)730 get_all_segments(struct vcpu *vcpu)
731 {
732 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr;
733 int vcpuid = vcpu_id(vcpu);
734 int error = 0;
735
736 if (!error && (get_desc_ds || get_all)) {
737 error = vm_get_desc(vcpu, VM_REG_GUEST_DS,
738 &desc_base, &desc_limit, &desc_access);
739 if (error == 0) {
740 printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
741 vcpuid, desc_base, desc_limit, desc_access);
742 }
743 }
744
745 if (!error && (get_desc_es || get_all)) {
746 error = vm_get_desc(vcpu, VM_REG_GUEST_ES,
747 &desc_base, &desc_limit, &desc_access);
748 if (error == 0) {
749 printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
750 vcpuid, desc_base, desc_limit, desc_access);
751 }
752 }
753
754 if (!error && (get_desc_fs || get_all)) {
755 error = vm_get_desc(vcpu, VM_REG_GUEST_FS,
756 &desc_base, &desc_limit, &desc_access);
757 if (error == 0) {
758 printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
759 vcpuid, desc_base, desc_limit, desc_access);
760 }
761 }
762
763 if (!error && (get_desc_gs || get_all)) {
764 error = vm_get_desc(vcpu, VM_REG_GUEST_GS,
765 &desc_base, &desc_limit, &desc_access);
766 if (error == 0) {
767 printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
768 vcpuid, desc_base, desc_limit, desc_access);
769 }
770 }
771
772 if (!error && (get_desc_ss || get_all)) {
773 error = vm_get_desc(vcpu, VM_REG_GUEST_SS,
774 &desc_base, &desc_limit, &desc_access);
775 if (error == 0) {
776 printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
777 vcpuid, desc_base, desc_limit, desc_access);
778 }
779 }
780
781 if (!error && (get_desc_cs || get_all)) {
782 error = vm_get_desc(vcpu, VM_REG_GUEST_CS,
783 &desc_base, &desc_limit, &desc_access);
784 if (error == 0) {
785 printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
786 vcpuid, desc_base, desc_limit, desc_access);
787 }
788 }
789
790 if (!error && (get_desc_tr || get_all)) {
791 error = vm_get_desc(vcpu, VM_REG_GUEST_TR,
792 &desc_base, &desc_limit, &desc_access);
793 if (error == 0) {
794 printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
795 vcpuid, desc_base, desc_limit, desc_access);
796 }
797 }
798
799 if (!error && (get_desc_ldtr || get_all)) {
800 error = vm_get_desc(vcpu, VM_REG_GUEST_LDTR,
801 &desc_base, &desc_limit, &desc_access);
802 if (error == 0) {
803 printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
804 vcpuid, desc_base, desc_limit, desc_access);
805 }
806 }
807
808 if (!error && (get_desc_gdtr || get_all)) {
809 error = vm_get_desc(vcpu, VM_REG_GUEST_GDTR,
810 &desc_base, &desc_limit, &desc_access);
811 if (error == 0) {
812 printf("gdtr[%d]\t\t0x%016lx/0x%08x\n",
813 vcpuid, desc_base, desc_limit);
814 }
815 }
816
817 if (!error && (get_desc_idtr || get_all)) {
818 error = vm_get_desc(vcpu, VM_REG_GUEST_IDTR,
819 &desc_base, &desc_limit, &desc_access);
820 if (error == 0) {
821 printf("idtr[%d]\t\t0x%016lx/0x%08x\n",
822 vcpuid, desc_base, desc_limit);
823 }
824 }
825
826 if (!error && (get_cs || get_all)) {
827 error = vm_get_register(vcpu, VM_REG_GUEST_CS, &cs);
828 if (error == 0)
829 printf("cs[%d]\t\t0x%04lx\n", vcpuid, cs);
830 }
831
832 if (!error && (get_ds || get_all)) {
833 error = vm_get_register(vcpu, VM_REG_GUEST_DS, &ds);
834 if (error == 0)
835 printf("ds[%d]\t\t0x%04lx\n", vcpuid, ds);
836 }
837
838 if (!error && (get_es || get_all)) {
839 error = vm_get_register(vcpu, VM_REG_GUEST_ES, &es);
840 if (error == 0)
841 printf("es[%d]\t\t0x%04lx\n", vcpuid, es);
842 }
843
844 if (!error && (get_fs || get_all)) {
845 error = vm_get_register(vcpu, VM_REG_GUEST_FS, &fs);
846 if (error == 0)
847 printf("fs[%d]\t\t0x%04lx\n", vcpuid, fs);
848 }
849
850 if (!error && (get_gs || get_all)) {
851 error = vm_get_register(vcpu, VM_REG_GUEST_GS, &gs);
852 if (error == 0)
853 printf("gs[%d]\t\t0x%04lx\n", vcpuid, gs);
854 }
855
856 if (!error && (get_ss || get_all)) {
857 error = vm_get_register(vcpu, VM_REG_GUEST_SS, &ss);
858 if (error == 0)
859 printf("ss[%d]\t\t0x%04lx\n", vcpuid, ss);
860 }
861
862 if (!error && (get_tr || get_all)) {
863 error = vm_get_register(vcpu, VM_REG_GUEST_TR, &tr);
864 if (error == 0)
865 printf("tr[%d]\t\t0x%04lx\n", vcpuid, tr);
866 }
867
868 if (!error && (get_ldtr || get_all)) {
869 error = vm_get_register(vcpu, VM_REG_GUEST_LDTR, &ldtr);
870 if (error == 0)
871 printf("ldtr[%d]\t\t0x%04lx\n", vcpuid, ldtr);
872 }
873
874 return (error);
875 }
876
877 static int
get_misc_vmcs(struct vcpu * vcpu)878 get_misc_vmcs(struct vcpu *vcpu)
879 {
880 uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64;
881 int vcpuid = vcpu_id(vcpu);
882 int error = 0;
883
884 if (!error && (get_cr0_mask || get_all)) {
885 uint64_t cr0mask;
886 error = vm_get_vmcs_field(vcpu, VMCS_CR0_MASK, &cr0mask);
887 if (error == 0)
888 printf("cr0_mask[%d]\t\t0x%016lx\n", vcpuid, cr0mask);
889 }
890
891 if (!error && (get_cr0_shadow || get_all)) {
892 uint64_t cr0shadow;
893 error = vm_get_vmcs_field(vcpu, VMCS_CR0_SHADOW,
894 &cr0shadow);
895 if (error == 0) {
896 printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpuid,
897 cr0shadow);
898 }
899 }
900
901 if (!error && (get_cr4_mask || get_all)) {
902 uint64_t cr4mask;
903 error = vm_get_vmcs_field(vcpu, VMCS_CR4_MASK, &cr4mask);
904 if (error == 0) {
905 printf("cr4_mask[%d]\t\t0x%016lx\n", vcpuid,
906 cr4mask);
907 }
908 }
909
910 if (!error && (get_cr4_shadow || get_all)) {
911 uint64_t cr4shadow;
912 error = vm_get_vmcs_field(vcpu, VMCS_CR4_SHADOW,
913 &cr4shadow);
914 if (error == 0)
915 printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpuid, cr4shadow);
916 }
917
918 if (!error && (get_cr3_targets || get_all)) {
919 uint64_t target_count, target_addr;
920 error = vm_get_vmcs_field(vcpu, VMCS_CR3_TARGET_COUNT,
921 &target_count);
922 if (error == 0) {
923 printf("cr3_target_count[%d]\t0x%016lx\n",
924 vcpuid, target_count);
925 }
926
927 error = vm_get_vmcs_field(vcpu, VMCS_CR3_TARGET0,
928 &target_addr);
929 if (error == 0) {
930 printf("cr3_target0[%d]\t\t0x%016lx\n",
931 vcpuid, target_addr);
932 }
933
934 error = vm_get_vmcs_field(vcpu, VMCS_CR3_TARGET1,
935 &target_addr);
936 if (error == 0) {
937 printf("cr3_target1[%d]\t\t0x%016lx\n",
938 vcpuid, target_addr);
939 }
940
941 error = vm_get_vmcs_field(vcpu, VMCS_CR3_TARGET2,
942 &target_addr);
943 if (error == 0) {
944 printf("cr3_target2[%d]\t\t0x%016lx\n",
945 vcpuid, target_addr);
946 }
947
948 error = vm_get_vmcs_field(vcpu, VMCS_CR3_TARGET3,
949 &target_addr);
950 if (error == 0) {
951 printf("cr3_target3[%d]\t\t0x%016lx\n",
952 vcpuid, target_addr);
953 }
954 }
955
956 if (!error && (get_pinbased_ctls || get_all)) {
957 error = vm_get_vmcs_field(vcpu, VMCS_PIN_BASED_CTLS, &ctl);
958 if (error == 0)
959 printf("pinbased_ctls[%d]\t0x%016lx\n", vcpuid, ctl);
960 }
961
962 if (!error && (get_procbased_ctls || get_all)) {
963 error = vm_get_vmcs_field(vcpu,
964 VMCS_PRI_PROC_BASED_CTLS, &ctl);
965 if (error == 0)
966 printf("procbased_ctls[%d]\t0x%016lx\n", vcpuid, ctl);
967 }
968
969 if (!error && (get_procbased_ctls2 || get_all)) {
970 error = vm_get_vmcs_field(vcpu,
971 VMCS_SEC_PROC_BASED_CTLS, &ctl);
972 if (error == 0)
973 printf("procbased_ctls2[%d]\t0x%016lx\n", vcpuid, ctl);
974 }
975
976 if (!error && (get_vmcs_gla || get_all)) {
977 error = vm_get_vmcs_field(vcpu,
978 VMCS_GUEST_LINEAR_ADDRESS, &u64);
979 if (error == 0)
980 printf("gla[%d]\t\t0x%016lx\n", vcpuid, u64);
981 }
982
983 if (!error && (get_vmcs_gpa || get_all)) {
984 error = vm_get_vmcs_field(vcpu,
985 VMCS_GUEST_PHYSICAL_ADDRESS, &u64);
986 if (error == 0)
987 printf("gpa[%d]\t\t0x%016lx\n", vcpuid, u64);
988 }
989
990 if (!error && (get_vmcs_entry_interruption_info ||
991 get_all)) {
992 error = vm_get_vmcs_field(vcpu, VMCS_ENTRY_INTR_INFO,&u64);
993 if (error == 0) {
994 printf("entry_interruption_info[%d]\t0x%016lx\n",
995 vcpuid, u64);
996 }
997 }
998
999 if (!error && (get_tpr_threshold || get_all)) {
1000 uint64_t threshold;
1001 error = vm_get_vmcs_field(vcpu, VMCS_TPR_THRESHOLD,
1002 &threshold);
1003 if (error == 0)
1004 printf("tpr_threshold[%d]\t0x%016lx\n", vcpuid, threshold);
1005 }
1006
1007 if (!error && (get_inst_err || get_all)) {
1008 uint64_t insterr;
1009 error = vm_get_vmcs_field(vcpu, VMCS_INSTRUCTION_ERROR,
1010 &insterr);
1011 if (error == 0) {
1012 printf("instruction_error[%d]\t0x%016lx\n",
1013 vcpuid, insterr);
1014 }
1015 }
1016
1017 if (!error && (get_exit_ctls || get_all)) {
1018 error = vm_get_vmcs_field(vcpu, VMCS_EXIT_CTLS, &ctl);
1019 if (error == 0)
1020 printf("exit_ctls[%d]\t\t0x%016lx\n", vcpuid, ctl);
1021 }
1022
1023 if (!error && (get_entry_ctls || get_all)) {
1024 error = vm_get_vmcs_field(vcpu, VMCS_ENTRY_CTLS, &ctl);
1025 if (error == 0)
1026 printf("entry_ctls[%d]\t\t0x%016lx\n", vcpuid, ctl);
1027 }
1028
1029 if (!error && (get_host_pat || get_all)) {
1030 error = vm_get_vmcs_field(vcpu, VMCS_HOST_IA32_PAT, &pat);
1031 if (error == 0)
1032 printf("host_pat[%d]\t\t0x%016lx\n", vcpuid, pat);
1033 }
1034
1035 if (!error && (get_host_cr0 || get_all)) {
1036 error = vm_get_vmcs_field(vcpu, VMCS_HOST_CR0, &cr0);
1037 if (error == 0)
1038 printf("host_cr0[%d]\t\t0x%016lx\n", vcpuid, cr0);
1039 }
1040
1041 if (!error && (get_host_cr3 || get_all)) {
1042 error = vm_get_vmcs_field(vcpu, VMCS_HOST_CR3, &cr3);
1043 if (error == 0)
1044 printf("host_cr3[%d]\t\t0x%016lx\n", vcpuid, cr3);
1045 }
1046
1047 if (!error && (get_host_cr4 || get_all)) {
1048 error = vm_get_vmcs_field(vcpu, VMCS_HOST_CR4, &cr4);
1049 if (error == 0)
1050 printf("host_cr4[%d]\t\t0x%016lx\n", vcpuid, cr4);
1051 }
1052
1053 if (!error && (get_host_rip || get_all)) {
1054 error = vm_get_vmcs_field(vcpu, VMCS_HOST_RIP, &rip);
1055 if (error == 0)
1056 printf("host_rip[%d]\t\t0x%016lx\n", vcpuid, rip);
1057 }
1058
1059 if (!error && (get_host_rsp || get_all)) {
1060 error = vm_get_vmcs_field(vcpu, VMCS_HOST_RSP, &rsp);
1061 if (error == 0)
1062 printf("host_rsp[%d]\t\t0x%016lx\n", vcpuid, rsp);
1063 }
1064
1065 if (!error && (get_vmcs_link || get_all)) {
1066 error = vm_get_vmcs_field(vcpu, VMCS_LINK_POINTER, &addr);
1067 if (error == 0)
1068 printf("vmcs_pointer[%d]\t0x%016lx\n", vcpuid, addr);
1069 }
1070
1071 if (!error && (get_vmcs_exit_interruption_info || get_all)) {
1072 error = vm_get_vmcs_field(vcpu, VMCS_EXIT_INTR_INFO, &u64);
1073 if (error == 0) {
1074 printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n",
1075 vcpuid, u64);
1076 }
1077 }
1078
1079 if (!error && (get_vmcs_exit_interruption_error || get_all)) {
1080 error = vm_get_vmcs_field(vcpu, VMCS_EXIT_INTR_ERRCODE,
1081 &u64);
1082 if (error == 0) {
1083 printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n",
1084 vcpuid, u64);
1085 }
1086 }
1087
1088 if (!error && (get_vmcs_interruptibility || get_all)) {
1089 error = vm_get_vmcs_field(vcpu,
1090 VMCS_GUEST_INTERRUPTIBILITY, &u64);
1091 if (error == 0) {
1092 printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n",
1093 vcpuid, u64);
1094 }
1095 }
1096
1097 if (!error && (get_vmcs_exit_inst_length || get_all)) {
1098 error = vm_get_vmcs_field(vcpu,
1099 VMCS_EXIT_INSTRUCTION_LENGTH, &u64);
1100 if (error == 0)
1101 printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpuid,
1102 (uint32_t)u64);
1103 }
1104
1105 if (!error && (get_vmcs_exit_qualification || get_all)) {
1106 error = vm_get_vmcs_field(vcpu, VMCS_EXIT_QUALIFICATION,
1107 &u64);
1108 if (error == 0)
1109 printf("vmcs_exit_qualification[%d]\t0x%016lx\n",
1110 vcpuid, u64);
1111 }
1112
1113 return (error);
1114 }
1115
1116 static int
get_misc_vmcb(struct vcpu * vcpu)1117 get_misc_vmcb(struct vcpu *vcpu)
1118 {
1119 uint64_t ctl, addr;
1120 int vcpuid = vcpu_id(vcpu);
1121 int error = 0;
1122
1123 if (!error && (get_vmcb_intercept || get_all)) {
1124 error = vm_get_vmcb_field(vcpu, VMCB_OFF_CR_INTERCEPT, 4,
1125 &ctl);
1126 if (error == 0)
1127 printf("cr_intercept[%d]\t0x%08x\n", vcpuid, (int)ctl);
1128
1129 error = vm_get_vmcb_field(vcpu, VMCB_OFF_DR_INTERCEPT, 4,
1130 &ctl);
1131 if (error == 0)
1132 printf("dr_intercept[%d]\t0x%08x\n", vcpuid, (int)ctl);
1133
1134 error = vm_get_vmcb_field(vcpu, VMCB_OFF_EXC_INTERCEPT, 4,
1135 &ctl);
1136 if (error == 0)
1137 printf("exc_intercept[%d]\t0x%08x\n", vcpuid, (int)ctl);
1138
1139 error = vm_get_vmcb_field(vcpu, VMCB_OFF_INST1_INTERCEPT,
1140 4, &ctl);
1141 if (error == 0)
1142 printf("inst1_intercept[%d]\t0x%08x\n", vcpuid, (int)ctl);
1143
1144 error = vm_get_vmcb_field(vcpu, VMCB_OFF_INST2_INTERCEPT,
1145 4, &ctl);
1146 if (error == 0)
1147 printf("inst2_intercept[%d]\t0x%08x\n", vcpuid, (int)ctl);
1148 }
1149
1150 if (!error && (get_vmcb_tlb_ctrl || get_all)) {
1151 error = vm_get_vmcb_field(vcpu, VMCB_OFF_TLB_CTRL,
1152 4, &ctl);
1153 if (error == 0)
1154 printf("TLB ctrl[%d]\t0x%016lx\n", vcpuid, ctl);
1155 }
1156
1157 if (!error && (get_vmcb_exit_details || get_all)) {
1158 error = vm_get_vmcb_field(vcpu, VMCB_OFF_EXITINFO1,
1159 8, &ctl);
1160 if (error == 0)
1161 printf("exitinfo1[%d]\t0x%016lx\n", vcpuid, ctl);
1162 error = vm_get_vmcb_field(vcpu, VMCB_OFF_EXITINFO2,
1163 8, &ctl);
1164 if (error == 0)
1165 printf("exitinfo2[%d]\t0x%016lx\n", vcpuid, ctl);
1166 error = vm_get_vmcb_field(vcpu, VMCB_OFF_EXITINTINFO,
1167 8, &ctl);
1168 if (error == 0)
1169 printf("exitintinfo[%d]\t0x%016lx\n", vcpuid, ctl);
1170 }
1171
1172 if (!error && (get_vmcb_virq || get_all)) {
1173 error = vm_get_vmcb_field(vcpu, VMCB_OFF_VIRQ,
1174 8, &ctl);
1175 if (error == 0)
1176 printf("v_irq/tpr[%d]\t0x%016lx\n", vcpuid, ctl);
1177 }
1178
1179 if (!error && (get_apic_access_addr || get_all)) {
1180 error = vm_get_vmcb_field(vcpu, VMCB_OFF_AVIC_BAR, 8,
1181 &addr);
1182 if (error == 0)
1183 printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpuid, addr);
1184 }
1185
1186 if (!error && (get_virtual_apic_addr || get_all)) {
1187 error = vm_get_vmcb_field(vcpu, VMCB_OFF_AVIC_PAGE, 8,
1188 &addr);
1189 if (error == 0)
1190 printf("AVIC backing page[%d]\t0x%016lx\n", vcpuid, addr);
1191 }
1192
1193 if (!error && (get_avic_table || get_all)) {
1194 error = vm_get_vmcb_field(vcpu, VMCB_OFF_AVIC_LT, 8,
1195 &addr);
1196 if (error == 0)
1197 printf("AVIC logical table[%d]\t0x%016lx\n",
1198 vcpuid, addr);
1199 error = vm_get_vmcb_field(vcpu, VMCB_OFF_AVIC_PT, 8,
1200 &addr);
1201 if (error == 0)
1202 printf("AVIC physical table[%d]\t0x%016lx\n",
1203 vcpuid, addr);
1204 }
1205
1206 return (error);
1207 }
1208
1209 static struct option *
setup_options(bool cpu_intel)1210 setup_options(bool cpu_intel)
1211 {
1212 const struct option common_opts[] = {
1213 { "vm", REQ_ARG, 0, VMNAME },
1214 { "cpu", REQ_ARG, 0, VCPU },
1215 { "set-mem", REQ_ARG, 0, SET_MEM },
1216 { "set-efer", REQ_ARG, 0, SET_EFER },
1217 { "set-cr0", REQ_ARG, 0, SET_CR0 },
1218 { "set-cr2", REQ_ARG, 0, SET_CR2 },
1219 { "set-cr3", REQ_ARG, 0, SET_CR3 },
1220 { "set-cr4", REQ_ARG, 0, SET_CR4 },
1221 { "set-dr0", REQ_ARG, 0, SET_DR0 },
1222 { "set-dr1", REQ_ARG, 0, SET_DR1 },
1223 { "set-dr2", REQ_ARG, 0, SET_DR2 },
1224 { "set-dr3", REQ_ARG, 0, SET_DR3 },
1225 { "set-dr6", REQ_ARG, 0, SET_DR6 },
1226 { "set-dr7", REQ_ARG, 0, SET_DR7 },
1227 { "set-rsp", REQ_ARG, 0, SET_RSP },
1228 { "set-rip", REQ_ARG, 0, SET_RIP },
1229 { "set-rax", REQ_ARG, 0, SET_RAX },
1230 { "set-rflags", REQ_ARG, 0, SET_RFLAGS },
1231 { "desc-base", REQ_ARG, 0, DESC_BASE },
1232 { "desc-limit", REQ_ARG, 0, DESC_LIMIT },
1233 { "desc-access",REQ_ARG, 0, DESC_ACCESS },
1234 { "set-cs", REQ_ARG, 0, SET_CS },
1235 { "set-ds", REQ_ARG, 0, SET_DS },
1236 { "set-es", REQ_ARG, 0, SET_ES },
1237 { "set-fs", REQ_ARG, 0, SET_FS },
1238 { "set-gs", REQ_ARG, 0, SET_GS },
1239 { "set-ss", REQ_ARG, 0, SET_SS },
1240 { "set-tr", REQ_ARG, 0, SET_TR },
1241 { "set-ldtr", REQ_ARG, 0, SET_LDTR },
1242 { "set-x2apic-state",REQ_ARG, 0, SET_X2APIC_STATE },
1243 { "set-exception-bitmap",
1244 REQ_ARG, 0, SET_EXCEPTION_BITMAP },
1245 { "capname", REQ_ARG, 0, CAPNAME },
1246 { "unassign-pptdev", REQ_ARG, 0, UNASSIGN_PPTDEV },
1247 { "setcap", REQ_ARG, 0, SET_CAP },
1248 { "get-gpa-pmap", REQ_ARG, 0, GET_GPA_PMAP },
1249 { "assert-lapic-lvt", REQ_ARG, 0, ASSERT_LAPIC_LVT },
1250 { "get-rtc-time", NO_ARG, &get_rtc_time, 1 },
1251 { "set-rtc-time", REQ_ARG, 0, SET_RTC_TIME },
1252 { "rtc-nvram-offset", REQ_ARG, 0, RTC_NVRAM_OFFSET },
1253 { "get-rtc-nvram", NO_ARG, &get_rtc_nvram, 1 },
1254 { "set-rtc-nvram", REQ_ARG, 0, SET_RTC_NVRAM },
1255 { "getcap", NO_ARG, &getcap, 1 },
1256 { "get-stats", NO_ARG, &get_stats, 1 },
1257 { "get-desc-ds",NO_ARG, &get_desc_ds, 1 },
1258 { "set-desc-ds",NO_ARG, &set_desc_ds, 1 },
1259 { "get-desc-es",NO_ARG, &get_desc_es, 1 },
1260 { "set-desc-es",NO_ARG, &set_desc_es, 1 },
1261 { "get-desc-ss",NO_ARG, &get_desc_ss, 1 },
1262 { "set-desc-ss",NO_ARG, &set_desc_ss, 1 },
1263 { "get-desc-cs",NO_ARG, &get_desc_cs, 1 },
1264 { "set-desc-cs",NO_ARG, &set_desc_cs, 1 },
1265 { "get-desc-fs",NO_ARG, &get_desc_fs, 1 },
1266 { "set-desc-fs",NO_ARG, &set_desc_fs, 1 },
1267 { "get-desc-gs",NO_ARG, &get_desc_gs, 1 },
1268 { "set-desc-gs",NO_ARG, &set_desc_gs, 1 },
1269 { "get-desc-tr",NO_ARG, &get_desc_tr, 1 },
1270 { "set-desc-tr",NO_ARG, &set_desc_tr, 1 },
1271 { "set-desc-ldtr", NO_ARG, &set_desc_ldtr, 1 },
1272 { "get-desc-ldtr", NO_ARG, &get_desc_ldtr, 1 },
1273 { "set-desc-gdtr", NO_ARG, &set_desc_gdtr, 1 },
1274 { "get-desc-gdtr", NO_ARG, &get_desc_gdtr, 1 },
1275 { "set-desc-idtr", NO_ARG, &set_desc_idtr, 1 },
1276 { "get-desc-idtr", NO_ARG, &get_desc_idtr, 1 },
1277 { "get-memmap", NO_ARG, &get_memmap, 1 },
1278 { "get-memseg", NO_ARG, &get_memseg, 1 },
1279 { "get-efer", NO_ARG, &get_efer, 1 },
1280 { "get-cr0", NO_ARG, &get_cr0, 1 },
1281 { "get-cr2", NO_ARG, &get_cr2, 1 },
1282 { "get-cr3", NO_ARG, &get_cr3, 1 },
1283 { "get-cr4", NO_ARG, &get_cr4, 1 },
1284 { "get-dr0", NO_ARG, &get_dr0, 1 },
1285 { "get-dr1", NO_ARG, &get_dr1, 1 },
1286 { "get-dr2", NO_ARG, &get_dr2, 1 },
1287 { "get-dr3", NO_ARG, &get_dr3, 1 },
1288 { "get-dr6", NO_ARG, &get_dr6, 1 },
1289 { "get-dr7", NO_ARG, &get_dr7, 1 },
1290 { "get-rsp", NO_ARG, &get_rsp, 1 },
1291 { "get-rip", NO_ARG, &get_rip, 1 },
1292 { "get-rax", NO_ARG, &get_rax, 1 },
1293 { "get-rbx", NO_ARG, &get_rbx, 1 },
1294 { "get-rcx", NO_ARG, &get_rcx, 1 },
1295 { "get-rdx", NO_ARG, &get_rdx, 1 },
1296 { "get-rsi", NO_ARG, &get_rsi, 1 },
1297 { "get-rdi", NO_ARG, &get_rdi, 1 },
1298 { "get-rbp", NO_ARG, &get_rbp, 1 },
1299 { "get-r8", NO_ARG, &get_r8, 1 },
1300 { "get-r9", NO_ARG, &get_r9, 1 },
1301 { "get-r10", NO_ARG, &get_r10, 1 },
1302 { "get-r11", NO_ARG, &get_r11, 1 },
1303 { "get-r12", NO_ARG, &get_r12, 1 },
1304 { "get-r13", NO_ARG, &get_r13, 1 },
1305 { "get-r14", NO_ARG, &get_r14, 1 },
1306 { "get-r15", NO_ARG, &get_r15, 1 },
1307 { "get-rflags", NO_ARG, &get_rflags, 1 },
1308 { "get-cs", NO_ARG, &get_cs, 1 },
1309 { "get-ds", NO_ARG, &get_ds, 1 },
1310 { "get-es", NO_ARG, &get_es, 1 },
1311 { "get-fs", NO_ARG, &get_fs, 1 },
1312 { "get-gs", NO_ARG, &get_gs, 1 },
1313 { "get-ss", NO_ARG, &get_ss, 1 },
1314 { "get-tr", NO_ARG, &get_tr, 1 },
1315 { "get-ldtr", NO_ARG, &get_ldtr, 1 },
1316 { "get-eptp", NO_ARG, &get_eptp, 1 },
1317 { "get-exception-bitmap",
1318 NO_ARG, &get_exception_bitmap, 1 },
1319 { "get-io-bitmap-address",
1320 NO_ARG, &get_io_bitmap, 1 },
1321 { "get-tsc-offset", NO_ARG, &get_tsc_offset, 1 },
1322 { "get-msr-bitmap",
1323 NO_ARG, &get_msr_bitmap, 1 },
1324 { "get-msr-bitmap-address",
1325 NO_ARG, &get_msr_bitmap_address, 1 },
1326 { "get-guest-msrs", NO_ARG, &get_guest_msrs, 1 },
1327 { "get-exit-reason",
1328 NO_ARG, &get_exit_reason, 1 },
1329 { "get-x2apic-state", NO_ARG, &get_x2apic_state, 1 },
1330 { "get-all", NO_ARG, &get_all, 1 },
1331 { "run", NO_ARG, &run, 1 },
1332 { "pause", NO_ARG, &do_pause, 1 },
1333 { "resume", NO_ARG, &do_resume, 1 },
1334 { "create", NO_ARG, &create, 1 },
1335 { "destroy", NO_ARG, &destroy, 1 },
1336 { "inject-nmi", NO_ARG, &inject_nmi, 1 },
1337 { "force-reset", NO_ARG, &force_reset, 1 },
1338 { "force-poweroff", NO_ARG, &force_poweroff, 1 },
1339 { "get-active-cpus", NO_ARG, &get_active_cpus, 1 },
1340 { "get-debug-cpus", NO_ARG, &get_debug_cpus, 1 },
1341 { "get-intinfo", NO_ARG, &get_intinfo, 1 },
1342 { "get-cpu-topology", NO_ARG, &get_cpu_topology, 1 },
1343 { "pmtmr-port", REQ_ARG, 0, PMTMR_PORT },
1344 { "wrlock-cycle", NO_ARG, &wrlock_cycle, 1 },
1345 { "get-fpu", NO_ARG, &get_fpu, 1 },
1346 };
1347
1348 const struct option intel_opts[] = {
1349 { "get-vmcs-pinbased-ctls",
1350 NO_ARG, &get_pinbased_ctls, 1 },
1351 { "get-vmcs-procbased-ctls",
1352 NO_ARG, &get_procbased_ctls, 1 },
1353 { "get-vmcs-procbased-ctls2",
1354 NO_ARG, &get_procbased_ctls2, 1 },
1355 { "get-vmcs-guest-linear-address",
1356 NO_ARG, &get_vmcs_gla, 1 },
1357 { "get-vmcs-guest-physical-address",
1358 NO_ARG, &get_vmcs_gpa, 1 },
1359 { "get-vmcs-entry-interruption-info",
1360 NO_ARG, &get_vmcs_entry_interruption_info, 1},
1361 { "get-vmcs-cr0-mask", NO_ARG, &get_cr0_mask, 1 },
1362 { "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 },
1363 { "get-vmcs-cr4-mask", NO_ARG, &get_cr4_mask, 1 },
1364 { "get-vmcs-cr4-shadow", NO_ARG, &get_cr4_shadow, 1 },
1365 { "get-vmcs-cr3-targets", NO_ARG, &get_cr3_targets, 1 },
1366 { "get-vmcs-tpr-threshold",
1367 NO_ARG, &get_tpr_threshold, 1 },
1368 { "get-vmcs-vpid", NO_ARG, &get_vpid_asid, 1 },
1369 { "get-vmcs-exit-ctls", NO_ARG, &get_exit_ctls, 1 },
1370 { "get-vmcs-entry-ctls",
1371 NO_ARG, &get_entry_ctls, 1 },
1372 { "get-vmcs-instruction-error",
1373 NO_ARG, &get_inst_err, 1 },
1374 { "get-vmcs-host-pat", NO_ARG, &get_host_pat, 1 },
1375 { "get-vmcs-host-cr0",
1376 NO_ARG, &get_host_cr0, 1 },
1377 { "set-vmcs-entry-interruption-info",
1378 REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO },
1379 { "get-vmcs-exit-qualification",
1380 NO_ARG, &get_vmcs_exit_qualification, 1 },
1381 { "get-vmcs-exit-inst-length",
1382 NO_ARG, &get_vmcs_exit_inst_length, 1 },
1383 { "get-vmcs-interruptibility",
1384 NO_ARG, &get_vmcs_interruptibility, 1 },
1385 { "get-vmcs-exit-interruption-error",
1386 NO_ARG, &get_vmcs_exit_interruption_error, 1 },
1387 { "get-vmcs-exit-interruption-info",
1388 NO_ARG, &get_vmcs_exit_interruption_info, 1 },
1389 { "get-vmcs-link", NO_ARG, &get_vmcs_link, 1 },
1390 { "get-vmcs-host-cr3",
1391 NO_ARG, &get_host_cr3, 1 },
1392 { "get-vmcs-host-cr4",
1393 NO_ARG, &get_host_cr4, 1 },
1394 { "get-vmcs-host-rip",
1395 NO_ARG, &get_host_rip, 1 },
1396 { "get-vmcs-host-rsp",
1397 NO_ARG, &get_host_rsp, 1 },
1398 { "get-apic-access-address",
1399 NO_ARG, &get_apic_access_addr, 1},
1400 { "get-virtual-apic-address",
1401 NO_ARG, &get_virtual_apic_addr, 1}
1402 };
1403
1404 const struct option amd_opts[] = {
1405 { "get-vmcb-intercepts",
1406 NO_ARG, &get_vmcb_intercept, 1 },
1407 { "get-vmcb-asid",
1408 NO_ARG, &get_vpid_asid, 1 },
1409 { "get-vmcb-exit-details",
1410 NO_ARG, &get_vmcb_exit_details, 1 },
1411 { "get-vmcb-tlb-ctrl",
1412 NO_ARG, &get_vmcb_tlb_ctrl, 1 },
1413 { "get-vmcb-virq",
1414 NO_ARG, &get_vmcb_virq, 1 },
1415 { "get-avic-apic-bar",
1416 NO_ARG, &get_apic_access_addr, 1 },
1417 { "get-avic-backing-page",
1418 NO_ARG, &get_virtual_apic_addr, 1 },
1419 { "get-avic-table",
1420 NO_ARG, &get_avic_table, 1 }
1421 };
1422
1423 const struct option null_opt = {
1424 NULL, 0, NULL, 0
1425 };
1426
1427 struct option *all_opts;
1428 char *cp;
1429 int optlen;
1430
1431 optlen = sizeof(common_opts);
1432
1433 if (cpu_intel)
1434 optlen += sizeof(intel_opts);
1435 else
1436 optlen += sizeof(amd_opts);
1437
1438 optlen += sizeof(null_opt);
1439
1440 all_opts = malloc(optlen);
1441
1442 cp = (char *)all_opts;
1443 memcpy(cp, common_opts, sizeof(common_opts));
1444 cp += sizeof(common_opts);
1445
1446 if (cpu_intel) {
1447 memcpy(cp, intel_opts, sizeof(intel_opts));
1448 cp += sizeof(intel_opts);
1449 } else {
1450 memcpy(cp, amd_opts, sizeof(amd_opts));
1451 cp += sizeof(amd_opts);
1452 }
1453
1454 memcpy(cp, &null_opt, sizeof(null_opt));
1455 cp += sizeof(null_opt);
1456
1457 return (all_opts);
1458 }
1459
1460 static const char *
wday_str(int idx)1461 wday_str(int idx)
1462 {
1463 static const char *weekdays[] = {
1464 "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
1465 };
1466
1467 if (idx >= 0 && idx < 7)
1468 return (weekdays[idx]);
1469 else
1470 return ("UNK");
1471 }
1472
1473 static const char *
mon_str(int idx)1474 mon_str(int idx)
1475 {
1476 static const char *months[] = {
1477 "Jan", "Feb", "Mar", "Apr", "May", "Jun",
1478 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec"
1479 };
1480
1481 if (idx >= 0 && idx < 12)
1482 return (months[idx]);
1483 else
1484 return ("UNK");
1485 }
1486
1487 static int
show_memmap(struct vmctx * ctx)1488 show_memmap(struct vmctx *ctx)
1489 {
1490 char name[SPECNAMELEN + 1], numbuf[8];
1491 vm_ooffset_t segoff;
1492 vm_paddr_t gpa;
1493 size_t maplen, seglen;
1494 int error, flags, prot, segid, delim;
1495
1496 printf("Address Length Segment Offset ");
1497 printf("Prot Flags\n");
1498
1499 gpa = 0;
1500 while (1) {
1501 error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen,
1502 &prot, &flags);
1503 if (error)
1504 return (errno == ENOENT ? 0 : error);
1505
1506 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name));
1507 if (error)
1508 return (error);
1509
1510 printf("%-12lX", gpa);
1511 humanize_number(numbuf, sizeof(numbuf), maplen, "B",
1512 HN_AUTOSCALE, HN_NOSPACE);
1513 printf("%-12s", numbuf);
1514
1515 printf("%-12s", name[0] ? name : "sysmem");
1516 printf("%-12lX", segoff);
1517 printf("%c%c%c ", prot & PROT_READ ? 'R' : '-',
1518 prot & PROT_WRITE ? 'W' : '-',
1519 prot & PROT_EXEC ? 'X' : '-');
1520
1521 delim = '\0';
1522 if (flags & VM_MEMMAP_F_WIRED) {
1523 printf("%cwired", delim);
1524 delim = '/';
1525 }
1526 if (flags & VM_MEMMAP_F_IOMMU) {
1527 printf("%ciommu", delim);
1528 delim = '/';
1529 }
1530 printf("\n");
1531
1532 gpa += maplen;
1533 }
1534 }
1535
1536 static int
show_memseg(struct vmctx * ctx)1537 show_memseg(struct vmctx *ctx)
1538 {
1539 char name[SPECNAMELEN + 1], numbuf[8];
1540 size_t seglen;
1541 int error, segid;
1542
1543 printf("ID Length Name\n");
1544
1545 segid = 0;
1546 while (1) {
1547 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name));
1548 if (error)
1549 return (errno == EINVAL ? 0 : error);
1550
1551 if (seglen) {
1552 printf("%-4d", segid);
1553 humanize_number(numbuf, sizeof(numbuf), seglen, "B",
1554 HN_AUTOSCALE, HN_NOSPACE);
1555 printf("%-12s", numbuf);
1556 printf("%s", name[0] ? name : "sysmem");
1557 printf("\n");
1558 }
1559 segid++;
1560 }
1561 }
1562
1563 static int
show_fpu(struct vcpu * vcpu)1564 show_fpu(struct vcpu *vcpu)
1565 {
1566 int res, fd;
1567 int vcpuid = vcpu_id(vcpu);
1568 struct vmctx *ctx = vcpu_ctx(vcpu);
1569
1570 struct vm_fpu_desc_entry entries[64];
1571 struct vm_fpu_desc desc = {
1572 .vfd_entry_data = entries,
1573 .vfd_num_entries = 64,
1574 };
1575 fd = vm_get_device_fd(ctx);
1576 res = ioctl(fd, VM_DESC_FPU_AREA, &desc);
1577 if (res != 0) {
1578 return (errno);
1579 }
1580 for (uint_t i = 0; i < desc.vfd_num_entries; i++) {
1581 const struct vm_fpu_desc_entry *entry = &entries[i];
1582
1583 /* confirm that AVX fields are where we expect */
1584 if (entry->vfde_feature == XFEATURE_AVX) {
1585 if (entry->vfde_size != 0x100 ||
1586 entry->vfde_off != 0x240) {
1587 (void) fprintf(stderr,
1588 "show_fpu: unexpected AVX size/placement "
1589 "- size:%x off:%x\n",
1590 entry->vfde_size, entry->vfde_off);
1591 return (EINVAL);
1592 }
1593 }
1594 }
1595 void *buf = malloc(desc.vfd_req_size);
1596 if (buf == NULL) {
1597 return (ENOMEM);
1598 }
1599 struct vm_fpu_state req = {
1600 .vcpuid = vcpu_id(vcpu),
1601 .buf = buf,
1602 .len = desc.vfd_req_size,
1603 };
1604 res = ioctl(fd, VM_GET_FPU, &req);
1605 if (res != 0) {
1606 res = errno;
1607 free(buf);
1608 return (res);
1609 }
1610
1611 const struct xsave_state *state = buf;
1612 const struct fxsave_state *fx = &state->xs_fxsave;
1613 (void) printf("fpu_fcw[%d]\t\t0x%04x\n", vcpuid, fx->fx_fcw);
1614 (void) printf("fpu_fsw[%d]\t\t0x%04x\n", vcpuid, fx->fx_fsw);
1615 (void) printf("fpu_ftw[%d]\t\t0x%04x\n", vcpuid, fx->fx_fctw);
1616 (void) printf("fpu_fop[%d]\t\t0x%04x\n", vcpuid, fx->fx_fop);
1617 (void) printf("fpu_rip[%d]\t\t0x%016lx\n", vcpuid, fx->fx_rip);
1618 (void) printf("fpu_rdp[%d]\t\t0x%016lx\n", vcpuid, fx->fx_rdp);
1619 (void) printf("fpu_mxcsr[%d]\t\t0x%08x\n", vcpuid, fx->fx_mxcsr);
1620 (void) printf("fpu_mxcsr_mask[%d]\t0x%08x\n", vcpuid,
1621 fx->fx_mxcsr_mask);
1622 /* ST/MMX regs */
1623 for (uint_t i = 0; i < 8; i++) {
1624 (void) printf("fpu_st%u[%d]\t\t0x%08x%08x%08x%08x\n", vcpuid, i,
1625 fx->fx_st[i].__fpr_pad[0], fx->fx_st[i].__fpr_pad[1],
1626 fx->fx_st[i].__fpr_pad[2], fx->fx_st[i].__fpr_pad[3]);
1627 }
1628 /* SSE regs */
1629 for (uint_t i = 0; i < 16; i++) {
1630 (void) printf("fpu_xmm%u[%d]\t\t0x%08x%08x%08x%08x\n",
1631 i, vcpu,
1632 fx->fx_xmm[i]._l[0], fx->fx_xmm[i]._l[1],
1633 fx->fx_xmm[i]._l[2], fx->fx_xmm[i]._l[3]);
1634 }
1635
1636 if (state->xs_header.xsh_xstate_bv & XFEATURE_AVX) {
1637 /* AVX regs */
1638 for (uint_t i = 0; i < 16; i++) {
1639 (void) printf("fpu_ymm%u[%d]\t\t0x%08x%08x%08x%08x\n",
1640 i, vcpu,
1641 state->xs_ymm[i]._l[0], state->xs_ymm[i]._l[1],
1642 state->xs_ymm[i]._l[2], state->xs_ymm[i]._l[3]);
1643 }
1644 }
1645
1646 free(buf);
1647 return (0);
1648 }
1649
1650 static const char *
msr_name(uint32_t msr)1651 msr_name(uint32_t msr)
1652 {
1653 #define MSR_IDENT_MAP(x) case x: return (#x);
1654 switch (msr) {
1655 MSR_IDENT_MAP(MSR_PAT)
1656 MSR_IDENT_MAP(MSR_SYSENTER_CS_MSR)
1657 MSR_IDENT_MAP(MSR_SYSENTER_ESP_MSR)
1658 MSR_IDENT_MAP(MSR_SYSENTER_EIP_MSR)
1659 MSR_IDENT_MAP(MSR_STAR)
1660 MSR_IDENT_MAP(MSR_LSTAR)
1661 MSR_IDENT_MAP(MSR_CSTAR)
1662 MSR_IDENT_MAP(MSR_SF_MASK)
1663 MSR_IDENT_MAP(MSR_FSBASE)
1664 MSR_IDENT_MAP(MSR_GSBASE)
1665 MSR_IDENT_MAP(MSR_KGSBASE)
1666 MSR_IDENT_MAP(MSR_EFER)
1667 MSR_IDENT_MAP(MSR_MTRRcap)
1668 MSR_IDENT_MAP(MSR_MTRRdefType)
1669 case MSR_TSC:
1670 return ("MSR_TSC (offset from system boot)");
1671 default:
1672 return (NULL);
1673 }
1674 }
1675
1676 static int
show_msrs(struct vcpu * vcpu)1677 show_msrs(struct vcpu *vcpu)
1678 {
1679 struct vdi_field_entry_v1 *msrs;
1680 struct vm_data_xfer xfer = {
1681 .vdx_vcpuid = vcpu_id(vcpu),
1682 .vdx_class = VDC_MSR,
1683 .vdx_version = 1,
1684 .vdx_len = 0,
1685 .vdx_data = &msrs,
1686 };
1687 struct vmctx *ctx = vcpu_ctx(vcpu);
1688 int fd = vm_get_device_fd(ctx);
1689 int res;
1690
1691 /* Figure out how many entries we need to alloc for */
1692 res = ioctl(fd, VM_DATA_READ, &xfer);
1693 if (res == 0) {
1694 return (EINVAL);
1695 } else if (errno != ENOSPC) {
1696 return (errno);
1697 }
1698 const uint32_t len = xfer.vdx_result_len;
1699 msrs = malloc(len);
1700 if (msrs == NULL) {
1701 return (ENOMEM);
1702 }
1703 bzero(msrs, len);
1704 xfer.vdx_data = msrs;
1705 xfer.vdx_len = len;
1706
1707 /* Query the actual data, now that we should have an adequate buffer */
1708 res = ioctl(fd, VM_DATA_READ, &xfer);
1709 if (res != 0) {
1710 free(msrs);
1711 return (errno);
1712 }
1713
1714 const uint_t count =
1715 xfer.vdx_result_len / sizeof (struct vdi_field_entry_v1);
1716 for (uint_t i = 0; i < count; i++) {
1717 const uint32_t ident = msrs[i].vfe_ident;
1718 const uint64_t value = msrs[i].vfe_value;
1719
1720 const char *name = msr_name(ident);
1721
1722 if (name != NULL) {
1723 printf("msr[%s]\t = %x\n", name, value);
1724 } else {
1725 printf("msr[%08x]\t = %x\n", ident, value);
1726 }
1727 }
1728 free(msrs);
1729 return (0);
1730 }
1731
1732 int
main(int argc,char * argv[])1733 main(int argc, char *argv[])
1734 {
1735 char *vmname;
1736 int error, ch, vcpuid, ptenum;
1737 vm_paddr_t gpa_pmap;
1738 struct vm_exit vmexit;
1739 uint64_t rax, cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7;
1740 uint64_t rsp, rip, rflags, efer;
1741 uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2];
1742 struct vmctx *ctx;
1743 struct vcpu *vcpu;
1744 cpuset_t cpus;
1745 bool cpu_intel;
1746 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr;
1747 struct tm tm;
1748 struct option *opts;
1749
1750 cpu_intel = cpu_vendor_intel();
1751 opts = setup_options(cpu_intel);
1752
1753 vcpuid = 0;
1754 vmname = NULL;
1755 assert_lapic_lvt = -1;
1756 progname = basename(argv[0]);
1757
1758 while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) {
1759 switch (ch) {
1760 case 0:
1761 break;
1762 case VMNAME:
1763 vmname = optarg;
1764 break;
1765 case VCPU:
1766 vcpuid = atoi(optarg);
1767 break;
1768 case SET_MEM:
1769 memsize = atoi(optarg) * MB;
1770 memsize = roundup(memsize, 2 * MB);
1771 break;
1772 case SET_EFER:
1773 efer = strtoul(optarg, NULL, 0);
1774 set_efer = 1;
1775 break;
1776 case SET_CR0:
1777 cr0 = strtoul(optarg, NULL, 0);
1778 set_cr0 = 1;
1779 break;
1780 case SET_CR2:
1781 cr2 = strtoul(optarg, NULL, 0);
1782 set_cr2 = 1;
1783 break;
1784 case SET_CR3:
1785 cr3 = strtoul(optarg, NULL, 0);
1786 set_cr3 = 1;
1787 break;
1788 case SET_CR4:
1789 cr4 = strtoul(optarg, NULL, 0);
1790 set_cr4 = 1;
1791 break;
1792 case SET_DR0:
1793 dr0 = strtoul(optarg, NULL, 0);
1794 set_dr0 = 1;
1795 break;
1796 case SET_DR1:
1797 dr1 = strtoul(optarg, NULL, 0);
1798 set_dr1 = 1;
1799 break;
1800 case SET_DR2:
1801 dr2 = strtoul(optarg, NULL, 0);
1802 set_dr2 = 1;
1803 break;
1804 case SET_DR3:
1805 dr3 = strtoul(optarg, NULL, 0);
1806 set_dr3 = 1;
1807 break;
1808 case SET_DR6:
1809 dr6 = strtoul(optarg, NULL, 0);
1810 set_dr6 = 1;
1811 break;
1812 case SET_DR7:
1813 dr7 = strtoul(optarg, NULL, 0);
1814 set_dr7 = 1;
1815 break;
1816 case SET_RSP:
1817 rsp = strtoul(optarg, NULL, 0);
1818 set_rsp = 1;
1819 break;
1820 case SET_RIP:
1821 rip = strtoul(optarg, NULL, 0);
1822 set_rip = 1;
1823 break;
1824 case SET_RAX:
1825 rax = strtoul(optarg, NULL, 0);
1826 set_rax = 1;
1827 break;
1828 case SET_RFLAGS:
1829 rflags = strtoul(optarg, NULL, 0);
1830 set_rflags = 1;
1831 break;
1832 case DESC_BASE:
1833 desc_base = strtoul(optarg, NULL, 0);
1834 break;
1835 case DESC_LIMIT:
1836 desc_limit = strtoul(optarg, NULL, 0);
1837 break;
1838 case DESC_ACCESS:
1839 desc_access = strtoul(optarg, NULL, 0);
1840 break;
1841 case SET_CS:
1842 cs = strtoul(optarg, NULL, 0);
1843 set_cs = 1;
1844 break;
1845 case SET_DS:
1846 ds = strtoul(optarg, NULL, 0);
1847 set_ds = 1;
1848 break;
1849 case SET_ES:
1850 es = strtoul(optarg, NULL, 0);
1851 set_es = 1;
1852 break;
1853 case SET_FS:
1854 fs = strtoul(optarg, NULL, 0);
1855 set_fs = 1;
1856 break;
1857 case SET_GS:
1858 gs = strtoul(optarg, NULL, 0);
1859 set_gs = 1;
1860 break;
1861 case SET_SS:
1862 ss = strtoul(optarg, NULL, 0);
1863 set_ss = 1;
1864 break;
1865 case SET_TR:
1866 tr = strtoul(optarg, NULL, 0);
1867 set_tr = 1;
1868 break;
1869 case SET_LDTR:
1870 ldtr = strtoul(optarg, NULL, 0);
1871 set_ldtr = 1;
1872 break;
1873 case SET_X2APIC_STATE:
1874 x2apic_state = strtol(optarg, NULL, 0);
1875 set_x2apic_state = 1;
1876 break;
1877 case SET_EXCEPTION_BITMAP:
1878 exception_bitmap = strtoul(optarg, NULL, 0);
1879 set_exception_bitmap = 1;
1880 break;
1881 case SET_VMCS_ENTRY_INTERRUPTION_INFO:
1882 vmcs_entry_interruption_info = strtoul(optarg, NULL, 0);
1883 set_vmcs_entry_interruption_info = 1;
1884 break;
1885 case SET_CAP:
1886 capval = strtoul(optarg, NULL, 0);
1887 setcap = 1;
1888 break;
1889 case SET_RTC_TIME:
1890 rtc_secs = strtoul(optarg, NULL, 0);
1891 set_rtc_time = 1;
1892 break;
1893 case SET_RTC_NVRAM:
1894 rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0);
1895 set_rtc_nvram = 1;
1896 break;
1897 case RTC_NVRAM_OFFSET:
1898 rtc_nvram_offset = strtoul(optarg, NULL, 0);
1899 break;
1900 case GET_GPA_PMAP:
1901 gpa_pmap = strtoul(optarg, NULL, 0);
1902 get_gpa_pmap = 1;
1903 break;
1904 case CAPNAME:
1905 capname = optarg;
1906 break;
1907 case ASSERT_LAPIC_LVT:
1908 assert_lapic_lvt = atoi(optarg);
1909 break;
1910 case PMTMR_PORT:
1911 pmtmr_port = strtoul(optarg, NULL, 16);
1912 break;
1913 default:
1914 usage(cpu_intel);
1915 }
1916 }
1917 argc -= optind;
1918 argv += optind;
1919
1920 if (vmname == NULL)
1921 usage(cpu_intel);
1922
1923 error = 0;
1924
1925 if (!error && create)
1926 error = vm_create(vmname, 0);
1927
1928 if (!error) {
1929 ctx = vm_open(vmname);
1930 if (ctx == NULL) {
1931 fprintf(stderr,
1932 "vm_open: %s could not be opened: %s\n",
1933 vmname, strerror(errno));
1934 exit (1);
1935 }
1936 vcpu = vm_vcpu_open(ctx, vcpuid);
1937 }
1938
1939 if (!error && pmtmr_port) {
1940 error = vm_pmtmr_set_location(ctx, pmtmr_port);
1941 exit(error);
1942 }
1943
1944 if (!error && wrlock_cycle) {
1945 error = vm_wrlock_cycle(ctx);
1946 exit(error);
1947 }
1948
1949 if (!error && memsize)
1950 error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL);
1951
1952 if (!error && set_efer)
1953 error = vm_set_register(vcpu, VM_REG_GUEST_EFER, efer);
1954
1955 if (!error && set_cr0)
1956 error = vm_set_register(vcpu, VM_REG_GUEST_CR0, cr0);
1957
1958 if (!error && set_cr2)
1959 error = vm_set_register(vcpu, VM_REG_GUEST_CR2, cr2);
1960
1961 if (!error && set_cr3)
1962 error = vm_set_register(vcpu, VM_REG_GUEST_CR3, cr3);
1963
1964 if (!error && set_cr4)
1965 error = vm_set_register(vcpu, VM_REG_GUEST_CR4, cr4);
1966
1967 if (!error && set_dr0)
1968 error = vm_set_register(vcpu, VM_REG_GUEST_DR0, dr0);
1969
1970 if (!error && set_dr1)
1971 error = vm_set_register(vcpu, VM_REG_GUEST_DR1, dr1);
1972
1973 if (!error && set_dr2)
1974 error = vm_set_register(vcpu, VM_REG_GUEST_DR2, dr2);
1975
1976 if (!error && set_dr3)
1977 error = vm_set_register(vcpu, VM_REG_GUEST_DR3, dr3);
1978
1979 if (!error && set_dr6)
1980 error = vm_set_register(vcpu, VM_REG_GUEST_DR6, dr6);
1981
1982 if (!error && set_dr7)
1983 error = vm_set_register(vcpu, VM_REG_GUEST_DR7, dr7);
1984
1985 if (!error && set_rsp)
1986 error = vm_set_register(vcpu, VM_REG_GUEST_RSP, rsp);
1987
1988 if (!error && set_rip)
1989 error = vm_set_register(vcpu, VM_REG_GUEST_RIP, rip);
1990
1991 if (!error && set_rax)
1992 error = vm_set_register(vcpu, VM_REG_GUEST_RAX, rax);
1993
1994 if (!error && set_rflags) {
1995 error = vm_set_register(vcpu, VM_REG_GUEST_RFLAGS,
1996 rflags);
1997 }
1998
1999 if (!error && set_desc_ds) {
2000 error = vm_set_desc(vcpu, VM_REG_GUEST_DS,
2001 desc_base, desc_limit, desc_access);
2002 }
2003
2004 if (!error && set_desc_es) {
2005 error = vm_set_desc(vcpu, VM_REG_GUEST_ES,
2006 desc_base, desc_limit, desc_access);
2007 }
2008
2009 if (!error && set_desc_ss) {
2010 error = vm_set_desc(vcpu, VM_REG_GUEST_SS,
2011 desc_base, desc_limit, desc_access);
2012 }
2013
2014 if (!error && set_desc_cs) {
2015 error = vm_set_desc(vcpu, VM_REG_GUEST_CS,
2016 desc_base, desc_limit, desc_access);
2017 }
2018
2019 if (!error && set_desc_fs) {
2020 error = vm_set_desc(vcpu, VM_REG_GUEST_FS,
2021 desc_base, desc_limit, desc_access);
2022 }
2023
2024 if (!error && set_desc_gs) {
2025 error = vm_set_desc(vcpu, VM_REG_GUEST_GS,
2026 desc_base, desc_limit, desc_access);
2027 }
2028
2029 if (!error && set_desc_tr) {
2030 error = vm_set_desc(vcpu, VM_REG_GUEST_TR,
2031 desc_base, desc_limit, desc_access);
2032 }
2033
2034 if (!error && set_desc_ldtr) {
2035 error = vm_set_desc(vcpu, VM_REG_GUEST_LDTR,
2036 desc_base, desc_limit, desc_access);
2037 }
2038
2039 if (!error && set_desc_gdtr) {
2040 error = vm_set_desc(vcpu, VM_REG_GUEST_GDTR,
2041 desc_base, desc_limit, 0);
2042 }
2043
2044 if (!error && set_desc_idtr) {
2045 error = vm_set_desc(vcpu, VM_REG_GUEST_IDTR,
2046 desc_base, desc_limit, 0);
2047 }
2048
2049 if (!error && set_cs)
2050 error = vm_set_register(vcpu, VM_REG_GUEST_CS, cs);
2051
2052 if (!error && set_ds)
2053 error = vm_set_register(vcpu, VM_REG_GUEST_DS, ds);
2054
2055 if (!error && set_es)
2056 error = vm_set_register(vcpu, VM_REG_GUEST_ES, es);
2057
2058 if (!error && set_fs)
2059 error = vm_set_register(vcpu, VM_REG_GUEST_FS, fs);
2060
2061 if (!error && set_gs)
2062 error = vm_set_register(vcpu, VM_REG_GUEST_GS, gs);
2063
2064 if (!error && set_ss)
2065 error = vm_set_register(vcpu, VM_REG_GUEST_SS, ss);
2066
2067 if (!error && set_tr)
2068 error = vm_set_register(vcpu, VM_REG_GUEST_TR, tr);
2069
2070 if (!error && set_ldtr)
2071 error = vm_set_register(vcpu, VM_REG_GUEST_LDTR, ldtr);
2072
2073 if (!error && set_x2apic_state)
2074 error = vm_set_x2apic_state(vcpu, x2apic_state);
2075
2076 if (!error && set_exception_bitmap) {
2077 if (cpu_intel)
2078 error = vm_set_vmcs_field(vcpu,
2079 VMCS_EXCEPTION_BITMAP,
2080 exception_bitmap);
2081 else
2082 error = vm_set_vmcb_field(vcpu,
2083 VMCB_OFF_EXC_INTERCEPT,
2084 4, exception_bitmap);
2085 }
2086
2087 if (!error && cpu_intel && set_vmcs_entry_interruption_info) {
2088 error = vm_set_vmcs_field(vcpu, VMCS_ENTRY_INTR_INFO,
2089 vmcs_entry_interruption_info);
2090 }
2091
2092 if (!error && inject_nmi) {
2093 error = vm_inject_nmi(vcpu);
2094 }
2095
2096 if (!error && assert_lapic_lvt != -1) {
2097 error = vm_lapic_local_irq(vcpu, assert_lapic_lvt);
2098 }
2099
2100 if (!error && (get_memseg || get_all))
2101 error = show_memseg(ctx);
2102
2103 if (!error && (get_memmap || get_all))
2104 error = show_memmap(ctx);
2105
2106 if (!error)
2107 error = get_all_registers(vcpu);
2108
2109 if (!error)
2110 error = get_all_segments(vcpu);
2111
2112 if (!error && (get_fpu || get_all)) {
2113 error = show_fpu(vcpu);
2114 }
2115
2116 if (!error) {
2117 if (cpu_intel)
2118 error = get_misc_vmcs(vcpu);
2119 else
2120 error = get_misc_vmcb(vcpu);
2121 }
2122
2123 if (!error && (get_x2apic_state || get_all)) {
2124 error = vm_get_x2apic_state(vcpu, &x2apic_state);
2125 if (error == 0)
2126 printf("x2apic_state[%d]\t%d\n", vcpuid, x2apic_state);
2127 }
2128
2129 if (!error && (get_eptp || get_all)) {
2130 if (cpu_intel)
2131 error = vm_get_vmcs_field(vcpu, VMCS_EPTP, &eptp);
2132 else
2133 error = vm_get_vmcb_field(vcpu, VMCB_OFF_NPT_BASE,
2134 8, &eptp);
2135 if (error == 0)
2136 printf("%s[%d]\t\t0x%016lx\n",
2137 cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp);
2138 }
2139
2140 if (!error && (get_exception_bitmap || get_all)) {
2141 if(cpu_intel)
2142 error = vm_get_vmcs_field(vcpu,
2143 VMCS_EXCEPTION_BITMAP, &bm);
2144 else
2145 error = vm_get_vmcb_field(vcpu,
2146 VMCB_OFF_EXC_INTERCEPT,
2147 4, &bm);
2148 if (error == 0)
2149 printf("exception_bitmap[%d]\t%#lx\n", vcpuid, bm);
2150 }
2151
2152 if (!error && (get_io_bitmap || get_all)) {
2153 if (cpu_intel) {
2154 error = vm_get_vmcs_field(vcpu, VMCS_IO_BITMAP_A,
2155 &bm);
2156 if (error == 0)
2157 printf("io_bitmap_a[%d]\t%#lx\n", vcpuid, bm);
2158 error = vm_get_vmcs_field(vcpu, VMCS_IO_BITMAP_B,
2159 &bm);
2160 if (error == 0)
2161 printf("io_bitmap_b[%d]\t%#lx\n", vcpuid, bm);
2162 } else {
2163 error = vm_get_vmcb_field(vcpu,
2164 VMCB_OFF_IO_PERM, 8, &bm);
2165 if (error == 0)
2166 printf("io_bitmap[%d]\t%#lx\n", vcpuid, bm);
2167 }
2168 }
2169
2170 if (!error && (get_tsc_offset || get_all)) {
2171 uint64_t tscoff;
2172 if (cpu_intel)
2173 error = vm_get_vmcs_field(vcpu, VMCS_TSC_OFFSET,
2174 &tscoff);
2175 else
2176 error = vm_get_vmcb_field(vcpu,
2177 VMCB_OFF_TSC_OFFSET,
2178 8, &tscoff);
2179 if (error == 0)
2180 printf("tsc_offset[%d]\t0x%016lx\n", vcpuid, tscoff);
2181 }
2182
2183 if (!error && (get_msr_bitmap_address || get_all)) {
2184 if (cpu_intel)
2185 error = vm_get_vmcs_field(vcpu, VMCS_MSR_BITMAP,
2186 &addr);
2187 else
2188 error = vm_get_vmcb_field(vcpu,
2189 VMCB_OFF_MSR_PERM, 8, &addr);
2190 if (error == 0)
2191 printf("msr_bitmap[%d]\t\t%#lx\n", vcpuid, addr);
2192 }
2193
2194 if (!error && (get_vpid_asid || get_all)) {
2195 uint64_t vpid;
2196 if (cpu_intel)
2197 error = vm_get_vmcs_field(vcpu, VMCS_VPID, &vpid);
2198 else
2199 error = vm_get_vmcb_field(vcpu, VMCB_OFF_ASID,
2200 4, &vpid);
2201 if (error == 0)
2202 printf("%s[%d]\t\t0x%04lx\n",
2203 cpu_intel ? "vpid" : "asid", vcpu, vpid);
2204 }
2205
2206 if (!error && (get_guest_msrs || get_all)) {
2207 error = show_msrs(vcpu);
2208 }
2209
2210 if (!error && (get_exit_reason || get_all)) {
2211 if (cpu_intel)
2212 error = vm_get_vmcs_field(vcpu, VMCS_EXIT_REASON,
2213 &u64);
2214 else
2215 error = vm_get_vmcb_field(vcpu,
2216 VMCB_OFF_EXIT_REASON, 8,
2217 &u64);
2218 if (error == 0)
2219 printf("exit_reason[%d]\t%#lx\n", vcpuid, u64);
2220 }
2221
2222 if (!error && setcap) {
2223 int captype;
2224 captype = vm_capability_name2type(capname);
2225 error = vm_set_capability(vcpu, captype, capval);
2226 if (error != 0 && errno == ENOENT)
2227 printf("Capability \"%s\" is not available\n", capname);
2228 }
2229
2230 if (!error && get_gpa_pmap) {
2231 error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum);
2232 if (error == 0) {
2233 printf("gpa %#lx:", gpa_pmap);
2234 pte = &pteval[0];
2235 while (ptenum-- > 0)
2236 printf(" %#lx", *pte++);
2237 printf("\n");
2238 }
2239 }
2240
2241 if (!error && set_rtc_nvram)
2242 error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value);
2243
2244 if (!error && (get_rtc_nvram || get_all)) {
2245 error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value);
2246 if (error == 0) {
2247 printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset,
2248 rtc_nvram_value);
2249 }
2250 }
2251
2252 if (!error && set_rtc_time) {
2253 timespec_t ts = {
2254 .tv_sec = rtc_secs,
2255 .tv_nsec = 0,
2256 };
2257
2258 error = vm_rtc_settime(ctx, &ts);
2259 }
2260
2261 if (!error && (get_rtc_time || get_all)) {
2262 timespec_t ts;
2263
2264 error = vm_rtc_gettime(ctx, &ts);
2265 if (error == 0) {
2266 gmtime_r(&ts.tv_sec, &tm);
2267 printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n",
2268 ts.tv_sec, wday_str(tm.tm_wday), mon_str(tm.tm_mon),
2269 tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec,
2270 1900 + tm.tm_year);
2271 }
2272 }
2273
2274 if (!error && (getcap || get_all)) {
2275 int captype, val, getcaptype;
2276
2277 if (getcap && capname)
2278 getcaptype = vm_capability_name2type(capname);
2279 else
2280 getcaptype = -1;
2281
2282 for (captype = 0; captype < VM_CAP_MAX; captype++) {
2283 if (getcaptype >= 0 && captype != getcaptype)
2284 continue;
2285 error = vm_get_capability(vcpu, captype, &val);
2286 if (error == 0) {
2287 printf("Capability \"%s\" is %s on vcpu %d\n",
2288 vm_capability_type2name(captype),
2289 val ? "set" : "not set", vcpu);
2290 } else if (errno == ENOENT) {
2291 error = 0;
2292 printf("Capability \"%s\" is not available\n",
2293 vm_capability_type2name(captype));
2294 } else {
2295 break;
2296 }
2297 }
2298 }
2299
2300 if (!error && (get_active_cpus || get_all)) {
2301 error = vm_active_cpus(ctx, &cpus);
2302 if (!error)
2303 print_cpus("active cpus", &cpus);
2304 }
2305
2306 if (!error && (get_debug_cpus || get_all)) {
2307 error = vm_debug_cpus(ctx, &cpus);
2308 if (!error)
2309 print_cpus("debug cpus", &cpus);
2310 }
2311
2312 if (!error && (get_intinfo || get_all)) {
2313 error = vm_get_intinfo(vcpu, &info[0], &info[1]);
2314 if (!error) {
2315 print_intinfo("pending", info[0]);
2316 print_intinfo("current", info[1]);
2317 }
2318 }
2319
2320 if (!error && (get_stats || get_all)) {
2321 int i, num_stats;
2322 uint64_t *stats;
2323 struct timeval tv;
2324 const char *desc;
2325
2326 stats = vm_get_stats(vcpu, &tv, &num_stats);
2327 if (stats != NULL) {
2328 printf("vcpu%d stats:\n", vcpuid);
2329 for (i = 0; i < num_stats; i++) {
2330 desc = vm_get_stat_desc(ctx, i);
2331 printf("%-40s\t%ld\n", desc, stats[i]);
2332 }
2333 }
2334 }
2335
2336 if (!error && (get_cpu_topology || get_all)) {
2337 uint16_t sockets, cores, threads, maxcpus;
2338
2339 vm_get_topology(ctx, &sockets, &cores, &threads, &maxcpus);
2340 printf("cpu_topology:\tsockets=%hu, cores=%hu, threads=%hu, "
2341 "maxcpus=%hu\n", sockets, cores, threads, maxcpus);
2342 }
2343
2344 if (!error && run) {
2345 struct vm_entry entry;
2346
2347 bzero(&entry, sizeof (entry));
2348
2349 error = vm_run(vcpu, &entry, &vmexit);
2350 if (error == 0)
2351 dump_vm_run_exitcode(&vmexit, vcpuid);
2352 else
2353 printf("vm_run error %d\n", error);
2354 }
2355
2356 if (!error && do_pause) {
2357 error = ioctl(vm_get_device_fd(ctx), VM_PAUSE, vcpu);
2358
2359 if (error != 0) {
2360 printf("vm_pause error %d\n", errno);
2361 }
2362 }
2363 if (!error && do_resume) {
2364 error = ioctl(vm_get_device_fd(ctx), VM_RESUME, vcpu);
2365
2366 if (error != 0) {
2367 printf("vm_resume error %d\n", errno);
2368 }
2369 }
2370
2371 if (!error && force_reset)
2372 error = vm_suspend(ctx, VM_SUSPEND_RESET);
2373
2374 if (!error && force_poweroff)
2375 error = vm_suspend(ctx, VM_SUSPEND_POWEROFF);
2376
2377 if (error)
2378 printf("errno = %d\n", errno);
2379
2380 if (!error && destroy)
2381 vm_destroy(ctx);
2382
2383 free (opts);
2384 exit(error);
2385 }
2386