1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz and Don Ahn. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 34 */ 35 36 #include <sys/cdefs.h> 37 __FBSDID("$FreeBSD$"); 38 39 /* 40 * Routines to handle clock hardware. 41 */ 42 43 #include "opt_clock.h" 44 #include "opt_isa.h" 45 #include "opt_mca.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/bus.h> 50 #include <sys/lock.h> 51 #include <sys/kdb.h> 52 #include <sys/mutex.h> 53 #include <sys/proc.h> 54 #include <sys/kernel.h> 55 #include <sys/module.h> 56 #include <sys/rman.h> 57 #include <sys/sched.h> 58 #include <sys/smp.h> 59 #include <sys/sysctl.h> 60 #include <sys/timeet.h> 61 #include <sys/timetc.h> 62 63 #include <machine/clock.h> 64 #include <machine/cpu.h> 65 #include <machine/intr_machdep.h> 66 #include <machine/ppireg.h> 67 #include <machine/timerreg.h> 68 69 #ifdef PC98 70 #include <pc98/pc98/pc98_machdep.h> 71 #else 72 #include <isa/rtc.h> 73 #endif 74 #ifdef DEV_ISA 75 #ifdef PC98 76 #include <pc98/cbus/cbus.h> 77 #else 78 #include <isa/isareg.h> 79 #endif 80 #include <isa/isavar.h> 81 #endif 82 83 #ifdef DEV_MCA 84 #include <i386/bios/mca_machdep.h> 85 #endif 86 87 int clkintr_pending; 88 #ifndef TIMER_FREQ 89 #ifdef PC98 90 #define TIMER_FREQ 2457600 91 #else 92 #define TIMER_FREQ 1193182 93 #endif 94 #endif 95 u_int i8254_freq = TIMER_FREQ; 96 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 97 int i8254_max_count; 98 static int i8254_timecounter = 1; 99 100 struct mtx clock_lock; 101 static struct intsrc *i8254_intsrc; 102 static uint16_t i8254_lastcount; 103 static uint16_t i8254_offset; 104 static int (*i8254_pending)(struct intsrc *); 105 static int i8254_ticked; 106 107 struct attimer_softc { 108 int intr_en; 109 int port_rid, intr_rid; 110 struct resource *port_res; 111 struct resource *intr_res; 112 #ifdef PC98 113 int port_rid2; 114 struct resource *port_res2; 115 #endif 116 void *intr_handler; 117 struct timecounter tc; 118 struct eventtimer et; 119 int mode; 120 #define MODE_STOP 0 121 #define MODE_PERIODIC 1 122 #define MODE_ONESHOT 2 123 uint32_t period; 124 }; 125 static struct attimer_softc *attimer_sc = NULL; 126 127 static int timer0_period = -2; 128 129 /* Values for timerX_state: */ 130 #define RELEASED 0 131 #define RELEASE_PENDING 1 132 #define ACQUIRED 2 133 #define ACQUIRE_PENDING 3 134 135 static u_char timer2_state; 136 137 static unsigned i8254_get_timecount(struct timecounter *tc); 138 static void set_i8254_freq(int mode, uint32_t period); 139 140 static int 141 clkintr(void *arg) 142 { 143 struct attimer_softc *sc = (struct attimer_softc *)arg; 144 145 if (i8254_timecounter && sc->period != 0) { 146 mtx_lock_spin(&clock_lock); 147 if (i8254_ticked) 148 i8254_ticked = 0; 149 else { 150 i8254_offset += i8254_max_count; 151 i8254_lastcount = 0; 152 } 153 clkintr_pending = 0; 154 mtx_unlock_spin(&clock_lock); 155 } 156 157 if (sc && sc->et.et_active && sc->mode != MODE_STOP) 158 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 159 160 #ifdef DEV_MCA 161 /* Reset clock interrupt by asserting bit 7 of port 0x61 */ 162 if (MCA_system) 163 outb(0x61, inb(0x61) | 0x80); 164 #endif 165 return (FILTER_HANDLED); 166 } 167 168 int 169 timer_spkr_acquire(void) 170 { 171 int mode; 172 173 #ifdef PC98 174 mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT; 175 #else 176 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 177 #endif 178 179 if (timer2_state != RELEASED) 180 return (-1); 181 timer2_state = ACQUIRED; 182 183 /* 184 * This access to the timer registers is as atomic as possible 185 * because it is a single instruction. We could do better if we 186 * knew the rate. Use of splclock() limits glitches to 10-100us, 187 * and this is probably good enough for timer2, so we aren't as 188 * careful with it as with timer0. 189 */ 190 #ifdef PC98 191 outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f)); 192 #else 193 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 194 #endif 195 ppi_spkr_on(); /* enable counter2 output to speaker */ 196 return (0); 197 } 198 199 int 200 timer_spkr_release(void) 201 { 202 203 if (timer2_state != ACQUIRED) 204 return (-1); 205 timer2_state = RELEASED; 206 #ifdef PC98 207 outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT); 208 #else 209 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 210 #endif 211 ppi_spkr_off(); /* disable counter2 output to speaker */ 212 return (0); 213 } 214 215 void 216 timer_spkr_setfreq(int freq) 217 { 218 219 freq = i8254_freq / freq; 220 mtx_lock_spin(&clock_lock); 221 #ifdef PC98 222 outb(TIMER_CNTR1, freq & 0xff); 223 outb(TIMER_CNTR1, freq >> 8); 224 #else 225 outb(TIMER_CNTR2, freq & 0xff); 226 outb(TIMER_CNTR2, freq >> 8); 227 #endif 228 mtx_unlock_spin(&clock_lock); 229 } 230 231 static int 232 getit(void) 233 { 234 int high, low; 235 236 mtx_lock_spin(&clock_lock); 237 238 /* Select timer0 and latch counter value. */ 239 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 240 241 low = inb(TIMER_CNTR0); 242 high = inb(TIMER_CNTR0); 243 244 mtx_unlock_spin(&clock_lock); 245 return ((high << 8) | low); 246 } 247 248 #ifndef DELAYDEBUG 249 static u_int 250 get_tsc(__unused struct timecounter *tc) 251 { 252 253 return (rdtsc32()); 254 } 255 256 static __inline int 257 delay_tc(int n) 258 { 259 struct timecounter *tc; 260 timecounter_get_t *func; 261 uint64_t end, freq, now; 262 u_int last, mask, u; 263 264 tc = timecounter; 265 freq = atomic_load_acq_64(&tsc_freq); 266 if (tsc_is_invariant && freq != 0) { 267 func = get_tsc; 268 mask = ~0u; 269 } else { 270 if (tc->tc_quality <= 0) 271 return (0); 272 func = tc->tc_get_timecount; 273 mask = tc->tc_counter_mask; 274 freq = tc->tc_frequency; 275 } 276 now = 0; 277 end = freq * n / 1000000; 278 if (func == get_tsc) 279 sched_pin(); 280 last = func(tc) & mask; 281 do { 282 cpu_spinwait(); 283 u = func(tc) & mask; 284 if (u < last) 285 now += mask - last + u + 1; 286 else 287 now += u - last; 288 last = u; 289 } while (now < end); 290 if (func == get_tsc) 291 sched_unpin(); 292 return (1); 293 } 294 #endif 295 296 /* 297 * Wait "n" microseconds. 298 * Relies on timer 1 counting down from (i8254_freq / hz) 299 * Note: timer had better have been programmed before this is first used! 300 */ 301 void 302 DELAY(int n) 303 { 304 int delta, prev_tick, tick, ticks_left; 305 #ifdef DELAYDEBUG 306 int getit_calls = 1; 307 int n1; 308 static int state = 0; 309 310 if (state == 0) { 311 state = 1; 312 for (n1 = 1; n1 <= 10000000; n1 *= 10) 313 DELAY(n1); 314 state = 2; 315 } 316 if (state == 1) 317 printf("DELAY(%d)...", n); 318 #else 319 if (delay_tc(n)) 320 return; 321 #endif 322 /* 323 * Read the counter first, so that the rest of the setup overhead is 324 * counted. Guess the initial overhead is 20 usec (on most systems it 325 * takes about 1.5 usec for each of the i/o's in getit(). The loop 326 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 327 * multiplications and divisions to scale the count take a while). 328 * 329 * However, if ddb is active then use a fake counter since reading 330 * the i8254 counter involves acquiring a lock. ddb must not do 331 * locking for many reasons, but it calls here for at least atkbd 332 * input. 333 */ 334 #ifdef KDB 335 if (kdb_active) 336 prev_tick = 1; 337 else 338 #endif 339 prev_tick = getit(); 340 n -= 0; /* XXX actually guess no initial overhead */ 341 /* 342 * Calculate (n * (i8254_freq / 1e6)) without using floating point 343 * and without any avoidable overflows. 344 */ 345 if (n <= 0) 346 ticks_left = 0; 347 else if (n < 256) 348 /* 349 * Use fixed point to avoid a slow division by 1000000. 350 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 351 * 2^15 is the first power of 2 that gives exact results 352 * for n between 0 and 256. 353 */ 354 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 355 else 356 /* 357 * Don't bother using fixed point, although gcc-2.7.2 358 * generates particularly poor code for the long long 359 * division, since even the slow way will complete long 360 * before the delay is up (unless we're interrupted). 361 */ 362 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 363 / 1000000; 364 365 while (ticks_left > 0) { 366 #ifdef KDB 367 if (kdb_active) { 368 #ifdef PC98 369 outb(0x5f, 0); 370 #else 371 inb(0x84); 372 #endif 373 tick = prev_tick - 1; 374 if (tick <= 0) 375 tick = i8254_max_count; 376 } else 377 #endif 378 tick = getit(); 379 #ifdef DELAYDEBUG 380 ++getit_calls; 381 #endif 382 delta = prev_tick - tick; 383 prev_tick = tick; 384 if (delta < 0) { 385 delta += i8254_max_count; 386 /* 387 * Guard against i8254_max_count being wrong. 388 * This shouldn't happen in normal operation, 389 * but it may happen if set_i8254_freq() is 390 * traced. 391 */ 392 if (delta < 0) 393 delta = 0; 394 } 395 ticks_left -= delta; 396 } 397 #ifdef DELAYDEBUG 398 if (state == 1) 399 printf(" %d calls to getit() at %d usec each\n", 400 getit_calls, (n + 5) / getit_calls); 401 #endif 402 } 403 404 static void 405 set_i8254_freq(int mode, uint32_t period) 406 { 407 int new_count; 408 409 mtx_lock_spin(&clock_lock); 410 if (mode == MODE_STOP) { 411 if (i8254_timecounter) { 412 mode = MODE_PERIODIC; 413 new_count = 0x10000; 414 } else 415 new_count = -1; 416 } else { 417 new_count = min(((uint64_t)i8254_freq * period + 418 0x80000000LLU) >> 32, 0x10000); 419 } 420 if (new_count == timer0_period) 421 goto out; 422 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count; 423 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1; 424 switch (mode) { 425 case MODE_STOP: 426 outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT); 427 outb(TIMER_CNTR0, 0); 428 outb(TIMER_CNTR0, 0); 429 break; 430 case MODE_PERIODIC: 431 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 432 outb(TIMER_CNTR0, new_count & 0xff); 433 outb(TIMER_CNTR0, new_count >> 8); 434 break; 435 case MODE_ONESHOT: 436 outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT); 437 outb(TIMER_CNTR0, new_count & 0xff); 438 outb(TIMER_CNTR0, new_count >> 8); 439 break; 440 } 441 out: 442 mtx_unlock_spin(&clock_lock); 443 } 444 445 static void 446 i8254_restore(void) 447 { 448 449 timer0_period = -2; 450 if (attimer_sc != NULL) 451 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 452 else 453 set_i8254_freq(0, 0); 454 } 455 456 #ifndef __amd64__ 457 /* 458 * Restore all the timers non-atomically (XXX: should be atomically). 459 * 460 * This function is called from pmtimer_resume() to restore all the timers. 461 * This should not be necessary, but there are broken laptops that do not 462 * restore all the timers on resume. 463 * As long as pmtimer is not part of amd64 suport, skip this for the amd64 464 * case. 465 */ 466 void 467 timer_restore(void) 468 { 469 470 i8254_restore(); /* restore i8254_freq and hz */ 471 #ifndef PC98 472 atrtc_restore(); /* reenable RTC interrupts */ 473 #endif 474 } 475 #endif 476 477 /* This is separate from startrtclock() so that it can be called early. */ 478 void 479 i8254_init(void) 480 { 481 482 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 483 #ifdef PC98 484 if (pc98_machine_type & M_8M) 485 i8254_freq = 1996800L; /* 1.9968 MHz */ 486 #endif 487 set_i8254_freq(0, 0); 488 } 489 490 void 491 startrtclock() 492 { 493 494 init_TSC(); 495 } 496 497 void 498 cpu_initclocks(void) 499 { 500 501 cpu_initclocks_bsp(); 502 } 503 504 static int 505 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 506 { 507 int error; 508 u_int freq; 509 510 /* 511 * Use `i8254' instead of `timer' in external names because `timer' 512 * is too generic. Should use it everywhere. 513 */ 514 freq = i8254_freq; 515 error = sysctl_handle_int(oidp, &freq, 0, req); 516 if (error == 0 && req->newptr != NULL) { 517 i8254_freq = freq; 518 if (attimer_sc != NULL) { 519 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 520 attimer_sc->tc.tc_frequency = freq; 521 } else { 522 set_i8254_freq(0, 0); 523 } 524 } 525 return (error); 526 } 527 528 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW, 529 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", 530 "i8254 timer frequency"); 531 532 static unsigned 533 i8254_get_timecount(struct timecounter *tc) 534 { 535 device_t dev = (device_t)tc->tc_priv; 536 struct attimer_softc *sc = device_get_softc(dev); 537 register_t flags; 538 uint16_t count; 539 u_int high, low; 540 541 if (sc->period == 0) 542 return (i8254_max_count - getit()); 543 544 #ifdef __amd64__ 545 flags = read_rflags(); 546 #else 547 flags = read_eflags(); 548 #endif 549 mtx_lock_spin(&clock_lock); 550 551 /* Select timer0 and latch counter value. */ 552 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 553 554 low = inb(TIMER_CNTR0); 555 high = inb(TIMER_CNTR0); 556 count = i8254_max_count - ((high << 8) | low); 557 if (count < i8254_lastcount || 558 (!i8254_ticked && (clkintr_pending || 559 ((count < 20 || (!(flags & PSL_I) && 560 count < i8254_max_count / 2u)) && 561 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 562 i8254_ticked = 1; 563 i8254_offset += i8254_max_count; 564 } 565 i8254_lastcount = count; 566 count += i8254_offset; 567 mtx_unlock_spin(&clock_lock); 568 return (count); 569 } 570 571 static int 572 attimer_start(struct eventtimer *et, 573 struct bintime *first, struct bintime *period) 574 { 575 device_t dev = (device_t)et->et_priv; 576 struct attimer_softc *sc = device_get_softc(dev); 577 578 if (period != NULL) { 579 sc->mode = MODE_PERIODIC; 580 sc->period = period->frac >> 32; 581 } else { 582 sc->mode = MODE_ONESHOT; 583 sc->period = first->frac >> 32; 584 } 585 if (!sc->intr_en) { 586 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc); 587 sc->intr_en = 1; 588 } 589 set_i8254_freq(sc->mode, sc->period); 590 return (0); 591 } 592 593 static int 594 attimer_stop(struct eventtimer *et) 595 { 596 device_t dev = (device_t)et->et_priv; 597 struct attimer_softc *sc = device_get_softc(dev); 598 599 sc->mode = MODE_STOP; 600 sc->period = 0; 601 set_i8254_freq(sc->mode, sc->period); 602 return (0); 603 } 604 605 #ifdef DEV_ISA 606 /* 607 * Attach to the ISA PnP descriptors for the timer 608 */ 609 static struct isa_pnp_id attimer_ids[] = { 610 { 0x0001d041 /* PNP0100 */, "AT timer" }, 611 { 0 } 612 }; 613 614 #ifdef PC98 615 static void 616 pc98_alloc_resource(device_t dev) 617 { 618 static bus_addr_t iat1[] = {0, 2, 4, 6}; 619 static bus_addr_t iat2[] = {0, 4}; 620 struct attimer_softc *sc; 621 622 sc = device_get_softc(dev); 623 624 sc->port_rid = 0; 625 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid, IO_TIMER1, 1); 626 sc->port_res = isa_alloc_resourcev(dev, SYS_RES_IOPORT, 627 &sc->port_rid, iat1, 4, RF_ACTIVE); 628 if (sc->port_res == NULL) 629 device_printf(dev, "Warning: Couldn't map I/O.\n"); 630 else 631 isa_load_resourcev(sc->port_res, iat1, 4); 632 633 sc->port_rid2 = 4; 634 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid2, TIMER_CNTR1, 1); 635 sc->port_res2 = isa_alloc_resourcev(dev, SYS_RES_IOPORT, 636 &sc->port_rid2, iat2, 2, RF_ACTIVE); 637 if (sc->port_res2 == NULL) 638 device_printf(dev, "Warning: Couldn't map I/O.\n"); 639 else 640 isa_load_resourcev(sc->port_res2, iat2, 2); 641 } 642 643 static void 644 pc98_release_resource(device_t dev) 645 { 646 struct attimer_softc *sc; 647 648 sc = device_get_softc(dev); 649 650 if (sc->port_res) 651 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 652 sc->port_res); 653 if (sc->port_res2) 654 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid2, 655 sc->port_res2); 656 } 657 #endif 658 659 static int 660 attimer_probe(device_t dev) 661 { 662 int result; 663 664 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 665 /* ENOENT means no PnP-ID, device is hinted. */ 666 if (result == ENOENT) { 667 device_set_desc(dev, "AT timer"); 668 #ifdef PC98 669 /* To print resources correctly. */ 670 pc98_alloc_resource(dev); 671 pc98_release_resource(dev); 672 #endif 673 return (BUS_PROBE_LOW_PRIORITY); 674 } 675 return (result); 676 } 677 678 static int 679 attimer_attach(device_t dev) 680 { 681 struct attimer_softc *sc; 682 u_long s; 683 int i; 684 685 attimer_sc = sc = device_get_softc(dev); 686 bzero(sc, sizeof(struct attimer_softc)); 687 #ifdef PC98 688 pc98_alloc_resource(dev); 689 #else 690 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 691 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE))) 692 device_printf(dev,"Warning: Couldn't map I/O.\n"); 693 #endif 694 i8254_intsrc = intr_lookup_source(0); 695 if (i8254_intsrc != NULL) 696 i8254_pending = i8254_intsrc->is_pic->pic_source_pending; 697 resource_int_value(device_get_name(dev), device_get_unit(dev), 698 "timecounter", &i8254_timecounter); 699 set_i8254_freq(0, 0); 700 if (i8254_timecounter) { 701 sc->tc.tc_get_timecount = i8254_get_timecount; 702 sc->tc.tc_counter_mask = 0xffff; 703 sc->tc.tc_frequency = i8254_freq; 704 sc->tc.tc_name = "i8254"; 705 sc->tc.tc_quality = 0; 706 sc->tc.tc_priv = dev; 707 tc_init(&sc->tc); 708 } 709 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 710 "clock", &i) != 0 || i != 0) { 711 sc->intr_rid = 0; 712 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid, 713 &s, NULL) == 0 && s != 0) 714 sc->intr_rid++; 715 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ, 716 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) { 717 device_printf(dev,"Can't map interrupt.\n"); 718 return (0); 719 } 720 /* Dirty hack, to make bus_setup_intr to not enable source. */ 721 i8254_intsrc->is_handlers++; 722 if ((bus_setup_intr(dev, sc->intr_res, 723 INTR_MPSAFE | INTR_TYPE_CLK, 724 (driver_filter_t *)clkintr, NULL, 725 sc, &sc->intr_handler))) { 726 device_printf(dev, "Can't setup interrupt.\n"); 727 i8254_intsrc->is_handlers--; 728 return (0); 729 } 730 i8254_intsrc->is_handlers--; 731 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc); 732 sc->et.et_name = "i8254"; 733 sc->et.et_flags = ET_FLAGS_PERIODIC; 734 if (!i8254_timecounter) 735 sc->et.et_flags |= ET_FLAGS_ONESHOT; 736 sc->et.et_quality = 100; 737 sc->et.et_frequency = i8254_freq; 738 sc->et.et_min_period.sec = 0; 739 sc->et.et_min_period.frac = 740 ((0x0002LLU << 48) / i8254_freq) << 16; 741 sc->et.et_max_period.sec = 0xffff / i8254_freq; 742 sc->et.et_max_period.frac = 743 ((0xfffeLLU << 48) / i8254_freq) << 16; 744 sc->et.et_start = attimer_start; 745 sc->et.et_stop = attimer_stop; 746 sc->et.et_priv = dev; 747 et_register(&sc->et); 748 } 749 return(0); 750 } 751 752 static int 753 attimer_resume(device_t dev) 754 { 755 756 i8254_restore(); 757 return (0); 758 } 759 760 static device_method_t attimer_methods[] = { 761 /* Device interface */ 762 DEVMETHOD(device_probe, attimer_probe), 763 DEVMETHOD(device_attach, attimer_attach), 764 DEVMETHOD(device_detach, bus_generic_detach), 765 DEVMETHOD(device_shutdown, bus_generic_shutdown), 766 DEVMETHOD(device_suspend, bus_generic_suspend), 767 DEVMETHOD(device_resume, attimer_resume), 768 { 0, 0 } 769 }; 770 771 static driver_t attimer_driver = { 772 "attimer", 773 attimer_methods, 774 sizeof(struct attimer_softc), 775 }; 776 777 static devclass_t attimer_devclass; 778 779 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0); 780 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0); 781 782 #endif /* DEV_ISA */ 783