xref: /freebsd/sys/riscv/include/intr.h (revision 3078531de10dcae44b253a35125c949ff4235284)
1 /*-
2  * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * Portions of this software were developed by SRI International and the
6  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
7  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
8  *
9  * Portions of this software were developed by the University of Cambridge
10  * Computer Laboratory as part of the CTSRD Project, with support from the
11  * UK Higher Education Innovation Fund (HEIF).
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * $FreeBSD$
35  */
36 
37 #ifndef	_MACHINE_INTR_MACHDEP_H_
38 #define	_MACHINE_INTR_MACHDEP_H_
39 
40 #define	RISCV_NIRQ		1024
41 
42 #ifndef	NIRQ
43 #define	NIRQ			RISCV_NIRQ
44 #endif
45 
46 #ifdef INTRNG
47 #include <sys/intr.h>
48 #endif
49 
50 struct trapframe;
51 
52 int riscv_teardown_intr(void *);
53 int riscv_setup_intr(const char *, driver_filter_t *, driver_intr_t *,
54     void *, int, int, void **);
55 void riscv_cpu_intr(struct trapframe *);
56 
57 typedef unsigned long * riscv_intrcnt_t;
58 
59 riscv_intrcnt_t riscv_intrcnt_create(const char *);
60 void riscv_intrcnt_setname(riscv_intrcnt_t, const char *);
61 
62 #ifdef SMP
63 void riscv_setup_ipihandler(driver_filter_t *);
64 void riscv_unmask_ipi(void);
65 #endif
66 
67 enum {
68 	IRQ_SOFTWARE_USER,
69 	IRQ_SOFTWARE_SUPERVISOR,
70 	IRQ_SOFTWARE_HYPERVISOR,
71 	IRQ_SOFTWARE_MACHINE,
72 	IRQ_TIMER_USER,
73 	IRQ_TIMER_SUPERVISOR,
74 	IRQ_TIMER_HYPERVISOR,
75 	IRQ_TIMER_MACHINE,
76 	IRQ_EXTERNAL_USER,
77 	IRQ_EXTERNAL_SUPERVISOR,
78 	IRQ_EXTERNAL_HYPERVISOR,
79 	IRQ_EXTERNAL_MACHINE,
80 	INTC_NIRQS
81 };
82 
83 #endif /* !_MACHINE_INTR_MACHDEP_H_ */
84