1 /* 2 * Copyright (C) 2002 Benno Rice. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/module.h> 31 #include <sys/bus.h> 32 #include <sys/conf.h> 33 #include <sys/kernel.h> 34 35 #include <dev/ofw/openfirm.h> 36 #include <dev/ofw/ofw_pci.h> 37 38 #include <dev/pci/pcivar.h> 39 #include <dev/pci/pcireg.h> 40 41 #include <machine/bus.h> 42 #include <machine/md_var.h> 43 #include <machine/nexusvar.h> 44 #include <machine/resource.h> 45 46 #include <sys/rman.h> 47 48 #include <powerpc/ofw/ofw_pci.h> 49 #include <powerpc/powermac/uninorthvar.h> 50 51 #include <vm/vm.h> 52 #include <vm/pmap.h> 53 54 #include "pcib_if.h" 55 56 #define UNINORTH_DEBUG 0 57 58 /* 59 * Device interface. 60 */ 61 static int uninorth_probe(device_t); 62 static int uninorth_attach(device_t); 63 64 /* 65 * Bus interface. 66 */ 67 static int uninorth_read_ivar(device_t, device_t, int, 68 uintptr_t *); 69 static struct resource * uninorth_alloc_resource(device_t bus, 70 device_t child, int type, int *rid, u_long start, 71 u_long end, u_long count, u_int flags); 72 static int uninorth_activate_resource(device_t bus, device_t child, 73 int type, int rid, struct resource *res); 74 75 /* 76 * pcib interface. 77 */ 78 static int uninorth_maxslots(device_t); 79 static u_int32_t uninorth_read_config(device_t, u_int, u_int, u_int, 80 u_int, int); 81 static void uninorth_write_config(device_t, u_int, u_int, u_int, 82 u_int, u_int32_t, int); 83 static int uninorth_route_interrupt(device_t, device_t, int); 84 85 /* 86 * Local routines. 87 */ 88 static int uninorth_enable_config(struct uninorth_softc *, u_int, 89 u_int, u_int, u_int); 90 static void unin_enable_gmac(void); 91 92 /* 93 * Driver methods. 94 */ 95 static device_method_t uninorth_methods[] = { 96 /* Device interface */ 97 DEVMETHOD(device_probe, uninorth_probe), 98 DEVMETHOD(device_attach, uninorth_attach), 99 100 /* Bus interface */ 101 DEVMETHOD(bus_print_child, bus_generic_print_child), 102 DEVMETHOD(bus_read_ivar, uninorth_read_ivar), 103 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 104 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 105 DEVMETHOD(bus_alloc_resource, uninorth_alloc_resource), 106 DEVMETHOD(bus_activate_resource, uninorth_activate_resource), 107 108 /* pcib interface */ 109 DEVMETHOD(pcib_maxslots, uninorth_maxslots), 110 DEVMETHOD(pcib_read_config, uninorth_read_config), 111 DEVMETHOD(pcib_write_config, uninorth_write_config), 112 DEVMETHOD(pcib_route_interrupt, uninorth_route_interrupt), 113 114 { 0, 0 } 115 }; 116 117 static driver_t uninorth_driver = { 118 "pcib", 119 uninorth_methods, 120 sizeof(struct uninorth_softc) 121 }; 122 123 static devclass_t uninorth_devclass; 124 125 DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0); 126 127 static int 128 uninorth_probe(device_t dev) 129 { 130 char *type, *compatible; 131 132 type = nexus_get_device_type(dev); 133 compatible = nexus_get_compatible(dev); 134 135 if (type == NULL || compatible == NULL) 136 return (ENXIO); 137 138 if (strcmp(type, "pci") != 0 || strcmp(compatible, "uni-north") != 0) 139 return (ENXIO); 140 141 device_set_desc(dev, "Apple UniNorth Host-PCI bridge"); 142 return (0); 143 } 144 145 static int 146 uninorth_attach(device_t dev) 147 { 148 struct uninorth_softc *sc; 149 phandle_t node; 150 phandle_t child; 151 u_int32_t reg[2], busrange[2]; 152 struct uninorth_range *rp, *io, *mem[2]; 153 int nmem, i; 154 155 node = nexus_get_node(dev); 156 sc = device_get_softc(dev); 157 158 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 159 return (ENXIO); 160 161 if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8) 162 return (ENXIO); 163 164 sc->sc_dev = dev; 165 sc->sc_node = node; 166 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE); 167 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE); 168 sc->sc_bus = busrange[0]; 169 170 bzero(sc->sc_range, sizeof(sc->sc_range)); 171 sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range, 172 sizeof(sc->sc_range)); 173 174 if (sc->sc_nrange == -1) { 175 device_printf(dev, "could not get ranges\n"); 176 return (ENXIO); 177 } 178 179 sc->sc_range[6].pci_hi = 0; 180 io = NULL; 181 nmem = 0; 182 183 for (rp = sc->sc_range; rp->pci_hi != 0; rp++) { 184 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) { 185 case OFW_PCI_PHYS_HI_SPACE_CONFIG: 186 break; 187 case OFW_PCI_PHYS_HI_SPACE_IO: 188 io = rp; 189 break; 190 case OFW_PCI_PHYS_HI_SPACE_MEM32: 191 mem[nmem] = rp; 192 nmem++; 193 break; 194 case OFW_PCI_PHYS_HI_SPACE_MEM64: 195 break; 196 } 197 } 198 199 if (io == NULL) { 200 device_printf(dev, "can't find io range\n"); 201 return (ENXIO); 202 } 203 sc->sc_io_rman.rm_type = RMAN_ARRAY; 204 sc->sc_io_rman.rm_descr = "UniNorth PCI I/O Ports"; 205 if (rman_init(&sc->sc_io_rman) != 0 || 206 rman_manage_region(&sc->sc_io_rman, io->pci_lo, 207 io->pci_lo + io->size_lo) != 0) { 208 device_printf(dev, "failed to set up io range management\n"); 209 return (ENXIO); 210 } 211 212 if (nmem == 0) { 213 device_printf(dev, "can't find mem ranges\n"); 214 return (ENXIO); 215 } 216 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 217 sc->sc_mem_rman.rm_descr = "UniNorth PCI Memory"; 218 if (rman_init(&sc->sc_mem_rman) != 0) { 219 device_printf(dev, 220 "failed to init mem range resources\n"); 221 return (ENXIO); 222 } 223 for (i = 0; i < nmem; i++) { 224 if (rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo, 225 mem[i]->pci_lo + mem[i]->size_lo) != 0) { 226 device_printf(dev, 227 "failed to set up memory range management\n"); 228 return (ENXIO); 229 } 230 } 231 232 /* 233 * Enable the GMAC Ethernet cell if Open Firmware says it is 234 * used. 235 */ 236 for (child = OF_child(node); child; child = OF_peer(child)) { 237 char compat[32]; 238 239 memset(compat, 0, sizeof(compat)); 240 OF_getprop(child, "compatible", compat, sizeof(compat)); 241 if (strcmp(compat, "gmac") == 0) { 242 unin_enable_gmac(); 243 } 244 } 245 246 /* 247 * Write out the correct PIC interrupt values to config space 248 * of all devices on the bus. This has to be done after the GEM 249 * cell is enabled above. 250 */ 251 ofw_pci_fixup(dev, sc->sc_bus, node); 252 253 device_add_child(dev, "pci", device_get_unit(dev)); 254 return (bus_generic_attach(dev)); 255 } 256 257 static int 258 uninorth_maxslots(device_t dev) 259 { 260 261 return (PCI_SLOTMAX); 262 } 263 264 static u_int32_t 265 uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 266 int width) 267 { 268 struct uninorth_softc *sc; 269 vm_offset_t caoff; 270 271 sc = device_get_softc(dev); 272 caoff = sc->sc_data + (reg & 0x07); 273 274 if (uninorth_enable_config(sc, bus, slot, func, reg) != 0) { 275 switch (width) { 276 case 1: 277 return (in8rb(caoff)); 278 break; 279 case 2: 280 return (in16rb(caoff)); 281 break; 282 case 4: 283 return (in32rb(caoff)); 284 break; 285 } 286 } 287 288 return (0xffffffff); 289 } 290 291 static void 292 uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func, 293 u_int reg, u_int32_t val, int width) 294 { 295 struct uninorth_softc *sc; 296 vm_offset_t caoff; 297 298 sc = device_get_softc(dev); 299 caoff = sc->sc_data + (reg & 0x07); 300 301 if (uninorth_enable_config(sc, bus, slot, func, reg)) { 302 switch (width) { 303 case 1: 304 out8rb(caoff, val); 305 (void)in8rb(caoff); 306 break; 307 case 2: 308 out16rb(caoff, val); 309 (void)in16rb(caoff); 310 break; 311 case 4: 312 out32rb(caoff, val); 313 (void)in32rb(caoff); 314 break; 315 } 316 } 317 } 318 319 static int 320 uninorth_route_interrupt(device_t bus, device_t dev, int pin) 321 { 322 323 return (0); 324 } 325 326 static int 327 uninorth_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 328 { 329 struct uninorth_softc *sc; 330 331 sc = device_get_softc(dev); 332 333 switch (which) { 334 case PCIB_IVAR_BUS: 335 *result = sc->sc_bus; 336 return (0); 337 break; 338 } 339 340 return (ENOENT); 341 } 342 343 static struct resource * 344 uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid, 345 u_long start, u_long end, u_long count, u_int flags) 346 { 347 struct uninorth_softc *sc; 348 struct resource *rv; 349 struct rman *rm; 350 bus_space_tag_t bt; 351 int needactivate; 352 353 needactivate = flags & RF_ACTIVE; 354 flags &= ~RF_ACTIVE; 355 356 sc = device_get_softc(bus); 357 358 switch (type) { 359 case SYS_RES_MEMORY: 360 rm = &sc->sc_mem_rman; 361 bt = PPC_BUS_SPACE_MEM; 362 break; 363 case SYS_RES_IRQ: 364 return (bus_alloc_resource(bus, type, rid, start, end, count, 365 flags)); 366 break; 367 default: 368 device_printf(bus, "unknown resource request from %s\n", 369 device_get_nameunit(child)); 370 return (NULL); 371 } 372 373 rv = rman_reserve_resource(rm, start, end, count, flags, child); 374 if (rv == NULL) { 375 device_printf(bus, "failed to reserve resource for %s\n", 376 device_get_nameunit(child)); 377 return (NULL); 378 } 379 380 rman_set_bustag(rv, bt); 381 rman_set_bushandle(rv, rman_get_start(rv)); 382 383 if (needactivate) { 384 if (bus_activate_resource(child, type, *rid, rv) != 0) { 385 device_printf(bus, 386 "failed to activate resource for %s\n", 387 device_get_nameunit(child)); 388 rman_release_resource(rv); 389 return (NULL); 390 } 391 } 392 393 return (rv); 394 } 395 396 static int 397 uninorth_activate_resource(device_t bus, device_t child, int type, int rid, 398 struct resource *res) 399 { 400 void *p; 401 402 if (type == SYS_RES_IRQ) 403 return (bus_activate_resource(bus, type, rid, res)); 404 405 if (type == SYS_RES_MEMORY) { 406 p = pmap_mapdev((vm_offset_t)rman_get_start(res), 407 (vm_size_t)rman_get_size(res)); 408 if (p == NULL) 409 return (ENOMEM); 410 rman_set_virtual(res, p); 411 rman_set_bushandle(res, (u_long)p); 412 } 413 414 return (rman_activate_resource(res)); 415 } 416 417 static int 418 uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot, 419 u_int func, u_int reg) 420 { 421 u_int32_t cfgval; 422 423 if (sc->sc_bus == bus) { 424 /* 425 * No slots less than 11 on the primary bus 426 */ 427 if (slot < 11) 428 return (0); 429 430 cfgval = (1 << slot) | (func << 8) | (reg & 0xfc); 431 } else { 432 cfgval = (bus << 16) | (slot << 11) | (func << 8) | 433 (reg & 0xfc) | 1; 434 } 435 436 do { 437 out32rb(sc->sc_addr, cfgval); 438 } while (in32rb(sc->sc_addr) != cfgval); 439 440 return (1); 441 } 442 443 /* 444 * Driver to swallow UniNorth host bridges from the PCI bus side. 445 */ 446 static int 447 unhb_probe(device_t dev) 448 { 449 450 if (pci_get_class(dev) == PCIC_BRIDGE && 451 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) { 452 device_set_desc(dev, "Host to PCI bridge"); 453 device_quiet(dev); 454 return (-10000); 455 } 456 457 return (ENXIO); 458 } 459 460 static int 461 unhb_attach(device_t dev) 462 { 463 464 return (0); 465 } 466 467 static device_method_t unhb_methods[] = { 468 /* Device interface */ 469 DEVMETHOD(device_probe, unhb_probe), 470 DEVMETHOD(device_attach, unhb_attach), 471 472 { 0, 0 } 473 }; 474 475 static driver_t unhb_driver = { 476 "unhb", 477 unhb_methods, 478 1, 479 }; 480 static devclass_t unhb_devclass; 481 482 DRIVER_MODULE(unhb, pci, unhb_driver, unhb_devclass, 0, 0); 483 484 485 /* 486 * Small stub driver for the Uninorth chip itself, to allow setting 487 * of various parameters and cell enables 488 */ 489 static struct unin_chip_softc *uncsc; 490 491 static void 492 unin_enable_gmac(void) 493 { 494 volatile u_int *clkreg; 495 u_int32_t tmpl; 496 497 if (uncsc == NULL) 498 panic("unin_enable_gmac: device not found"); 499 500 clkreg = (void *)(uncsc->sc_addr + UNIN_CLOCKCNTL); 501 tmpl = inl(clkreg); 502 tmpl |= UNIN_CLOCKCNTL_GMAC; 503 outl(clkreg, tmpl); 504 } 505 506 static int 507 unin_chip_probe(device_t dev) 508 { 509 char *name; 510 511 name = nexus_get_name(dev); 512 513 if (name == NULL) 514 return (ENXIO); 515 516 if (strcmp(name, "uni-n") != 0) 517 return (ENXIO); 518 519 device_set_desc(dev, "Apple UniNorth System Controller"); 520 return (0); 521 } 522 523 static int 524 unin_chip_attach(device_t dev) 525 { 526 phandle_t node; 527 u_int reg[2]; 528 529 uncsc = device_get_softc(dev); 530 node = nexus_get_node(dev); 531 532 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 533 return (ENXIO); 534 535 uncsc->sc_physaddr = reg[0]; 536 uncsc->sc_size = reg[1]; 537 538 /* 539 * Only map the first page, since that is where the registers 540 * of interest lie. 541 */ 542 uncsc->sc_addr = (vm_offset_t) pmap_mapdev(reg[0], PAGE_SIZE); 543 544 uncsc->sc_version = *(u_int *)uncsc->sc_addr; 545 device_printf(dev, "Version %d\n", uncsc->sc_version); 546 547 return (0); 548 } 549 550 static device_method_t unin_chip_methods[] = { 551 /* Device interface */ 552 DEVMETHOD(device_probe, unin_chip_probe), 553 DEVMETHOD(device_attach, unin_chip_attach), 554 555 { 0, 0 } 556 }; 557 558 static driver_t unin_chip_driver = { 559 "unin", 560 unin_chip_methods, 561 sizeof(struct unin_chip_softc) 562 }; 563 564 static devclass_t unin_chip_devclass; 565 566 DRIVER_MODULE(unin, nexus, unin_chip_driver, unin_chip_devclass, 0, 0); 567 568 569 570 571