1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 5 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org> 6 * Copyright (c) 2000, BSDi 7 * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org> 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice unmodified, this list of conditions, and the following 15 * disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/libkern.h> 39 #include <sys/module.h> 40 #include <sys/pciio.h> 41 #include <sys/sbuf.h> 42 #include <sys/smp.h> 43 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/ofw_bus_subr.h> 46 #include <dev/ofw/ofw_pci.h> 47 #include <dev/ofw/openfirm.h> 48 49 #include <machine/bus.h> 50 #include <machine/intr_machdep.h> 51 #include <machine/resource.h> 52 53 #include <dev/pci/pcireg.h> 54 #include <dev/pci/pcivar.h> 55 #include <dev/pci/pci_private.h> 56 57 #include "ofw_pcibus.h" 58 #include "pcib_if.h" 59 #include "pci_if.h" 60 61 typedef uint32_t ofw_pci_intr_t; 62 63 /* Methods */ 64 static device_probe_t ofw_pcibus_probe; 65 static device_attach_t ofw_pcibus_attach; 66 static pci_alloc_devinfo_t ofw_pcibus_alloc_devinfo; 67 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt; 68 static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo; 69 static bus_child_deleted_t ofw_pcibus_child_deleted; 70 static int ofw_pcibus_child_pnpinfo_method(device_t cbdev, device_t child, 71 struct sbuf *sb); 72 73 static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno); 74 static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno); 75 76 static device_method_t ofw_pcibus_methods[] = { 77 /* Device interface */ 78 DEVMETHOD(device_probe, ofw_pcibus_probe), 79 DEVMETHOD(device_attach, ofw_pcibus_attach), 80 81 /* Bus interface */ 82 DEVMETHOD(bus_child_deleted, ofw_pcibus_child_deleted), 83 DEVMETHOD(bus_child_pnpinfo, ofw_pcibus_child_pnpinfo_method), 84 DEVMETHOD(bus_rescan, bus_null_rescan), 85 DEVMETHOD(bus_get_cpus, ofw_pcibus_get_cpus), 86 DEVMETHOD(bus_get_domain, ofw_pcibus_get_domain), 87 88 /* PCI interface */ 89 DEVMETHOD(pci_alloc_devinfo, ofw_pcibus_alloc_devinfo), 90 DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt), 91 92 /* ofw_bus interface */ 93 DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo), 94 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 95 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 96 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 97 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 98 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 99 100 DEVMETHOD_END 101 }; 102 103 static devclass_t pci_devclass; 104 105 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods, 106 sizeof(struct pci_softc), pci_driver); 107 EARLY_DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0, 108 BUS_PASS_BUS); 109 MODULE_VERSION(ofw_pcibus, 1); 110 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1); 111 112 static int ofw_devices_only = 0; 113 TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only); 114 115 static int 116 ofw_pcibus_probe(device_t dev) 117 { 118 119 if (ofw_bus_get_node(dev) == -1) 120 return (ENXIO); 121 device_set_desc(dev, "OFW PCI bus"); 122 123 return (BUS_PROBE_DEFAULT); 124 } 125 126 static int 127 ofw_pcibus_attach(device_t dev) 128 { 129 u_int busno, domain; 130 int error; 131 132 error = pci_attach_common(dev); 133 if (error) 134 return (error); 135 domain = pcib_get_domain(dev); 136 busno = pcib_get_bus(dev); 137 138 /* 139 * Attach those children represented in the device tree. 140 */ 141 142 ofw_pcibus_enum_devtree(dev, domain, busno); 143 144 /* 145 * We now attach any laggard devices. FDT, for instance, allows 146 * the device tree to enumerate only some PCI devices. Apple's 147 * OF device tree on some Grackle-based hardware can also miss 148 * functions on multi-function cards. 149 */ 150 151 if (!ofw_devices_only) 152 ofw_pcibus_enum_bus(dev, domain, busno); 153 154 return (bus_generic_attach(dev)); 155 } 156 157 struct pci_devinfo * 158 ofw_pcibus_alloc_devinfo(device_t dev) 159 { 160 struct ofw_pcibus_devinfo *dinfo; 161 162 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 163 return (&dinfo->opd_dinfo); 164 } 165 166 static void 167 ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno) 168 { 169 device_t pcib; 170 struct ofw_pci_register pcir; 171 struct ofw_pcibus_devinfo *dinfo; 172 phandle_t node, child; 173 u_int func, slot; 174 int intline; 175 176 pcib = device_get_parent(dev); 177 node = ofw_bus_get_node(dev); 178 179 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 180 if (OF_getencprop(child, "reg", (pcell_t *)&pcir, 181 sizeof(pcir)) == -1) 182 continue; 183 slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi); 184 func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi); 185 186 /* Some OFW device trees contain dupes. */ 187 if (pci_find_dbsf(domain, busno, slot, func) != NULL) 188 continue; 189 190 /* 191 * The preset in the intline register is usually bogus. Reset 192 * it such that the PCI code will reroute the interrupt if 193 * needed. 194 */ 195 196 intline = PCI_INVALID_IRQ; 197 if (OF_getproplen(child, "interrupts") > 0) 198 intline = 0; 199 PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE, 200 intline, 1); 201 202 /* 203 * Now set up the PCI and OFW bus layer devinfo and add it 204 * to the PCI bus. 205 */ 206 207 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, dev, 208 domain, busno, slot, func); 209 if (dinfo == NULL) 210 continue; 211 if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) != 212 0) { 213 pci_freecfg((struct pci_devinfo *)dinfo); 214 continue; 215 } 216 dinfo->opd_dma_tag = NULL; 217 pci_add_child(dev, (struct pci_devinfo *)dinfo); 218 219 /* 220 * Some devices don't have an intpin set, but do have 221 * interrupts. These are fully specified, and set in the 222 * interrupts property, so add that value to the device's 223 * resource list. 224 */ 225 if (dinfo->opd_dinfo.cfg.intpin == 0) 226 ofw_bus_intr_to_rl(dev, child, 227 &dinfo->opd_dinfo.resources, NULL); 228 } 229 } 230 231 /* 232 * The following is an almost exact clone of pci_add_children(), with the 233 * addition that it (a) will not add children that have already been added, 234 * and (b) will set up the OFW devinfo to point to invalid values. This is 235 * to handle non-enumerated PCI children as exist in FDT and on the second 236 * function of the Rage 128 in my Blue & White G3. 237 */ 238 239 static void 240 ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno) 241 { 242 device_t pcib; 243 struct ofw_pcibus_devinfo *dinfo; 244 int maxslots; 245 int s, f, pcifunchigh; 246 uint8_t hdrtype; 247 248 pcib = device_get_parent(dev); 249 250 maxslots = PCIB_MAXSLOTS(pcib); 251 for (s = 0; s <= maxslots; s++) { 252 pcifunchigh = 0; 253 f = 0; 254 DELAY(1); 255 hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1); 256 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE) 257 continue; 258 if (hdrtype & PCIM_MFDEV) 259 pcifunchigh = PCI_FUNCMAX; 260 for (f = 0; f <= pcifunchigh; f++) { 261 /* Filter devices we have already added */ 262 if (pci_find_dbsf(domain, busno, s, f) != NULL) 263 continue; 264 265 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device( 266 pcib, dev, domain, busno, s, f); 267 if (dinfo == NULL) 268 continue; 269 270 dinfo->opd_dma_tag = NULL; 271 dinfo->opd_obdinfo.obd_node = -1; 272 273 dinfo->opd_obdinfo.obd_name = NULL; 274 dinfo->opd_obdinfo.obd_compat = NULL; 275 dinfo->opd_obdinfo.obd_type = NULL; 276 dinfo->opd_obdinfo.obd_model = NULL; 277 278 /* 279 * For non OFW-devices, don't believe 0 280 * for an interrupt. 281 */ 282 if (dinfo->opd_dinfo.cfg.intline == 0) { 283 dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ; 284 PCIB_WRITE_CONFIG(pcib, busno, s, f, 285 PCIR_INTLINE, PCI_INVALID_IRQ, 1); 286 } 287 288 pci_add_child(dev, (struct pci_devinfo *)dinfo); 289 } 290 } 291 } 292 293 static void 294 ofw_pcibus_child_deleted(device_t dev, device_t child) 295 { 296 struct ofw_pcibus_devinfo *dinfo; 297 298 dinfo = device_get_ivars(child); 299 ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); 300 pci_child_deleted(dev, child); 301 } 302 303 static int 304 ofw_pcibus_child_pnpinfo_method(device_t cbdev, device_t child, struct sbuf *sb) 305 { 306 pci_child_pnpinfo_method(cbdev, child, sb); 307 308 if (ofw_bus_get_node(child) != -1) { 309 sbuf_cat(sb, " "); /* Separate info */ 310 ofw_bus_gen_child_pnpinfo(cbdev, child, sb); 311 } 312 313 return (0); 314 } 315 316 static int 317 ofw_pcibus_assign_interrupt(device_t dev, device_t child) 318 { 319 ofw_pci_intr_t intr[2]; 320 phandle_t node, iparent; 321 int isz, icells; 322 323 node = ofw_bus_get_node(child); 324 325 if (node == -1) { 326 /* Non-firmware enumerated child, use standard routing */ 327 328 intr[0] = pci_get_intpin(child); 329 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, 330 intr[0])); 331 } 332 333 /* 334 * Try to determine the node's interrupt parent so we know which 335 * PIC to use. 336 */ 337 338 iparent = -1; 339 if (OF_getencprop(node, "interrupt-parent", &iparent, 340 sizeof(iparent)) < 0) 341 iparent = -1; 342 icells = 1; 343 if (iparent != -1) 344 OF_getencprop(OF_node_from_xref(iparent), "#interrupt-cells", 345 &icells, sizeof(icells)); 346 347 /* 348 * Any AAPL,interrupts property gets priority and is 349 * fully specified (i.e. does not need routing) 350 */ 351 352 isz = OF_getencprop(node, "AAPL,interrupts", intr, sizeof(intr)); 353 if (isz == sizeof(intr[0])*icells) 354 return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev, 355 iparent, icells, intr)); 356 357 isz = OF_getencprop(node, "interrupts", intr, sizeof(intr)); 358 if (isz == sizeof(intr[0])*icells) { 359 if (iparent != -1) 360 intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr); 361 } else { 362 /* No property: our best guess is the intpin. */ 363 intr[0] = pci_get_intpin(child); 364 } 365 366 /* 367 * If we got intr from a property, it may or may not be an intpin. 368 * For on-board devices, it frequently is not, and is completely out 369 * of the valid intpin range. For PCI slots, it hopefully is, 370 * otherwise we will have trouble interfacing with non-OFW buses 371 * such as cardbus. 372 * Since we cannot tell which it is without violating layering, we 373 * will always use the route_interrupt method, and treat exceptions 374 * on the level they become apparent. 375 */ 376 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0])); 377 } 378 379 static const struct ofw_bus_devinfo * 380 ofw_pcibus_get_devinfo(device_t bus, device_t dev) 381 { 382 struct ofw_pcibus_devinfo *dinfo; 383 384 dinfo = device_get_ivars(dev); 385 return (&dinfo->opd_obdinfo); 386 } 387 388 int 389 ofw_pcibus_get_cpus(device_t dev, device_t child, enum cpu_sets op, size_t setsize, 390 cpuset_t *cpuset) 391 { 392 int d, error; 393 394 d = platform_node_numa_domain(ofw_bus_get_node(dev)); 395 396 switch (op) { 397 case LOCAL_CPUS: 398 if (setsize != sizeof(cpuset_t)) 399 return (EINVAL); 400 *cpuset = cpuset_domain[d]; 401 return (0); 402 case INTR_CPUS: 403 error = bus_generic_get_cpus(dev, child, op, setsize, cpuset); 404 if (error != 0) 405 return (error); 406 if (setsize != sizeof(cpuset_t)) 407 return (EINVAL); 408 CPU_AND(cpuset, &cpuset_domain[d]); 409 return (0); 410 default: 411 return (bus_generic_get_cpus(dev, child, op, setsize, cpuset)); 412 } 413 return (0); 414 } 415 416 /* 417 * Fetch the NUMA domain for the given device 'dev'. 418 * 419 * If a device has a _PXM method, map that to a NUMA domain. 420 * Otherwise, pass the request up to the parent. 421 * If there's no matching domain or the domain cannot be 422 * determined, return ENOENT. 423 */ 424 int 425 ofw_pcibus_get_domain(device_t dev, device_t child, int *domain) 426 { 427 *domain = platform_node_numa_domain(ofw_bus_get_node(child)); 428 429 return (0); 430 } 431