xref: /freebsd/sys/powerpc/include/pio.h (revision ef0e1c230f770f74d4a809219a1c121937b4b2a7)
160727d8bSWarner Losh /*-
2f9bac91bSBenno Rice  * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
3f9bac91bSBenno Rice  *
4f9bac91bSBenno Rice  * Redistribution and use in source and binary forms, with or without
5f9bac91bSBenno Rice  * modification, are permitted provided that the following conditions
6f9bac91bSBenno Rice  * are met:
7f9bac91bSBenno Rice  * 1. Redistributions of source code must retain the above copyright
8f9bac91bSBenno Rice  *    notice, this list of conditions and the following disclaimer.
9f9bac91bSBenno Rice  * 2. Redistributions in binary form must reproduce the above copyright
10f9bac91bSBenno Rice  *    notice, this list of conditions and the following disclaimer in the
11f9bac91bSBenno Rice  *    documentation and/or other materials provided with the distribution.
12f9bac91bSBenno Rice  * 3. All advertising materials mentioning features or use of this software
13f9bac91bSBenno Rice  *    must display the following acknowledgement:
14f9bac91bSBenno Rice  *	This product includes software developed under OpenBSD by
15f9bac91bSBenno Rice  *	Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
16f9bac91bSBenno Rice  * 4. The name of the author may not be used to endorse or promote products
17f9bac91bSBenno Rice  *    derived from this software without specific prior written permission.
18f9bac91bSBenno Rice  *
19f9bac91bSBenno Rice  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
20f9bac91bSBenno Rice  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21f9bac91bSBenno Rice  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22f9bac91bSBenno Rice  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
23f9bac91bSBenno Rice  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24f9bac91bSBenno Rice  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25f9bac91bSBenno Rice  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26f9bac91bSBenno Rice  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27f9bac91bSBenno Rice  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28f9bac91bSBenno Rice  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29f9bac91bSBenno Rice  * SUCH DAMAGE.
30f9bac91bSBenno Rice  *
31f9bac91bSBenno Rice  *	$NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $
32f9bac91bSBenno Rice  *	$OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $
33f9bac91bSBenno Rice  * $FreeBSD$
34f9bac91bSBenno Rice  */
35f9bac91bSBenno Rice 
36f9bac91bSBenno Rice #ifndef _MACHINE_PIO_H_
37f9bac91bSBenno Rice #define	_MACHINE_PIO_H_
38f9bac91bSBenno Rice /*
39f9bac91bSBenno Rice  * I/O macros.
40f9bac91bSBenno Rice  */
41f9bac91bSBenno Rice 
42f9bac91bSBenno Rice static __inline void
43f9bac91bSBenno Rice __outb(volatile u_int8_t *a, u_int8_t v)
44f9bac91bSBenno Rice {
45f9bac91bSBenno Rice 	*a = v;
46f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
47f9bac91bSBenno Rice }
48f9bac91bSBenno Rice 
49f9bac91bSBenno Rice static __inline void
50f9bac91bSBenno Rice __outw(volatile u_int16_t *a, u_int16_t v)
51f9bac91bSBenno Rice {
52f9bac91bSBenno Rice 	*a = v;
53f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
54f9bac91bSBenno Rice }
55f9bac91bSBenno Rice 
56f9bac91bSBenno Rice static __inline void
57f9bac91bSBenno Rice __outl(volatile u_int32_t *a, u_int32_t v)
58f9bac91bSBenno Rice {
59f9bac91bSBenno Rice 	*a = v;
60f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
61f9bac91bSBenno Rice }
62f9bac91bSBenno Rice 
63f9bac91bSBenno Rice static __inline void
64ef0e1c23SRafal Jaworowski __outll(volatile u_int64_t *a, u_int64_t v)
65ef0e1c23SRafal Jaworowski {
66ef0e1c23SRafal Jaworowski 	*a = v;
67ef0e1c23SRafal Jaworowski 	__asm__ volatile("eieio; sync");
68ef0e1c23SRafal Jaworowski }
69ef0e1c23SRafal Jaworowski 
70ef0e1c23SRafal Jaworowski static __inline void
71f9bac91bSBenno Rice __outwrb(volatile u_int16_t *a, u_int16_t v)
72f9bac91bSBenno Rice {
73f9bac91bSBenno Rice 	__asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
74f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
75f9bac91bSBenno Rice }
76f9bac91bSBenno Rice 
77f9bac91bSBenno Rice static __inline void
78f9bac91bSBenno Rice __outlrb(volatile u_int32_t *a, u_int32_t v)
79f9bac91bSBenno Rice {
80f9bac91bSBenno Rice 	__asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
81f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
82f9bac91bSBenno Rice }
83f9bac91bSBenno Rice 
84f9bac91bSBenno Rice static __inline u_int8_t
85f9bac91bSBenno Rice __inb(volatile u_int8_t *a)
86f9bac91bSBenno Rice {
87f9bac91bSBenno Rice 	u_int8_t _v_;
88f9bac91bSBenno Rice 
89f9bac91bSBenno Rice 	_v_ = *a;
90f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
91f9bac91bSBenno Rice 	return _v_;
92f9bac91bSBenno Rice }
93f9bac91bSBenno Rice 
94f9bac91bSBenno Rice static __inline u_int16_t
95f9bac91bSBenno Rice __inw(volatile u_int16_t *a)
96f9bac91bSBenno Rice {
97f9bac91bSBenno Rice 	u_int16_t _v_;
98f9bac91bSBenno Rice 
99f9bac91bSBenno Rice 	_v_ = *a;
100f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
101f9bac91bSBenno Rice 	return _v_;
102f9bac91bSBenno Rice }
103f9bac91bSBenno Rice 
104f9bac91bSBenno Rice static __inline u_int32_t
105f9bac91bSBenno Rice __inl(volatile u_int32_t *a)
106f9bac91bSBenno Rice {
107f9bac91bSBenno Rice 	u_int32_t _v_;
108f9bac91bSBenno Rice 
109f9bac91bSBenno Rice 	_v_ = *a;
110f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
111f9bac91bSBenno Rice 	return _v_;
112f9bac91bSBenno Rice }
113f9bac91bSBenno Rice 
114ef0e1c23SRafal Jaworowski static __inline u_int64_t
115ef0e1c23SRafal Jaworowski __inll(volatile u_int64_t *a)
116ef0e1c23SRafal Jaworowski {
117ef0e1c23SRafal Jaworowski 	u_int64_t _v_;
118ef0e1c23SRafal Jaworowski 
119ef0e1c23SRafal Jaworowski 	_v_ = *a;
120ef0e1c23SRafal Jaworowski 	__asm__ volatile("eieio; sync");
121ef0e1c23SRafal Jaworowski 	return _v_;
122ef0e1c23SRafal Jaworowski }
123ef0e1c23SRafal Jaworowski 
124f9bac91bSBenno Rice static __inline u_int16_t
125f9bac91bSBenno Rice __inwrb(volatile u_int16_t *a)
126f9bac91bSBenno Rice {
127f9bac91bSBenno Rice 	u_int16_t _v_;
128f9bac91bSBenno Rice 
129f9bac91bSBenno Rice 	__asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
130f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
131f9bac91bSBenno Rice 	return _v_;
132f9bac91bSBenno Rice }
133f9bac91bSBenno Rice 
134f9bac91bSBenno Rice static __inline u_int32_t
135f9bac91bSBenno Rice __inlrb(volatile u_int32_t *a)
136f9bac91bSBenno Rice {
137f9bac91bSBenno Rice 	u_int32_t _v_;
138f9bac91bSBenno Rice 
139f9bac91bSBenno Rice 	__asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
140f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
141f9bac91bSBenno Rice 	return _v_;
142f9bac91bSBenno Rice }
143f9bac91bSBenno Rice 
144f9bac91bSBenno Rice #define	outb(a,v)	(__outb((volatile u_int8_t *)(a), v))
145f9bac91bSBenno Rice #define	out8(a,v)	outb(a,v)
146f9bac91bSBenno Rice #define	outw(a,v)	(__outw((volatile u_int16_t *)(a), v))
147f9bac91bSBenno Rice #define	out16(a,v)	outw(a,v)
148f9bac91bSBenno Rice #define	outl(a,v)	(__outl((volatile u_int32_t *)(a), v))
149f9bac91bSBenno Rice #define	out32(a,v)	outl(a,v)
150ef0e1c23SRafal Jaworowski #define	outll(a,v)	(__outll((volatile u_int64_t *)(a), v))
151ef0e1c23SRafal Jaworowski #define	out64(a,v)	outll(a,v)
152f9bac91bSBenno Rice #define	inb(a)		(__inb((volatile u_int8_t *)(a)))
153f9bac91bSBenno Rice #define	in8(a)		inb(a)
154f9bac91bSBenno Rice #define	inw(a)		(__inw((volatile u_int16_t *)(a)))
155f9bac91bSBenno Rice #define	in16(a)		inw(a)
156f9bac91bSBenno Rice #define	inl(a)		(__inl((volatile u_int32_t *)(a)))
157f9bac91bSBenno Rice #define	in32(a)		inl(a)
158ef0e1c23SRafal Jaworowski #define	inll(a)		(__inll((volatile u_int64_t *)(a)))
159ef0e1c23SRafal Jaworowski #define	in64(a)		inll(a)
160f9bac91bSBenno Rice 
161f9bac91bSBenno Rice #define	out8rb(a,v)	outb(a,v)
162f9bac91bSBenno Rice #define	outwrb(a,v)	(__outwrb((volatile u_int16_t *)(a), v))
163f9bac91bSBenno Rice #define	out16rb(a,v)	outwrb(a,v)
164f9bac91bSBenno Rice #define	outlrb(a,v)	(__outlrb((volatile u_int32_t *)(a), v))
165f9bac91bSBenno Rice #define	out32rb(a,v)	outlrb(a,v)
166f9bac91bSBenno Rice #define	in8rb(a)	inb(a)
167f9bac91bSBenno Rice #define	inwrb(a)	(__inwrb((volatile u_int16_t *)(a)))
168f9bac91bSBenno Rice #define	in16rb(a)	inwrb(a)
169f9bac91bSBenno Rice #define	inlrb(a)	(__inlrb((volatile u_int32_t *)(a)))
170f9bac91bSBenno Rice #define	in32rb(a)	inlrb(a)
171f9bac91bSBenno Rice 
172f9bac91bSBenno Rice 
173f9bac91bSBenno Rice static __inline void
174f9bac91bSBenno Rice __outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c)
175f9bac91bSBenno Rice {
176f9bac91bSBenno Rice 	while (c--)
177f9bac91bSBenno Rice 		*a = *s++;
178f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
179f9bac91bSBenno Rice }
180f9bac91bSBenno Rice 
181f9bac91bSBenno Rice static __inline void
182f9bac91bSBenno Rice __outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c)
183f9bac91bSBenno Rice {
184f9bac91bSBenno Rice 	while (c--)
185f9bac91bSBenno Rice 		*a = *s++;
186f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
187f9bac91bSBenno Rice }
188f9bac91bSBenno Rice 
189f9bac91bSBenno Rice static __inline void
190f9bac91bSBenno Rice __outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c)
191f9bac91bSBenno Rice {
192f9bac91bSBenno Rice 	while (c--)
193f9bac91bSBenno Rice 		*a = *s++;
194f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
195f9bac91bSBenno Rice }
196f9bac91bSBenno Rice 
197f9bac91bSBenno Rice static __inline void
198ef0e1c23SRafal Jaworowski __outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c)
199ef0e1c23SRafal Jaworowski {
200ef0e1c23SRafal Jaworowski 	while (c--)
201ef0e1c23SRafal Jaworowski 		*a = *s++;
202ef0e1c23SRafal Jaworowski 	__asm__ volatile("eieio; sync");
203ef0e1c23SRafal Jaworowski }
204ef0e1c23SRafal Jaworowski 
205ef0e1c23SRafal Jaworowski static __inline void
206f9bac91bSBenno Rice __outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c)
207f9bac91bSBenno Rice {
208f9bac91bSBenno Rice 	while (c--)
209f9bac91bSBenno Rice 		__asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
210f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
211f9bac91bSBenno Rice }
212f9bac91bSBenno Rice 
213f9bac91bSBenno Rice static __inline void
214f9bac91bSBenno Rice __outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c)
215f9bac91bSBenno Rice {
216f9bac91bSBenno Rice 	while (c--)
217f9bac91bSBenno Rice 		__asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
218f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
219f9bac91bSBenno Rice }
220f9bac91bSBenno Rice 
221f9bac91bSBenno Rice static __inline void
222f9bac91bSBenno Rice __insb(volatile u_int8_t *a, u_int8_t *d, size_t c)
223f9bac91bSBenno Rice {
224f9bac91bSBenno Rice 	while (c--)
225f9bac91bSBenno Rice 		*d++ = *a;
226f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
227f9bac91bSBenno Rice }
228f9bac91bSBenno Rice 
229f9bac91bSBenno Rice static __inline void
230f9bac91bSBenno Rice __insw(volatile u_int16_t *a, u_int16_t *d, size_t c)
231f9bac91bSBenno Rice {
232f9bac91bSBenno Rice 	while (c--)
233f9bac91bSBenno Rice 		*d++ = *a;
234f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
235f9bac91bSBenno Rice }
236f9bac91bSBenno Rice 
237f9bac91bSBenno Rice static __inline void
238f9bac91bSBenno Rice __insl(volatile u_int32_t *a, u_int32_t *d, size_t c)
239f9bac91bSBenno Rice {
240f9bac91bSBenno Rice 	while (c--)
241f9bac91bSBenno Rice 		*d++ = *a;
242f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
243f9bac91bSBenno Rice }
244f9bac91bSBenno Rice 
245f9bac91bSBenno Rice static __inline void
246ef0e1c23SRafal Jaworowski __insll(volatile u_int64_t *a, u_int64_t *d, size_t c)
247ef0e1c23SRafal Jaworowski {
248ef0e1c23SRafal Jaworowski 	while (c--)
249ef0e1c23SRafal Jaworowski 		*d++ = *a;
250ef0e1c23SRafal Jaworowski 	__asm__ volatile("eieio; sync");
251ef0e1c23SRafal Jaworowski }
252ef0e1c23SRafal Jaworowski 
253ef0e1c23SRafal Jaworowski static __inline void
254f9bac91bSBenno Rice __inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c)
255f9bac91bSBenno Rice {
256f9bac91bSBenno Rice 	while (c--)
257f9bac91bSBenno Rice 		__asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
258f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
259f9bac91bSBenno Rice }
260f9bac91bSBenno Rice 
261f9bac91bSBenno Rice static __inline void
262f9bac91bSBenno Rice __inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c)
263f9bac91bSBenno Rice {
264f9bac91bSBenno Rice 	while (c--)
265f9bac91bSBenno Rice 		__asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
266f9bac91bSBenno Rice 	__asm__ volatile("eieio; sync");
267f9bac91bSBenno Rice }
268f9bac91bSBenno Rice 
269f9bac91bSBenno Rice #define	outsb(a,s,c)	(__outsb((volatile u_int8_t *)(a), s, c))
270f9bac91bSBenno Rice #define	outs8(a,s,c)	outsb(a,s,c)
271f9bac91bSBenno Rice #define	outsw(a,s,c)	(__outsw((volatile u_int16_t *)(a), s, c))
272f9bac91bSBenno Rice #define	outs16(a,s,c)	outsw(a,s,c)
273f9bac91bSBenno Rice #define	outsl(a,s,c)	(__outsl((volatile u_int32_t *)(a), s, c))
274f9bac91bSBenno Rice #define	outs32(a,s,c)	outsl(a,s,c)
275ef0e1c23SRafal Jaworowski #define	outsll(a,s,c)	(__outsll((volatile u_int64_t *)(a), s, c))
276ef0e1c23SRafal Jaworowski #define	outs64(a,s,c)	outsll(a,s,c)
277f9bac91bSBenno Rice #define	insb(a,d,c)	(__insb((volatile u_int8_t *)(a), d, c))
278f9bac91bSBenno Rice #define	ins8(a,d,c)	insb(a,d,c)
279f9bac91bSBenno Rice #define	insw(a,d,c)	(__insw((volatile u_int16_t *)(a), d, c))
280f9bac91bSBenno Rice #define	ins16(a,d,c)	insw(a,d,c)
281f9bac91bSBenno Rice #define	insl(a,d,c)	(__insl((volatile u_int32_t *)(a), d, c))
282f9bac91bSBenno Rice #define	ins32(a,d,c)	insl(a,d,c)
283ef0e1c23SRafal Jaworowski #define	insll(a,d,c)	(__insll((volatile u_int64_t *)(a), d, c))
284ef0e1c23SRafal Jaworowski #define	ins64(a,d,c)	insll(a,d,c)
285f9bac91bSBenno Rice 
286f9bac91bSBenno Rice #define	outs8rb(a,s,c)	outsb(a,s,c)
287f9bac91bSBenno Rice #define	outswrb(a,s,c)	(__outswrb((volatile u_int16_t *)(a), s, c))
288f9bac91bSBenno Rice #define	outs16rb(a,s,c)	outswrb(a,s,c)
289f9bac91bSBenno Rice #define	outslrb(a,s,c)	(__outslrb((volatile u_int32_t *)(a), s, c))
290f9bac91bSBenno Rice #define	outs32rb(a,s,c)	outslrb(a,s,c)
291f9bac91bSBenno Rice #define	ins8rb(a,d,c)	insb(a,d,c)
292f9bac91bSBenno Rice #define	inswrb(a,d,c)	(__inswrb((volatile u_int16_t *)(a), d, c))
293f9bac91bSBenno Rice #define	ins16rb(a,d,c)	inswrb(a,d,c)
294f9bac91bSBenno Rice #define	inslrb(a,d,c)	(__inslrb((volatile u_int32_t *)(a), d, c))
295f9bac91bSBenno Rice #define	ins32rb(a,d,c)	inslrb(a,d,c)
296f9bac91bSBenno Rice 
297f9bac91bSBenno Rice #endif /*_MACHINE_PIO_H_*/
298