xref: /freebsd/sys/powerpc/include/fpu.h (revision 5d8dd7e60b55db8396bd639da4d67d7aba233fdb)
1f9bac91bSBenno Rice /*-
2f9bac91bSBenno Rice  * Copyright (C) 1996 Wolfgang Solfrank.
3f9bac91bSBenno Rice  * Copyright (C) 1996 TooLs GmbH.
4f9bac91bSBenno Rice  * All rights reserved.
5f9bac91bSBenno Rice  *
6f9bac91bSBenno Rice  * Redistribution and use in source and binary forms, with or without
7f9bac91bSBenno Rice  * modification, are permitted provided that the following conditions
8f9bac91bSBenno Rice  * are met:
9f9bac91bSBenno Rice  * 1. Redistributions of source code must retain the above copyright
10f9bac91bSBenno Rice  *    notice, this list of conditions and the following disclaimer.
11f9bac91bSBenno Rice  * 2. Redistributions in binary form must reproduce the above copyright
12f9bac91bSBenno Rice  *    notice, this list of conditions and the following disclaimer in the
13f9bac91bSBenno Rice  *    documentation and/or other materials provided with the distribution.
14f9bac91bSBenno Rice  * 3. All advertising materials mentioning features or use of this software
15f9bac91bSBenno Rice  *    must display the following acknowledgement:
16f9bac91bSBenno Rice  *	This product includes software developed by TooLs GmbH.
17f9bac91bSBenno Rice  * 4. The name of TooLs GmbH may not be used to endorse or promote products
18f9bac91bSBenno Rice  *    derived from this software without specific prior written permission.
19f9bac91bSBenno Rice  *
20f9bac91bSBenno Rice  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21f9bac91bSBenno Rice  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22f9bac91bSBenno Rice  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23f9bac91bSBenno Rice  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24f9bac91bSBenno Rice  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25f9bac91bSBenno Rice  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26f9bac91bSBenno Rice  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27f9bac91bSBenno Rice  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28f9bac91bSBenno Rice  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29f9bac91bSBenno Rice  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30f9bac91bSBenno Rice  *
31f9bac91bSBenno Rice  *	$NetBSD: fpu.h,v 1.2 1999/12/07 15:14:56 danw Exp $
32f9bac91bSBenno Rice  * $FreeBSD$
33f9bac91bSBenno Rice  */
34f9bac91bSBenno Rice 
35f9bac91bSBenno Rice #ifndef	_MACHINE_FPU_H_
36f9bac91bSBenno Rice #define	_MACHINE_FPU_H_
37f9bac91bSBenno Rice 
38f9bac91bSBenno Rice #define	FPSCR_FX	0x80000000
39f9bac91bSBenno Rice #define	FPSCR_FEX	0x40000000
40f9bac91bSBenno Rice #define	FPSCR_VX	0x20000000
41f9bac91bSBenno Rice #define	FPSCR_OX	0x10000000
42f9bac91bSBenno Rice #define	FPSCR_UX	0x08000000
43f9bac91bSBenno Rice #define	FPSCR_ZX	0x04000000
44f9bac91bSBenno Rice #define	FPSCR_XX	0x02000000
45f9bac91bSBenno Rice #define	FPSCR_VXSNAN	0x01000000
46f9bac91bSBenno Rice #define	FPSCR_VXISI	0x00800000
47f9bac91bSBenno Rice #define	FPSCR_VXIDI	0x00400000
48f9bac91bSBenno Rice #define	FPSCR_VXZDZ	0x00200000
49f9bac91bSBenno Rice #define	FPSCR_VXIMZ	0x00100000
50f9bac91bSBenno Rice #define	FPSCR_VXVC	0x00080000
51f9bac91bSBenno Rice #define	FPSCR_FR	0x00040000
52f9bac91bSBenno Rice #define	FPSCR_FI	0x00020000
53f9bac91bSBenno Rice #define	FPSCR_FPRF	0x0001f000
54f9bac91bSBenno Rice #define	FPSCR_C		0x00010000
55f9bac91bSBenno Rice #define	FPSCR_FPCC	0x0000f000
56f9bac91bSBenno Rice #define	FPSCR_FL	0x00008000
57f9bac91bSBenno Rice #define	FPSCR_FG	0x00004000
58f9bac91bSBenno Rice #define	FPSCR_FE	0x00002000
59f9bac91bSBenno Rice #define	FPSCR_FU	0x00001000
60f9bac91bSBenno Rice #define	FPSCR_VXSOFT	0x00000400
61f9bac91bSBenno Rice #define	FPSCR_VXSQRT	0x00000200
62f9bac91bSBenno Rice #define	FPSCR_VXCVI	0x00000100
63f9bac91bSBenno Rice #define	FPSCR_VE	0x00000080
64f9bac91bSBenno Rice #define	FPSCR_OE	0x00000040
65f9bac91bSBenno Rice #define	FPSCR_UE	0x00000020
66f9bac91bSBenno Rice #define	FPSCR_ZE	0x00000010
67f9bac91bSBenno Rice #define	FPSCR_XE	0x00000008
68f9bac91bSBenno Rice #define	FPSCR_NI	0x00000004
69f9bac91bSBenno Rice #define	FPSCR_RN	0x00000003
70f9bac91bSBenno Rice 
71eeaa8979SBenno Rice #ifdef _KERNEL
72eeaa8979SBenno Rice 
73eeaa8979SBenno Rice void    enable_fpu(struct thread *);
74eeaa8979SBenno Rice void    save_fpu(struct thread *);
755d8dd7e6SMarcel Moolenaar 
76eeaa8979SBenno Rice #endif /* _KERNEL */
77eeaa8979SBenno Rice 
78f9bac91bSBenno Rice #endif	/* _MACHINE_FPU_H_ */
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