xref: /freebsd/sys/powerpc/fpu/fpu_add.c (revision e87ec409fa9b21abf79895837fe375ab3d7e408a)
1 /*	$NetBSD: fpu_add.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */
2 
3 /*-
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * Copyright (c) 1992, 1993
7  *	The Regents of the University of California.  All rights reserved.
8  *
9  * This software was developed by the Computer Systems Engineering group
10  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
11  * contributed to Berkeley.
12  *
13  * All advertising materials mentioning features or use of this software
14  * must display the following acknowledgement:
15  *	This product includes software developed by the University of
16  *	California, Lawrence Berkeley Laboratory.
17  *
18  * Redistribution and use in source and binary forms, with or without
19  * modification, are permitted provided that the following conditions
20  * are met:
21  * 1. Redistributions of source code must retain the above copyright
22  *    notice, this list of conditions and the following disclaimer.
23  * 2. Redistributions in binary form must reproduce the above copyright
24  *    notice, this list of conditions and the following disclaimer in the
25  *    documentation and/or other materials provided with the distribution.
26  * 3. Neither the name of the University nor the names of its contributors
27  *    may be used to endorse or promote products derived from this software
28  *    without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40  * SUCH DAMAGE.
41  *
42  *	@(#)fpu_add.c	8.1 (Berkeley) 6/11/93
43  */
44 
45 /*
46  * Perform an FPU add (return x + y).
47  *
48  * To subtract, negate y and call add.
49  */
50 
51 #include <sys/cdefs.h>
52 __FBSDID("$FreeBSD$");
53 
54 #include <sys/types.h>
55 #include <sys/systm.h>
56 
57 #include <machine/fpu.h>
58 #include <machine/ieeefp.h>
59 
60 #include <powerpc/fpu/fpu_arith.h>
61 #include <powerpc/fpu/fpu_emu.h>
62 
63 struct fpn *
64 fpu_add(struct fpemu *fe)
65 {
66 	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
67 	u_int r0, r1, r2, r3;
68 	int rd;
69 
70 	/*
71 	 * Put the `heavier' operand on the right (see fpu_emu.h).
72 	 * Then we will have one of the following cases, taken in the
73 	 * following order:
74 	 *
75 	 *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
76 	 *	The result is y.
77 	 *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
78 	 *    case was taken care of earlier).
79 	 *	If x = -y, the result is NaN.  Otherwise the result
80 	 *	is y (an Inf of whichever sign).
81 	 *  - y is 0.  Implied: x = 0.
82 	 *	If x and y differ in sign (one positive, one negative),
83 	 *	the result is +0 except when rounding to -Inf.  If same:
84 	 *	+0 + +0 = +0; -0 + -0 = -0.
85 	 *  - x is 0.  Implied: y != 0.
86 	 *	Result is y.
87 	 *  - other.  Implied: both x and y are numbers.
88 	 *	Do addition a la Hennessey & Patterson.
89 	 */
90 	DPRINTF(FPE_REG, ("fpu_add:\n"));
91 	DUMPFPN(FPE_REG, x);
92 	DUMPFPN(FPE_REG, y);
93 	DPRINTF(FPE_REG, ("=>\n"));
94 	ORDER(x, y);
95 	if (ISNAN(y)) {
96 		fe->fe_cx |= FPSCR_VXSNAN;
97 		DUMPFPN(FPE_REG, y);
98 		return (y);
99 	}
100 	if (ISINF(y)) {
101 		if (ISINF(x) && x->fp_sign != y->fp_sign) {
102 			fe->fe_cx |= FPSCR_VXISI;
103 			return (fpu_newnan(fe));
104 		}
105 		DUMPFPN(FPE_REG, y);
106 		return (y);
107 	}
108 	rd = ((fe->fe_fpscr) & FPSCR_RN);
109 	if (ISZERO(y)) {
110 		if (rd != FP_RM)	/* only -0 + -0 gives -0 */
111 			y->fp_sign &= x->fp_sign;
112 		else			/* any -0 operand gives -0 */
113 			y->fp_sign |= x->fp_sign;
114 		DUMPFPN(FPE_REG, y);
115 		return (y);
116 	}
117 	if (ISZERO(x)) {
118 		DUMPFPN(FPE_REG, y);
119 		return (y);
120 	}
121 	/*
122 	 * We really have two numbers to add, although their signs may
123 	 * differ.  Make the exponents match, by shifting the smaller
124 	 * number right (e.g., 1.011 => 0.1011) and increasing its
125 	 * exponent (2^3 => 2^4).  Note that we do not alter the exponents
126 	 * of x and y here.
127 	 */
128 	r = &fe->fe_f3;
129 	r->fp_class = FPC_NUM;
130 	if (x->fp_exp == y->fp_exp) {
131 		r->fp_exp = x->fp_exp;
132 		r->fp_sticky = 0;
133 	} else {
134 		if (x->fp_exp < y->fp_exp) {
135 			/*
136 			 * Try to avoid subtract case iii (see below).
137 			 * This also guarantees that x->fp_sticky = 0.
138 			 */
139 			SWAP(x, y);
140 		}
141 		/* now x->fp_exp > y->fp_exp */
142 		r->fp_exp = x->fp_exp;
143 		r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp);
144 	}
145 	r->fp_sign = x->fp_sign;
146 	if (x->fp_sign == y->fp_sign) {
147 		FPU_DECL_CARRY
148 
149 		/*
150 		 * The signs match, so we simply add the numbers.  The result
151 		 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
152 		 * 11.111...0).  If so, a single bit shift-right will fix it
153 		 * (but remember to adjust the exponent).
154 		 */
155 		/* r->fp_mant = x->fp_mant + y->fp_mant */
156 		FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
157 		FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
158 		FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
159 		FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
160 		if ((r->fp_mant[0] = r0) >= FP_2) {
161 			(void) fpu_shr(r, 1);
162 			r->fp_exp++;
163 		}
164 	} else {
165 		FPU_DECL_CARRY
166 
167 		/*
168 		 * The signs differ, so things are rather more difficult.
169 		 * H&P would have us negate the negative operand and add;
170 		 * this is the same as subtracting the negative operand.
171 		 * This is quite a headache.  Instead, we will subtract
172 		 * y from x, regardless of whether y itself is the negative
173 		 * operand.  When this is done one of three conditions will
174 		 * hold, depending on the magnitudes of x and y:
175 		 *   case i)   |x| > |y|.  The result is just x - y,
176 		 *	with x's sign, but it may need to be normalized.
177 		 *   case ii)  |x| = |y|.  The result is 0 (maybe -0)
178 		 *	so must be fixed up.
179 		 *   case iii) |x| < |y|.  We goofed; the result should
180 		 *	be (y - x), with the same sign as y.
181 		 * We could compare |x| and |y| here and avoid case iii,
182 		 * but that would take just as much work as the subtract.
183 		 * We can tell case iii has occurred by an overflow.
184 		 *
185 		 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
186 		 */
187 		/* r->fp_mant = x->fp_mant - y->fp_mant */
188 		FPU_SET_CARRY(y->fp_sticky);
189 		FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
190 		FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
191 		FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
192 		FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
193 		if (r0 < FP_2) {
194 			/* cases i and ii */
195 			if ((r0 | r1 | r2 | r3) == 0) {
196 				/* case ii */
197 				r->fp_class = FPC_ZERO;
198 				r->fp_sign = rd == FP_RM;
199 				return (r);
200 			}
201 		} else {
202 			/*
203 			 * Oops, case iii.  This can only occur when the
204 			 * exponents were equal, in which case neither
205 			 * x nor y have sticky bits set.  Flip the sign
206 			 * (to y's sign) and negate the result to get y - x.
207 			 */
208 #ifdef DIAGNOSTIC
209 			if (x->fp_exp != y->fp_exp || r->fp_sticky)
210 				panic("fpu_add");
211 #endif
212 			r->fp_sign = y->fp_sign;
213 			FPU_SUBS(r3, 0, r3);
214 			FPU_SUBCS(r2, 0, r2);
215 			FPU_SUBCS(r1, 0, r1);
216 			FPU_SUBC(r0, 0, r0);
217 		}
218 		r->fp_mant[3] = r3;
219 		r->fp_mant[2] = r2;
220 		r->fp_mant[1] = r1;
221 		r->fp_mant[0] = r0;
222 		if (r0 < FP_1)
223 			fpu_norm(r);
224 	}
225 	DUMPFPN(FPE_REG, r);
226 	return (r);
227 }
228