xref: /freebsd/sys/powerpc/cpufreq/pcr.c (revision 2008043f386721d58158e37e0d7e50df8095942d)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2009 Nathan Whitehorn
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/cpu.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 
37 #include <dev/ofw/ofw_bus.h>
38 
39 #include "cpufreq_if.h"
40 
41 struct pcr_softc {
42 	device_t dev;
43 	uint32_t pcr_vals[3];
44 	int nmodes;
45 };
46 
47 static void	pcr_identify(driver_t *driver, device_t parent);
48 static int	pcr_probe(device_t dev);
49 static int	pcr_attach(device_t dev);
50 static int	pcr_settings(device_t dev, struct cf_setting *sets, int *count);
51 static int	pcr_set(device_t dev, const struct cf_setting *set);
52 static int	pcr_get(device_t dev, struct cf_setting *set);
53 static int	pcr_type(device_t dev, int *type);
54 
55 static device_method_t pcr_methods[] = {
56 	/* Device interface */
57 	DEVMETHOD(device_identify,	pcr_identify),
58 	DEVMETHOD(device_probe,		pcr_probe),
59 	DEVMETHOD(device_attach,	pcr_attach),
60 
61 	/* cpufreq interface */
62 	DEVMETHOD(cpufreq_drv_set,	pcr_set),
63 	DEVMETHOD(cpufreq_drv_get,	pcr_get),
64 	DEVMETHOD(cpufreq_drv_type,	pcr_type),
65 	DEVMETHOD(cpufreq_drv_settings,	pcr_settings),
66 	{0, 0}
67 };
68 
69 static driver_t pcr_driver = {
70 	"pcr",
71 	pcr_methods,
72 	sizeof(struct pcr_softc)
73 };
74 
75 DRIVER_MODULE(pcr, cpu, pcr_driver, 0, 0);
76 
77 /*
78  * States
79  */
80 
81 #define PCR_TO_FREQ(a)	((a >> 17) & 3)
82 
83 #define	PCR_FULL	0
84 #define PCR_HALF	1
85 #define PCR_QUARTER	2		/* Only on 970MP */
86 
87 #define PSR_RECEIVED	(1ULL << 61)
88 #define PSR_COMPLETED	(1ULL << 61)
89 
90 /*
91  * SCOM addresses
92  */
93 
94 #define	SCOM_PCR	0x0aa00100	/* Power Control Register */
95 #define SCOM_PCR_BIT	0x80000000	/* Data bit for PCR */
96 #define SCOM_PSR	0x40800100	/* Power Status Register */
97 
98 /*
99  * SCOM Glue
100  */
101 
102 #define SCOMC_READ	0x00008000
103 #define SCOMC_WRITE	0x00000000
104 
105 static void
106 write_scom(register_t address, uint64_t value)
107 {
108 	register_t msr;
109 	#ifndef __powerpc64__
110 	register_t hi, lo, scratch;
111 	#endif
112 
113 	msr = mfmsr();
114 	mtmsr(msr & ~PSL_EE); isync();
115 
116 	#ifdef __powerpc64__
117 	mtspr(SPR_SCOMD, value);
118 	#else
119 	hi = (value >> 32) & 0xffffffff;
120 	lo = value & 0xffffffff;
121 	mtspr64(SPR_SCOMD, hi, lo, scratch);
122 	#endif
123 	isync();
124 	mtspr(SPR_SCOMC, address | SCOMC_WRITE);
125 	isync();
126 
127 	mtmsr(msr); isync();
128 }
129 
130 static uint64_t
131 read_scom(register_t address)
132 {
133 	register_t msr;
134 	uint64_t ret;
135 
136 	msr = mfmsr();
137 	mtmsr(msr & ~PSL_EE); isync();
138 
139 	mtspr(SPR_SCOMC, address | SCOMC_READ);
140 	isync();
141 
142 	__asm __volatile ("mfspr %0,%1;"
143             " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret) : "K" (SPR_SCOMD));
144 
145 	(void)mfspr(SPR_SCOMC); /* Complete transcation */
146 
147 	mtmsr(msr); isync();
148 
149 	return (ret);
150 }
151 
152 static void
153 pcr_identify(driver_t *driver, device_t parent)
154 {
155 	uint16_t vers;
156 	vers = mfpvr() >> 16;
157 
158 	/* Check for an IBM 970-class CPU */
159 	switch (vers) {
160 		case IBM970FX:
161 		case IBM970GX:
162 		case IBM970MP:
163 			break;
164 		default:
165 			return;
166 	}
167 
168 	/* Make sure we're not being doubly invoked. */
169 	if (device_find_child(parent, "pcr", -1) != NULL)
170 		return;
171 
172 	/*
173 	 * We attach a child for every CPU since settings need to
174 	 * be performed on every CPU in the SMP case.
175 	 */
176 	if (BUS_ADD_CHILD(parent, 10, "pcr", -1) == NULL)
177 		device_printf(parent, "add pcr child failed\n");
178 }
179 
180 static int
181 pcr_probe(device_t dev)
182 {
183 	if (resource_disabled("pcr", 0))
184 		return (ENXIO);
185 
186 	device_set_desc(dev, "PPC 970 Power Control Register");
187 	return (0);
188 }
189 
190 static int
191 pcr_attach(device_t dev)
192 {
193 	struct pcr_softc *sc;
194 	phandle_t cpu;
195 	uint32_t modes[3];
196 	int i;
197 
198 	sc = device_get_softc(dev);
199 	sc->dev = dev;
200 
201 	cpu = ofw_bus_get_node(device_get_parent(dev));
202 
203 	if (cpu <= 0) {
204 		device_printf(dev,"No CPU device tree node!\n");
205 		return (ENXIO);
206 	}
207 
208 	if (OF_getproplen(cpu, "power-mode-data") <= 0) {
209 		/* Use the first CPU's node */
210 		cpu = OF_child(OF_parent(cpu));
211 	}
212 
213 	/*
214 	 * Collect the PCR values for each mode from the device tree.
215 	 * These include bus timing information, and so cannot be
216 	 * directly computed.
217 	 */
218 	sc->nmodes = OF_getproplen(cpu, "power-mode-data");
219 	if (sc->nmodes <= 0 || sc->nmodes > sizeof(sc->pcr_vals)) {
220 		device_printf(dev,"No power mode data in device tree!\n");
221 		return (ENXIO);
222 	}
223 	OF_getprop(cpu, "power-mode-data", modes, sc->nmodes);
224 	sc->nmodes /= sizeof(modes[0]);
225 
226 	/* Sort the modes */
227 	for (i = 0; i < sc->nmodes; i++)
228 		sc->pcr_vals[PCR_TO_FREQ(modes[i])] = modes[i];
229 
230 	cpufreq_register(dev);
231 	return (0);
232 }
233 
234 static int
235 pcr_settings(device_t dev, struct cf_setting *sets, int *count)
236 {
237 	struct pcr_softc *sc;
238 
239 	sc = device_get_softc(dev);
240 	if (sets == NULL || count == NULL)
241 		return (EINVAL);
242 	if (*count < sc->nmodes)
243 		return (E2BIG);
244 
245 	/* Return a list of valid settings for this driver. */
246 	memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * sc->nmodes);
247 
248 	sets[0].freq = 10000; sets[0].dev = dev;
249 	sets[1].freq = 5000; sets[1].dev = dev;
250 	if (sc->nmodes > 2) {
251 		sets[2].freq = 2500;
252 		sets[2].dev = dev;
253 	}
254 	*count = sc->nmodes;
255 
256 	return (0);
257 }
258 
259 static int
260 pcr_set(device_t dev, const struct cf_setting *set)
261 {
262 	struct pcr_softc *sc;
263 	register_t pcr, msr;
264 	uint64_t psr;
265 
266 	if (set == NULL)
267 		return (EINVAL);
268 	sc = device_get_softc(dev);
269 
270 	/* Construct the new PCR */
271 
272 	pcr = SCOM_PCR_BIT;
273 
274 	if (set->freq == 10000)
275 		pcr |= sc->pcr_vals[0];
276 	else if (set->freq == 5000)
277 		pcr |= sc->pcr_vals[1];
278 	else if (set->freq == 2500)
279 		pcr |= sc->pcr_vals[2];
280 
281 	msr = mfmsr();
282 	mtmsr(msr & ~PSL_EE); isync();
283 
284 	/* 970MP requires PCR and PCRH to be cleared first */
285 
286 	write_scom(SCOM_PCR,0);			/* Clear PCRH */
287 	write_scom(SCOM_PCR,SCOM_PCR_BIT);	/* Clear PCR */
288 
289 	/* Set PCR */
290 
291 	write_scom(SCOM_PCR, pcr);
292 
293 	/* Wait for completion */
294 
295 	do {
296 		DELAY(100);
297 		psr = read_scom(SCOM_PSR);
298 	} while ((psr & PSR_RECEIVED) && !(psr & PSR_COMPLETED));
299 
300 	mtmsr(msr); isync();
301 
302 	return (0);
303 }
304 
305 static int
306 pcr_get(device_t dev, struct cf_setting *set)
307 {
308 	uint64_t psr;
309 
310 	if (set == NULL)
311 		return (EINVAL);
312 
313 	memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set));
314 
315 	psr = read_scom(SCOM_PSR);
316 
317 	/* We want bits 6 and 7 */
318 	psr = (psr >> 56) & 3;
319 
320 	set->freq = 10000;
321 	if (psr == PCR_HALF)
322 		set->freq = 5000;
323 	else if (psr == PCR_QUARTER)
324 		set->freq = 2500;
325 
326 	set->dev = dev;
327 
328 	return (0);
329 }
330 
331 static int
332 pcr_type(device_t dev, int *type)
333 {
334 
335 	if (type == NULL)
336 		return (EINVAL);
337 
338 	*type = CPUFREQ_TYPE_RELATIVE;
339 	return (0);
340 }
341