1 /* 2 * Copyright (c) 2001 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /* 37 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 38 * Copyright (C) 1995, 1996 TooLs GmbH. 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by TooLs GmbH. 52 * 4. The name of TooLs GmbH may not be used to endorse or promote products 53 * derived from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 67 */ 68 /* 69 * Copyright (C) 2001 Benno Rice. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 91 */ 92 93 #ifndef lint 94 static const char rcsid[] = 95 "$FreeBSD$"; 96 #endif /* not lint */ 97 98 /* 99 * Manages physical address maps. 100 * 101 * In addition to hardware address maps, this module is called upon to 102 * provide software-use-only maps which may or may not be stored in the 103 * same form as hardware maps. These pseudo-maps are used to store 104 * intermediate results from copy operations to and from address spaces. 105 * 106 * Since the information managed by this module is also stored by the 107 * logical address mapping module, this module may throw away valid virtual 108 * to physical mappings at almost any time. However, invalidations of 109 * mappings must be done as requested. 110 * 111 * In order to cope with hardware architectures which make virtual to 112 * physical map invalidates expensive, this module may delay invalidate 113 * reduced protection operations until such time as they are actually 114 * necessary. This module is given full information as to which processors 115 * are currently using which maps, and to when physical maps must be made 116 * correct. 117 */ 118 119 #include <sys/param.h> 120 #include <sys/kernel.h> 121 #include <sys/ktr.h> 122 #include <sys/lock.h> 123 #include <sys/msgbuf.h> 124 #include <sys/mutex.h> 125 #include <sys/proc.h> 126 #include <sys/sysctl.h> 127 #include <sys/systm.h> 128 #include <sys/vmmeter.h> 129 130 #include <dev/ofw/openfirm.h> 131 132 #include <vm/vm.h> 133 #include <vm/vm_param.h> 134 #include <vm/vm_kern.h> 135 #include <vm/vm_page.h> 136 #include <vm/vm_map.h> 137 #include <vm/vm_object.h> 138 #include <vm/vm_extern.h> 139 #include <vm/vm_pageout.h> 140 #include <vm/vm_pager.h> 141 #include <vm/uma.h> 142 143 #include <machine/powerpc.h> 144 #include <machine/bat.h> 145 #include <machine/frame.h> 146 #include <machine/md_var.h> 147 #include <machine/psl.h> 148 #include <machine/pte.h> 149 #include <machine/sr.h> 150 151 #define PMAP_DEBUG 152 153 #define TODO panic("%s: not implemented", __func__); 154 155 #define PMAP_LOCK(pm) 156 #define PMAP_UNLOCK(pm) 157 158 #define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 159 #define TLBSYNC() __asm __volatile("tlbsync"); 160 #define SYNC() __asm __volatile("sync"); 161 #define EIEIO() __asm __volatile("eieio"); 162 163 #define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 164 #define VSID_TO_SR(vsid) ((vsid) & 0xf) 165 #define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 166 167 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 168 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 169 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 170 #define PVO_MANAGED 0x0020 /* PVO entry is managed */ 171 #define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 172 #define PVO_BOOTSTRAP 0x0080 /* PVO entry allocated during 173 bootstrap */ 174 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 175 #define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 176 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 177 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 178 #define PVO_PTEGIDX_CLR(pvo) \ 179 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 180 #define PVO_PTEGIDX_SET(pvo, i) \ 181 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 182 183 #define PMAP_PVO_CHECK(pvo) 184 185 struct ofw_map { 186 vm_offset_t om_va; 187 vm_size_t om_len; 188 vm_offset_t om_pa; 189 u_int om_mode; 190 }; 191 192 int pmap_bootstrapped = 0; 193 194 /* 195 * Virtual and physical address of message buffer. 196 */ 197 struct msgbuf *msgbufp; 198 vm_offset_t msgbuf_phys; 199 200 /* 201 * Physical addresses of first and last available physical page. 202 */ 203 vm_offset_t avail_start; 204 vm_offset_t avail_end; 205 206 /* 207 * Map of physical memory regions. 208 */ 209 vm_offset_t phys_avail[128]; 210 u_int phys_avail_count; 211 static struct mem_region *regions; 212 static struct mem_region *pregions; 213 int regions_sz, pregions_sz; 214 static struct ofw_map translations[128]; 215 static int translations_size; 216 217 /* 218 * First and last available kernel virtual addresses. 219 */ 220 vm_offset_t virtual_avail; 221 vm_offset_t virtual_end; 222 vm_offset_t kernel_vm_end; 223 224 /* 225 * Kernel pmap. 226 */ 227 struct pmap kernel_pmap_store; 228 extern struct pmap ofw_pmap; 229 230 /* 231 * PTEG data. 232 */ 233 static struct pteg *pmap_pteg_table; 234 u_int pmap_pteg_count; 235 u_int pmap_pteg_mask; 236 237 /* 238 * PVO data. 239 */ 240 struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 241 struct pvo_head pmap_pvo_kunmanaged = 242 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 243 struct pvo_head pmap_pvo_unmanaged = 244 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 245 246 uma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 247 uma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 248 struct vm_object pmap_upvo_zone_obj; 249 struct vm_object pmap_mpvo_zone_obj; 250 static vm_object_t pmap_pvo_obj; 251 static u_int pmap_pvo_count; 252 253 #define BPVO_POOL_SIZE 32768 254 static struct pvo_entry *pmap_bpvo_pool; 255 static int pmap_bpvo_pool_index = 0; 256 257 #define VSID_NBPW (sizeof(u_int32_t) * 8) 258 static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 259 260 static boolean_t pmap_initialized = FALSE; 261 262 /* 263 * Statistics. 264 */ 265 u_int pmap_pte_valid = 0; 266 u_int pmap_pte_overflow = 0; 267 u_int pmap_pte_replacements = 0; 268 u_int pmap_pvo_entries = 0; 269 u_int pmap_pvo_enter_calls = 0; 270 u_int pmap_pvo_remove_calls = 0; 271 u_int pmap_pte_spills = 0; 272 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 273 0, ""); 274 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 275 &pmap_pte_overflow, 0, ""); 276 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 277 &pmap_pte_replacements, 0, ""); 278 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 279 0, ""); 280 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 281 &pmap_pvo_enter_calls, 0, ""); 282 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 283 &pmap_pvo_remove_calls, 0, ""); 284 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 285 &pmap_pte_spills, 0, ""); 286 287 struct pvo_entry *pmap_pvo_zeropage; 288 289 vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 290 u_int pmap_rkva_count = 4; 291 292 /* 293 * Allocate physical memory for use in pmap_bootstrap. 294 */ 295 static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 296 297 /* 298 * PTE calls. 299 */ 300 static int pmap_pte_insert(u_int, struct pte *); 301 302 /* 303 * PVO calls. 304 */ 305 static int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 306 vm_offset_t, vm_offset_t, u_int, int); 307 static void pmap_pvo_remove(struct pvo_entry *, int); 308 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 309 static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 310 311 /* 312 * Utility routines. 313 */ 314 static void * pmap_pvo_allocf(uma_zone_t, int, u_int8_t *, int); 315 static struct pvo_entry *pmap_rkva_alloc(void); 316 static void pmap_pa_map(struct pvo_entry *, vm_offset_t, 317 struct pte *, int *); 318 static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 319 static void pmap_syncicache(vm_offset_t, vm_size_t); 320 static boolean_t pmap_query_bit(vm_page_t, int); 321 static boolean_t pmap_clear_bit(vm_page_t, int); 322 static void tlbia(void); 323 324 static __inline int 325 va_to_sr(u_int *sr, vm_offset_t va) 326 { 327 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 328 } 329 330 static __inline u_int 331 va_to_pteg(u_int sr, vm_offset_t addr) 332 { 333 u_int hash; 334 335 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 336 ADDR_PIDX_SHFT); 337 return (hash & pmap_pteg_mask); 338 } 339 340 static __inline struct pvo_head * 341 pa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 342 { 343 struct vm_page *pg; 344 345 pg = PHYS_TO_VM_PAGE(pa); 346 347 if (pg_p != NULL) 348 *pg_p = pg; 349 350 if (pg == NULL) 351 return (&pmap_pvo_unmanaged); 352 353 return (&pg->md.mdpg_pvoh); 354 } 355 356 static __inline struct pvo_head * 357 vm_page_to_pvoh(vm_page_t m) 358 { 359 360 return (&m->md.mdpg_pvoh); 361 } 362 363 static __inline void 364 pmap_attr_clear(vm_page_t m, int ptebit) 365 { 366 367 m->md.mdpg_attrs &= ~ptebit; 368 } 369 370 static __inline int 371 pmap_attr_fetch(vm_page_t m) 372 { 373 374 return (m->md.mdpg_attrs); 375 } 376 377 static __inline void 378 pmap_attr_save(vm_page_t m, int ptebit) 379 { 380 381 m->md.mdpg_attrs |= ptebit; 382 } 383 384 static __inline int 385 pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 386 { 387 if (pt->pte_hi == pvo_pt->pte_hi) 388 return (1); 389 390 return (0); 391 } 392 393 static __inline int 394 pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 395 { 396 return (pt->pte_hi & ~PTE_VALID) == 397 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 398 ((va >> ADDR_API_SHFT) & PTE_API) | which); 399 } 400 401 static __inline void 402 pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 403 { 404 /* 405 * Construct a PTE. Default to IMB initially. Valid bit only gets 406 * set when the real pte is set in memory. 407 * 408 * Note: Don't set the valid bit for correct operation of tlb update. 409 */ 410 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 411 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 412 pt->pte_lo = pte_lo; 413 } 414 415 static __inline void 416 pmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 417 { 418 419 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 420 } 421 422 static __inline void 423 pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 424 { 425 426 /* 427 * As shown in Section 7.6.3.2.3 428 */ 429 pt->pte_lo &= ~ptebit; 430 TLBIE(va); 431 EIEIO(); 432 TLBSYNC(); 433 SYNC(); 434 } 435 436 static __inline void 437 pmap_pte_set(struct pte *pt, struct pte *pvo_pt) 438 { 439 440 pvo_pt->pte_hi |= PTE_VALID; 441 442 /* 443 * Update the PTE as defined in section 7.6.3.1. 444 * Note that the REF/CHG bits are from pvo_pt and thus should havce 445 * been saved so this routine can restore them (if desired). 446 */ 447 pt->pte_lo = pvo_pt->pte_lo; 448 EIEIO(); 449 pt->pte_hi = pvo_pt->pte_hi; 450 SYNC(); 451 pmap_pte_valid++; 452 } 453 454 static __inline void 455 pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 456 { 457 458 pvo_pt->pte_hi &= ~PTE_VALID; 459 460 /* 461 * Force the reg & chg bits back into the PTEs. 462 */ 463 SYNC(); 464 465 /* 466 * Invalidate the pte. 467 */ 468 pt->pte_hi &= ~PTE_VALID; 469 470 SYNC(); 471 TLBIE(va); 472 EIEIO(); 473 TLBSYNC(); 474 SYNC(); 475 476 /* 477 * Save the reg & chg bits. 478 */ 479 pmap_pte_synch(pt, pvo_pt); 480 pmap_pte_valid--; 481 } 482 483 static __inline void 484 pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 485 { 486 487 /* 488 * Invalidate the PTE 489 */ 490 pmap_pte_unset(pt, pvo_pt, va); 491 pmap_pte_set(pt, pvo_pt); 492 } 493 494 /* 495 * Quick sort callout for comparing memory regions. 496 */ 497 static int mr_cmp(const void *a, const void *b); 498 static int om_cmp(const void *a, const void *b); 499 500 static int 501 mr_cmp(const void *a, const void *b) 502 { 503 const struct mem_region *regiona; 504 const struct mem_region *regionb; 505 506 regiona = a; 507 regionb = b; 508 if (regiona->mr_start < regionb->mr_start) 509 return (-1); 510 else if (regiona->mr_start > regionb->mr_start) 511 return (1); 512 else 513 return (0); 514 } 515 516 static int 517 om_cmp(const void *a, const void *b) 518 { 519 const struct ofw_map *mapa; 520 const struct ofw_map *mapb; 521 522 mapa = a; 523 mapb = b; 524 if (mapa->om_pa < mapb->om_pa) 525 return (-1); 526 else if (mapa->om_pa > mapb->om_pa) 527 return (1); 528 else 529 return (0); 530 } 531 532 void 533 pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 534 { 535 ihandle_t mmui; 536 phandle_t chosen, mmu; 537 int sz; 538 int i, j; 539 vm_size_t size, physsz; 540 vm_offset_t pa, va, off; 541 u_int batl, batu; 542 543 /* 544 * Set up BAT0 to only map the lowest 256 MB area 545 */ 546 battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 547 battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 548 549 /* 550 * Map PCI memory space. 551 */ 552 battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 553 battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 554 555 battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 556 battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 557 558 battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); 559 battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); 560 561 battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); 562 battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); 563 564 /* 565 * Map obio devices. 566 */ 567 battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW); 568 battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs); 569 570 /* 571 * Use an IBAT and a DBAT to map the bottom segment of memory 572 * where we are. 573 */ 574 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 575 batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 576 __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 577 :: "r"(batu), "r"(batl)); 578 579 #if 0 580 /* map frame buffer */ 581 batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 582 batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 583 __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 584 :: "r"(batu), "r"(batl)); 585 #endif 586 587 #if 1 588 /* map pci space */ 589 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 590 batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 591 __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 592 :: "r"(batu), "r"(batl)); 593 #endif 594 595 /* 596 * Set the start and end of kva. 597 */ 598 virtual_avail = VM_MIN_KERNEL_ADDRESS; 599 virtual_end = VM_MAX_KERNEL_ADDRESS; 600 601 mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 602 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 603 604 qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 605 for (i = 0; i < pregions_sz; i++) { 606 CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 607 pregions[i].mr_start, 608 pregions[i].mr_start + pregions[i].mr_size, 609 pregions[i].mr_size); 610 } 611 612 if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 613 panic("pmap_bootstrap: phys_avail too small"); 614 qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 615 phys_avail_count = 0; 616 physsz = 0; 617 for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 618 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 619 regions[i].mr_start + regions[i].mr_size, 620 regions[i].mr_size); 621 phys_avail[j] = regions[i].mr_start; 622 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 623 phys_avail_count++; 624 physsz += regions[i].mr_size; 625 } 626 physmem = btoc(physsz); 627 628 /* 629 * Allocate PTEG table. 630 */ 631 #ifdef PTEGCOUNT 632 pmap_pteg_count = PTEGCOUNT; 633 #else 634 pmap_pteg_count = 0x1000; 635 636 while (pmap_pteg_count < physmem) 637 pmap_pteg_count <<= 1; 638 639 pmap_pteg_count >>= 1; 640 #endif /* PTEGCOUNT */ 641 642 size = pmap_pteg_count * sizeof(struct pteg); 643 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 644 size); 645 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 646 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 647 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 648 pmap_pteg_mask = pmap_pteg_count - 1; 649 650 /* 651 * Allocate pv/overflow lists. 652 */ 653 size = sizeof(struct pvo_head) * pmap_pteg_count; 654 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 655 PAGE_SIZE); 656 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 657 for (i = 0; i < pmap_pteg_count; i++) 658 LIST_INIT(&pmap_pvo_table[i]); 659 660 /* 661 * Allocate the message buffer. 662 */ 663 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 664 665 /* 666 * Initialise the unmanaged pvo pool. 667 */ 668 pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc( 669 BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); 670 pmap_bpvo_pool_index = 0; 671 672 /* 673 * Make sure kernel vsid is allocated as well as VSID 0. 674 */ 675 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 676 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 677 pmap_vsid_bitmap[0] |= 1; 678 679 /* 680 * Set up the OpenFirmware pmap and add it's mappings. 681 */ 682 pmap_pinit(&ofw_pmap); 683 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 684 if ((chosen = OF_finddevice("/chosen")) == -1) 685 panic("pmap_bootstrap: can't find /chosen"); 686 OF_getprop(chosen, "mmu", &mmui, 4); 687 if ((mmu = OF_instance_to_package(mmui)) == -1) 688 panic("pmap_bootstrap: can't get mmu package"); 689 if ((sz = OF_getproplen(mmu, "translations")) == -1) 690 panic("pmap_bootstrap: can't get ofw translation count"); 691 if (sizeof(translations) < sz) 692 panic("pmap_bootstrap: translations too small"); 693 bzero(translations, sz); 694 if (OF_getprop(mmu, "translations", translations, sz) == -1) 695 panic("pmap_bootstrap: can't get ofw translations"); 696 CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 697 sz /= sizeof(*translations); 698 qsort(translations, sz, sizeof (*translations), om_cmp); 699 for (i = 0; i < sz; i++) { 700 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 701 translations[i].om_pa, translations[i].om_va, 702 translations[i].om_len); 703 704 /* Drop stuff below something? */ 705 706 /* Enter the pages? */ 707 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 708 struct vm_page m; 709 710 m.phys_addr = translations[i].om_pa + off; 711 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 712 VM_PROT_ALL, 1); 713 } 714 } 715 #ifdef SMP 716 TLBSYNC(); 717 #endif 718 719 /* 720 * Initialize the kernel pmap (which is statically allocated). 721 */ 722 for (i = 0; i < 16; i++) { 723 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 724 } 725 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 726 kernel_pmap->pm_active = ~0; 727 728 /* 729 * Allocate a kernel stack with a guard page for thread0 and map it 730 * into the kernel page map. 731 */ 732 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 733 kstack0_phys = pa; 734 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 735 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 736 kstack0); 737 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 738 for (i = 0; i < KSTACK_PAGES; i++) { 739 pa = kstack0_phys + i * PAGE_SIZE; 740 va = kstack0 + i * PAGE_SIZE; 741 pmap_kenter(va, pa); 742 TLBIE(va); 743 } 744 745 /* 746 * Calculate the first and last available physical addresses. 747 */ 748 avail_start = phys_avail[0]; 749 for (i = 0; phys_avail[i + 2] != 0; i += 2) 750 ; 751 avail_end = phys_avail[i + 1]; 752 Maxmem = powerpc_btop(avail_end); 753 754 /* 755 * Allocate virtual address space for the message buffer. 756 */ 757 msgbufp = (struct msgbuf *)virtual_avail; 758 virtual_avail += round_page(MSGBUF_SIZE); 759 760 /* 761 * Initialize hardware. 762 */ 763 for (i = 0; i < 16; i++) { 764 mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 765 } 766 __asm __volatile ("mtsr %0,%1" 767 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 768 __asm __volatile ("sync; mtsdr1 %0; isync" 769 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 770 tlbia(); 771 772 pmap_bootstrapped++; 773 } 774 775 /* 776 * Activate a user pmap. The pmap must be activated before it's address 777 * space can be accessed in any way. 778 */ 779 void 780 pmap_activate(struct thread *td) 781 { 782 pmap_t pm, pmr; 783 784 /* 785 * Load all the data we need up front to encourasge the compiler to 786 * not issue any loads while we have interrupts disabled below. 787 */ 788 pm = &td->td_proc->p_vmspace->vm_pmap; 789 790 KASSERT(pm->pm_active == 0, ("pmap_activate: pmap already active?")); 791 792 if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 793 pmr = pm; 794 795 pm->pm_active |= PCPU_GET(cpumask); 796 PCPU_SET(curpmap, pmr); 797 } 798 799 void 800 pmap_deactivate(struct thread *td) 801 { 802 pmap_t pm; 803 804 pm = &td->td_proc->p_vmspace->vm_pmap; 805 pm->pm_active &= ~(PCPU_GET(cpumask)); 806 PCPU_SET(curpmap, NULL); 807 } 808 809 vm_offset_t 810 pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 811 { 812 813 return (va); 814 } 815 816 void 817 pmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 818 { 819 struct pvo_entry *pvo; 820 821 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 822 823 if (pvo != NULL) { 824 if (wired) { 825 if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 826 pm->pm_stats.wired_count++; 827 pvo->pvo_vaddr |= PVO_WIRED; 828 } else { 829 if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 830 pm->pm_stats.wired_count--; 831 pvo->pvo_vaddr &= ~PVO_WIRED; 832 } 833 } 834 } 835 836 void 837 pmap_clear_modify(vm_page_t m) 838 { 839 840 if (m->flags * PG_FICTITIOUS) 841 return; 842 pmap_clear_bit(m, PTE_CHG); 843 } 844 845 void 846 pmap_collect(void) 847 { 848 TODO; 849 } 850 851 void 852 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 853 vm_size_t len, vm_offset_t src_addr) 854 { 855 856 /* 857 * This is not needed as it's mainly an optimisation. 858 * It may want to be implemented later though. 859 */ 860 } 861 862 void 863 pmap_copy_page(vm_page_t msrc, vm_page_t mdst) 864 { 865 vm_offset_t dst; 866 vm_offset_t src; 867 868 dst = VM_PAGE_TO_PHYS(mdst); 869 src = VM_PAGE_TO_PHYS(msrc); 870 871 kcopy((void *)src, (void *)dst, PAGE_SIZE); 872 } 873 874 /* 875 * Zero a page of physical memory by temporarily mapping it into the tlb. 876 */ 877 void 878 pmap_zero_page(vm_page_t m) 879 { 880 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 881 caddr_t va; 882 int i; 883 884 if (pa < SEGMENT_LENGTH) { 885 va = (caddr_t) pa; 886 } else if (pmap_initialized) { 887 if (pmap_pvo_zeropage == NULL) 888 pmap_pvo_zeropage = pmap_rkva_alloc(); 889 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 890 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 891 } else { 892 panic("pmap_zero_page: can't zero pa %#x", pa); 893 } 894 895 bzero(va, PAGE_SIZE); 896 897 for (i = PAGE_SIZE / CACHELINESIZE; i > 0; i--) { 898 __asm __volatile("dcbz 0,%0" :: "r"(va)); 899 va += CACHELINESIZE; 900 } 901 902 if (pa >= SEGMENT_LENGTH) 903 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 904 } 905 906 void 907 pmap_zero_page_area(vm_page_t m, int off, int size) 908 { 909 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 910 caddr_t va; 911 int i; 912 913 if (pa < SEGMENT_LENGTH) { 914 va = (caddr_t) pa; 915 } else if (pmap_initialized) { 916 if (pmap_pvo_zeropage == NULL) 917 pmap_pvo_zeropage = pmap_rkva_alloc(); 918 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 919 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 920 } else { 921 panic("pmap_zero_page: can't zero pa %#x", pa); 922 } 923 924 bzero(va, size); 925 926 for (i = size / CACHELINESIZE; i > 0; i--) { 927 __asm __volatile("dcbz 0,%0" :: "r"(va)); 928 va += CACHELINESIZE; 929 } 930 931 if (pa >= SEGMENT_LENGTH) 932 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 933 } 934 935 void 936 pmap_zero_page_idle(vm_page_t m) 937 { 938 939 /* XXX this is called outside of Giant, is pmap_zero_page safe? */ 940 /* XXX maybe have a dedicated mapping for this to avoid the problem? */ 941 mtx_lock(&Giant); 942 pmap_zero_page(m); 943 mtx_unlock(&Giant); 944 } 945 946 /* 947 * Map the given physical page at the specified virtual address in the 948 * target pmap with the protection requested. If specified the page 949 * will be wired down. 950 */ 951 void 952 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 953 boolean_t wired) 954 { 955 struct pvo_head *pvo_head; 956 uma_zone_t zone; 957 vm_page_t pg; 958 u_int pte_lo, pvo_flags, was_exec, i; 959 int error; 960 961 if (!pmap_initialized) { 962 pvo_head = &pmap_pvo_kunmanaged; 963 zone = pmap_upvo_zone; 964 pvo_flags = 0; 965 pg = NULL; 966 was_exec = PTE_EXEC; 967 } else { 968 pvo_head = pa_to_pvoh(VM_PAGE_TO_PHYS(m), &pg); 969 zone = pmap_mpvo_zone; 970 pvo_flags = PVO_MANAGED; 971 was_exec = 0; 972 } 973 974 /* 975 * If this is a managed page, and it's the first reference to the page, 976 * clear the execness of the page. Otherwise fetch the execness. 977 */ 978 if (pg != NULL) { 979 if (LIST_EMPTY(pvo_head)) { 980 pmap_attr_clear(pg, PTE_EXEC); 981 } else { 982 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 983 } 984 } 985 986 987 /* 988 * Assume the page is cache inhibited and access is guarded unless 989 * it's in our available memory array. 990 */ 991 pte_lo = PTE_I | PTE_G; 992 for (i = 0; i < pregions_sz; i++) { 993 if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 994 (VM_PAGE_TO_PHYS(m) < 995 (pregions[i].mr_start + pregions[i].mr_size))) { 996 pte_lo &= ~(PTE_I | PTE_G); 997 break; 998 } 999 } 1000 1001 if (prot & VM_PROT_WRITE) 1002 pte_lo |= PTE_BW; 1003 else 1004 pte_lo |= PTE_BR; 1005 1006 pvo_flags |= (prot & VM_PROT_EXECUTE); 1007 1008 if (wired) 1009 pvo_flags |= PVO_WIRED; 1010 1011 error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 1012 pte_lo, pvo_flags); 1013 1014 /* 1015 * Flush the real page from the instruction cache if this page is 1016 * mapped executable and cacheable and was not previously mapped (or 1017 * was not mapped executable). 1018 */ 1019 if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 1020 (pte_lo & PTE_I) == 0 && was_exec == 0) { 1021 /* 1022 * Flush the real memory from the cache. 1023 */ 1024 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 1025 if (pg != NULL) 1026 pmap_attr_save(pg, PTE_EXEC); 1027 } 1028 } 1029 1030 vm_offset_t 1031 pmap_extract(pmap_t pm, vm_offset_t va) 1032 { 1033 struct pvo_entry *pvo; 1034 1035 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 1036 1037 if (pvo != NULL) { 1038 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 1039 } 1040 1041 return (0); 1042 } 1043 1044 /* 1045 * Grow the number of kernel page table entries. Unneeded. 1046 */ 1047 void 1048 pmap_growkernel(vm_offset_t addr) 1049 { 1050 } 1051 1052 void 1053 pmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 1054 { 1055 1056 CTR0(KTR_PMAP, "pmap_init"); 1057 1058 pmap_pvo_obj = vm_object_allocate(OBJT_PHYS, 16); 1059 pmap_pvo_count = 0; 1060 pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 1061 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 1062 uma_zone_set_allocf(pmap_upvo_zone, pmap_pvo_allocf); 1063 pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 1064 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 1065 uma_zone_set_allocf(pmap_mpvo_zone, pmap_pvo_allocf); 1066 pmap_initialized = TRUE; 1067 } 1068 1069 void 1070 pmap_init2(void) 1071 { 1072 1073 CTR0(KTR_PMAP, "pmap_init2"); 1074 } 1075 1076 boolean_t 1077 pmap_is_modified(vm_page_t m) 1078 { 1079 1080 if (m->flags & PG_FICTITIOUS) 1081 return (FALSE); 1082 1083 return (pmap_query_bit(m, PTE_CHG)); 1084 } 1085 1086 void 1087 pmap_clear_reference(vm_page_t m) 1088 { 1089 TODO; 1090 } 1091 1092 /* 1093 * pmap_ts_referenced: 1094 * 1095 * Return a count of reference bits for a page, clearing those bits. 1096 * It is not necessary for every reference bit to be cleared, but it 1097 * is necessary that 0 only be returned when there are truly no 1098 * reference bits set. 1099 * 1100 * XXX: The exact number of bits to check and clear is a matter that 1101 * should be tested and standardized at some point in the future for 1102 * optimal aging of shared pages. 1103 */ 1104 1105 int 1106 pmap_ts_referenced(vm_page_t m) 1107 { 1108 TODO; 1109 return (0); 1110 } 1111 1112 /* 1113 * Map a wired page into kernel virtual address space. 1114 */ 1115 void 1116 pmap_kenter(vm_offset_t va, vm_offset_t pa) 1117 { 1118 u_int pte_lo; 1119 int error; 1120 int i; 1121 1122 #if 0 1123 if (va < VM_MIN_KERNEL_ADDRESS) 1124 panic("pmap_kenter: attempt to enter non-kernel address %#x", 1125 va); 1126 #endif 1127 1128 pte_lo = PTE_I | PTE_G | PTE_BW; 1129 for (i = 0; phys_avail[i + 2] != 0; i += 2) { 1130 if (pa >= phys_avail[i] && pa < phys_avail[i + 1]) { 1131 pte_lo &= ~(PTE_I | PTE_G); 1132 break; 1133 } 1134 } 1135 1136 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 1137 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 1138 1139 if (error != 0 && error != ENOENT) 1140 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 1141 pa, error); 1142 1143 /* 1144 * Flush the real memory from the instruction cache. 1145 */ 1146 if ((pte_lo & (PTE_I | PTE_G)) == 0) { 1147 pmap_syncicache(pa, PAGE_SIZE); 1148 } 1149 } 1150 1151 /* 1152 * Extract the physical page address associated with the given kernel virtual 1153 * address. 1154 */ 1155 vm_offset_t 1156 pmap_kextract(vm_offset_t va) 1157 { 1158 struct pvo_entry *pvo; 1159 1160 pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 1161 if (pvo == NULL) { 1162 return (0); 1163 } 1164 1165 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 1166 } 1167 1168 /* 1169 * Remove a wired page from kernel virtual address space. 1170 */ 1171 void 1172 pmap_kremove(vm_offset_t va) 1173 { 1174 1175 pmap_remove(kernel_pmap, va, roundup(va, PAGE_SIZE)); 1176 } 1177 1178 /* 1179 * Map a range of physical addresses into kernel virtual address space. 1180 * 1181 * The value passed in *virt is a suggested virtual address for the mapping. 1182 * Architectures which can support a direct-mapped physical to virtual region 1183 * can return the appropriate address within that region, leaving '*virt' 1184 * unchanged. We cannot and therefore do not; *virt is updated with the 1185 * first usable address after the mapped region. 1186 */ 1187 vm_offset_t 1188 pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 1189 { 1190 vm_offset_t sva, va; 1191 1192 sva = *virt; 1193 va = sva; 1194 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 1195 pmap_kenter(va, pa_start); 1196 *virt = va; 1197 return (sva); 1198 } 1199 1200 int 1201 pmap_mincore(pmap_t pmap, vm_offset_t addr) 1202 { 1203 TODO; 1204 return (0); 1205 } 1206 1207 void 1208 pmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1209 vm_pindex_t pindex, vm_size_t size, int limit) 1210 { 1211 1212 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1213 ("pmap_remove_pages: non current pmap")); 1214 /* XXX */ 1215 } 1216 1217 /* 1218 * Lower the permission for all mappings to a given page. 1219 */ 1220 void 1221 pmap_page_protect(vm_page_t m, vm_prot_t prot) 1222 { 1223 struct pvo_head *pvo_head; 1224 struct pvo_entry *pvo, *next_pvo; 1225 struct pte *pt; 1226 1227 /* 1228 * Since the routine only downgrades protection, if the 1229 * maximal protection is desired, there isn't any change 1230 * to be made. 1231 */ 1232 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 1233 (VM_PROT_READ|VM_PROT_WRITE)) 1234 return; 1235 1236 pvo_head = vm_page_to_pvoh(m); 1237 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1238 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1239 PMAP_PVO_CHECK(pvo); /* sanity check */ 1240 1241 /* 1242 * Downgrading to no mapping at all, we just remove the entry. 1243 */ 1244 if ((prot & VM_PROT_READ) == 0) { 1245 pmap_pvo_remove(pvo, -1); 1246 continue; 1247 } 1248 1249 /* 1250 * If EXEC permission is being revoked, just clear the flag 1251 * in the PVO. 1252 */ 1253 if ((prot & VM_PROT_EXECUTE) == 0) 1254 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1255 1256 /* 1257 * If this entry is already RO, don't diddle with the page 1258 * table. 1259 */ 1260 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1261 PMAP_PVO_CHECK(pvo); 1262 continue; 1263 } 1264 1265 /* 1266 * Grab the PTE before we diddle the bits so pvo_to_pte can 1267 * verify the pte contents are as expected. 1268 */ 1269 pt = pmap_pvo_to_pte(pvo, -1); 1270 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1271 pvo->pvo_pte.pte_lo |= PTE_BR; 1272 if (pt != NULL) 1273 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1274 PMAP_PVO_CHECK(pvo); /* sanity check */ 1275 } 1276 } 1277 1278 /* 1279 * Make the specified page pageable (or not). Unneeded. 1280 */ 1281 void 1282 pmap_pageable(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, 1283 boolean_t pageable) 1284 { 1285 } 1286 1287 /* 1288 * Returns true if the pmap's pv is one of the first 1289 * 16 pvs linked to from this page. This count may 1290 * be changed upwards or downwards in the future; it 1291 * is only necessary that true be returned for a small 1292 * subset of pmaps for proper page aging. 1293 */ 1294 boolean_t 1295 pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 1296 { 1297 TODO; 1298 return (0); 1299 } 1300 1301 static u_int pmap_vsidcontext; 1302 1303 void 1304 pmap_pinit(pmap_t pmap) 1305 { 1306 int i, mask; 1307 u_int entropy; 1308 1309 entropy = 0; 1310 __asm __volatile("mftb %0" : "=r"(entropy)); 1311 1312 /* 1313 * Allocate some segment registers for this pmap. 1314 */ 1315 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1316 u_int hash, n; 1317 1318 /* 1319 * Create a new value by mutiplying by a prime and adding in 1320 * entropy from the timebase register. This is to make the 1321 * VSID more random so that the PT hash function collides 1322 * less often. (Note that the prime casues gcc to do shifts 1323 * instead of a multiply.) 1324 */ 1325 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1326 hash = pmap_vsidcontext & (NPMAPS - 1); 1327 if (hash == 0) /* 0 is special, avoid it */ 1328 continue; 1329 n = hash >> 5; 1330 mask = 1 << (hash & (VSID_NBPW - 1)); 1331 hash = (pmap_vsidcontext & 0xfffff); 1332 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1333 /* anything free in this bucket? */ 1334 if (pmap_vsid_bitmap[n] == 0xffffffff) { 1335 entropy = (pmap_vsidcontext >> 20); 1336 continue; 1337 } 1338 i = ffs(~pmap_vsid_bitmap[i]) - 1; 1339 mask = 1 << i; 1340 hash &= 0xfffff & ~(VSID_NBPW - 1); 1341 hash |= i; 1342 } 1343 pmap_vsid_bitmap[n] |= mask; 1344 for (i = 0; i < 16; i++) 1345 pmap->pm_sr[i] = VSID_MAKE(i, hash); 1346 return; 1347 } 1348 1349 panic("pmap_pinit: out of segments"); 1350 } 1351 1352 /* 1353 * Initialize the pmap associated with process 0. 1354 */ 1355 void 1356 pmap_pinit0(pmap_t pm) 1357 { 1358 1359 pmap_pinit(pm); 1360 bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 1361 } 1362 1363 void 1364 pmap_pinit2(pmap_t pmap) 1365 { 1366 /* XXX: Remove this stub when no longer called */ 1367 } 1368 1369 void 1370 pmap_prefault(pmap_t pm, vm_offset_t va, vm_map_entry_t entry) 1371 { 1372 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1373 ("pmap_prefault: non current pmap")); 1374 /* XXX */ 1375 } 1376 1377 /* 1378 * Set the physical protection on the specified range of this map as requested. 1379 */ 1380 void 1381 pmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1382 { 1383 struct pvo_entry *pvo; 1384 struct pte *pt; 1385 int pteidx; 1386 1387 CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 1388 eva, prot); 1389 1390 1391 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1392 ("pmap_protect: non current pmap")); 1393 1394 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1395 pmap_remove(pm, sva, eva); 1396 return; 1397 } 1398 1399 for (; sva < eva; sva += PAGE_SIZE) { 1400 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1401 if (pvo == NULL) 1402 continue; 1403 1404 if ((prot & VM_PROT_EXECUTE) == 0) 1405 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1406 1407 /* 1408 * Grab the PTE pointer before we diddle with the cached PTE 1409 * copy. 1410 */ 1411 pt = pmap_pvo_to_pte(pvo, pteidx); 1412 /* 1413 * Change the protection of the page. 1414 */ 1415 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1416 pvo->pvo_pte.pte_lo |= PTE_BR; 1417 1418 /* 1419 * If the PVO is in the page table, update that pte as well. 1420 */ 1421 if (pt != NULL) 1422 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1423 } 1424 } 1425 1426 vm_offset_t 1427 pmap_phys_address(int ppn) 1428 { 1429 TODO; 1430 return (0); 1431 } 1432 1433 /* 1434 * Map a list of wired pages into kernel virtual address space. This is 1435 * intended for temporary mappings which do not need page modification or 1436 * references recorded. Existing mappings in the region are overwritten. 1437 */ 1438 void 1439 pmap_qenter(vm_offset_t va, vm_page_t *m, int count) 1440 { 1441 int i; 1442 1443 for (i = 0; i < count; i++, va += PAGE_SIZE) 1444 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i])); 1445 } 1446 1447 /* 1448 * Remove page mappings from kernel virtual address space. Intended for 1449 * temporary mappings entered by pmap_qenter. 1450 */ 1451 void 1452 pmap_qremove(vm_offset_t va, int count) 1453 { 1454 int i; 1455 1456 for (i = 0; i < count; i++, va += PAGE_SIZE) 1457 pmap_kremove(va); 1458 } 1459 1460 void 1461 pmap_release(pmap_t pmap) 1462 { 1463 TODO; 1464 } 1465 1466 /* 1467 * Remove the given range of addresses from the specified map. 1468 */ 1469 void 1470 pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1471 { 1472 struct pvo_entry *pvo; 1473 int pteidx; 1474 1475 for (; sva < eva; sva += PAGE_SIZE) { 1476 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1477 if (pvo != NULL) { 1478 pmap_pvo_remove(pvo, pteidx); 1479 } 1480 } 1481 } 1482 1483 /* 1484 * Remove all pages from specified address space, this aids process exit 1485 * speeds. This is much faster than pmap_remove in the case of running down 1486 * an entire address space. Only works for the current pmap. 1487 */ 1488 void 1489 pmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1490 { 1491 1492 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1493 ("pmap_remove_pages: non current pmap")); 1494 pmap_remove(pm, sva, eva); 1495 } 1496 1497 /* 1498 * Create the kernel stack and pcb for a new thread. 1499 * This routine directly affects the fork perf for a process and 1500 * create performance for a thread. 1501 */ 1502 void 1503 pmap_new_thread(struct thread *td) 1504 { 1505 vm_object_t ksobj; 1506 vm_offset_t ks; 1507 vm_page_t m; 1508 u_int i; 1509 1510 /* 1511 * Allocate object for the kstack. 1512 */ 1513 ksobj = vm_object_allocate(OBJT_DEFAULT, KSTACK_PAGES); 1514 td->td_kstack_obj = ksobj; 1515 1516 /* 1517 * Get a kernel virtual address for the kstack for this thread. 1518 */ 1519 ks = kmem_alloc_nofault(kernel_map, 1520 (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE); 1521 if (ks == 0) 1522 panic("pmap_new_thread: kstack allocation failed"); 1523 TLBIE(ks); 1524 ks += KSTACK_GUARD_PAGES * PAGE_SIZE; 1525 td->td_kstack = ks; 1526 1527 for (i = 0; i < KSTACK_PAGES; i++) { 1528 /* 1529 * Get a kernel stack page. 1530 */ 1531 m = vm_page_grab(ksobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1532 1533 /* 1534 * Wire the page. 1535 */ 1536 m->wire_count++; 1537 1538 /* 1539 * Enter the page into the kernel address space. 1540 */ 1541 pmap_kenter(ks + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1542 1543 vm_page_wakeup(m); 1544 vm_page_flag_clear(m, PG_ZERO); 1545 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1546 m->valid = VM_PAGE_BITS_ALL; 1547 } 1548 } 1549 1550 void 1551 pmap_dispose_thread(struct thread *td) 1552 { 1553 TODO; 1554 } 1555 1556 void 1557 pmap_swapin_thread(struct thread *td) 1558 { 1559 TODO; 1560 } 1561 1562 void 1563 pmap_swapout_thread(struct thread *td) 1564 { 1565 TODO; 1566 } 1567 1568 /* 1569 * Allocate a physical page of memory directly from the phys_avail map. 1570 * Can only be called from pmap_bootstrap before avail start and end are 1571 * calculated. 1572 */ 1573 static vm_offset_t 1574 pmap_bootstrap_alloc(vm_size_t size, u_int align) 1575 { 1576 vm_offset_t s, e; 1577 int i, j; 1578 1579 size = round_page(size); 1580 for (i = 0; phys_avail[i + 1] != 0; i += 2) { 1581 if (align != 0) 1582 s = (phys_avail[i] + align - 1) & ~(align - 1); 1583 else 1584 s = phys_avail[i]; 1585 e = s + size; 1586 1587 if (s < phys_avail[i] || e > phys_avail[i + 1]) 1588 continue; 1589 1590 if (s == phys_avail[i]) { 1591 phys_avail[i] += size; 1592 } else if (e == phys_avail[i + 1]) { 1593 phys_avail[i + 1] -= size; 1594 } else { 1595 for (j = phys_avail_count * 2; j > i; j -= 2) { 1596 phys_avail[j] = phys_avail[j - 2]; 1597 phys_avail[j + 1] = phys_avail[j - 1]; 1598 } 1599 1600 phys_avail[i + 3] = phys_avail[i + 1]; 1601 phys_avail[i + 1] = s; 1602 phys_avail[i + 2] = e; 1603 phys_avail_count++; 1604 } 1605 1606 return (s); 1607 } 1608 panic("pmap_bootstrap_alloc: could not allocate memory"); 1609 } 1610 1611 /* 1612 * Return an unmapped pvo for a kernel virtual address. 1613 * Used by pmap functions that operate on physical pages. 1614 */ 1615 static struct pvo_entry * 1616 pmap_rkva_alloc(void) 1617 { 1618 struct pvo_entry *pvo; 1619 struct pte *pt; 1620 vm_offset_t kva; 1621 int pteidx; 1622 1623 if (pmap_rkva_count == 0) 1624 panic("pmap_rkva_alloc: no more reserved KVAs"); 1625 1626 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 1627 pmap_kenter(kva, 0); 1628 1629 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 1630 1631 if (pvo == NULL) 1632 panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 1633 1634 pt = pmap_pvo_to_pte(pvo, pteidx); 1635 1636 if (pt == NULL) 1637 panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 1638 1639 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1640 PVO_PTEGIDX_CLR(pvo); 1641 1642 pmap_pte_overflow++; 1643 1644 return (pvo); 1645 } 1646 1647 static void 1648 pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 1649 int *depth_p) 1650 { 1651 struct pte *pt; 1652 1653 /* 1654 * If this pvo already has a valid pte, we need to save it so it can 1655 * be restored later. We then just reload the new PTE over the old 1656 * slot. 1657 */ 1658 if (saved_pt != NULL) { 1659 pt = pmap_pvo_to_pte(pvo, -1); 1660 1661 if (pt != NULL) { 1662 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1663 PVO_PTEGIDX_CLR(pvo); 1664 pmap_pte_overflow++; 1665 } 1666 1667 *saved_pt = pvo->pvo_pte; 1668 1669 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1670 } 1671 1672 pvo->pvo_pte.pte_lo |= pa; 1673 1674 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1675 panic("pmap_pa_map: could not spill pvo %p", pvo); 1676 1677 if (depth_p != NULL) 1678 (*depth_p)++; 1679 } 1680 1681 static void 1682 pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 1683 { 1684 struct pte *pt; 1685 1686 pt = pmap_pvo_to_pte(pvo, -1); 1687 1688 if (pt != NULL) { 1689 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1690 PVO_PTEGIDX_CLR(pvo); 1691 pmap_pte_overflow++; 1692 } 1693 1694 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1695 1696 /* 1697 * If there is a saved PTE and it's valid, restore it and return. 1698 */ 1699 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 1700 if (depth_p != NULL && --(*depth_p) == 0) 1701 panic("pmap_pa_unmap: restoring but depth == 0"); 1702 1703 pvo->pvo_pte = *saved_pt; 1704 1705 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1706 panic("pmap_pa_unmap: could not spill pvo %p", pvo); 1707 } 1708 } 1709 1710 static void 1711 pmap_syncicache(vm_offset_t pa, vm_size_t len) 1712 { 1713 __syncicache((void *)pa, len); 1714 } 1715 1716 static void 1717 tlbia(void) 1718 { 1719 caddr_t i; 1720 1721 SYNC(); 1722 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 1723 TLBIE(i); 1724 EIEIO(); 1725 } 1726 TLBSYNC(); 1727 SYNC(); 1728 } 1729 1730 static int 1731 pmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 1732 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 1733 { 1734 struct pvo_entry *pvo; 1735 u_int sr; 1736 int first; 1737 u_int ptegidx; 1738 int i; 1739 1740 pmap_pvo_enter_calls++; 1741 first = 0; 1742 1743 /* 1744 * Compute the PTE Group index. 1745 */ 1746 va &= ~ADDR_POFF; 1747 sr = va_to_sr(pm->pm_sr, va); 1748 ptegidx = va_to_pteg(sr, va); 1749 1750 /* 1751 * Remove any existing mapping for this page. Reuse the pvo entry if 1752 * there is a mapping. 1753 */ 1754 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1755 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1756 if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 1757 (pvo->pvo_pte.pte_lo & PTE_PP) == 1758 (pte_lo & PTE_PP)) { 1759 return (0); 1760 } 1761 pmap_pvo_remove(pvo, -1); 1762 break; 1763 } 1764 } 1765 1766 /* 1767 * If we aren't overwriting a mapping, try to allocate. 1768 */ 1769 if (pmap_initialized) { 1770 pvo = uma_zalloc(zone, M_NOWAIT); 1771 } else { 1772 if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) { 1773 panic("pmap_enter: bpvo pool exhausted, %d, %d, %d", 1774 pmap_bpvo_pool_index, BPVO_POOL_SIZE, 1775 BPVO_POOL_SIZE * sizeof(struct pvo_entry)); 1776 } 1777 pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 1778 pmap_bpvo_pool_index++; 1779 pvo->pvo_vaddr |= PVO_BOOTSTRAP; 1780 } 1781 1782 if (pvo == NULL) { 1783 return (ENOMEM); 1784 } 1785 1786 pmap_pvo_entries++; 1787 pvo->pvo_vaddr = va; 1788 pvo->pvo_pmap = pm; 1789 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1790 pvo->pvo_vaddr &= ~ADDR_POFF; 1791 if (flags & VM_PROT_EXECUTE) 1792 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1793 if (flags & PVO_WIRED) 1794 pvo->pvo_vaddr |= PVO_WIRED; 1795 if (pvo_head != &pmap_pvo_kunmanaged) 1796 pvo->pvo_vaddr |= PVO_MANAGED; 1797 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 1798 1799 /* 1800 * Remember if the list was empty and therefore will be the first 1801 * item. 1802 */ 1803 if (LIST_FIRST(pvo_head) == NULL) 1804 first = 1; 1805 1806 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1807 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1808 pvo->pvo_pmap->pm_stats.wired_count++; 1809 pvo->pvo_pmap->pm_stats.resident_count++; 1810 1811 /* 1812 * We hope this succeeds but it isn't required. 1813 */ 1814 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1815 if (i >= 0) { 1816 PVO_PTEGIDX_SET(pvo, i); 1817 } else { 1818 panic("pmap_pvo_enter: overflow"); 1819 pmap_pte_overflow++; 1820 } 1821 1822 return (first ? ENOENT : 0); 1823 } 1824 1825 static void 1826 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 1827 { 1828 struct pte *pt; 1829 1830 /* 1831 * If there is an active pte entry, we need to deactivate it (and 1832 * save the ref & cfg bits). 1833 */ 1834 pt = pmap_pvo_to_pte(pvo, pteidx); 1835 if (pt != NULL) { 1836 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1837 PVO_PTEGIDX_CLR(pvo); 1838 } else { 1839 pmap_pte_overflow--; 1840 } 1841 1842 /* 1843 * Update our statistics. 1844 */ 1845 pvo->pvo_pmap->pm_stats.resident_count--; 1846 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1847 pvo->pvo_pmap->pm_stats.wired_count--; 1848 1849 /* 1850 * Save the REF/CHG bits into their cache if the page is managed. 1851 */ 1852 if (pvo->pvo_vaddr & PVO_MANAGED) { 1853 struct vm_page *pg; 1854 1855 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 1856 if (pg != NULL) { 1857 pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 1858 (PTE_REF | PTE_CHG)); 1859 } 1860 } 1861 1862 /* 1863 * Remove this PVO from the PV list. 1864 */ 1865 LIST_REMOVE(pvo, pvo_vlink); 1866 1867 /* 1868 * Remove this from the overflow list and return it to the pool 1869 * if we aren't going to reuse it. 1870 */ 1871 LIST_REMOVE(pvo, pvo_olink); 1872 if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 1873 uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 1874 pmap_upvo_zone, pvo); 1875 pmap_pvo_entries--; 1876 pmap_pvo_remove_calls++; 1877 } 1878 1879 static __inline int 1880 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1881 { 1882 int pteidx; 1883 1884 /* 1885 * We can find the actual pte entry without searching by grabbing 1886 * the PTEG index from 3 unused bits in pte_lo[11:9] and by 1887 * noticing the HID bit. 1888 */ 1889 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1890 if (pvo->pvo_pte.pte_hi & PTE_HID) 1891 pteidx ^= pmap_pteg_mask * 8; 1892 1893 return (pteidx); 1894 } 1895 1896 static struct pvo_entry * 1897 pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 1898 { 1899 struct pvo_entry *pvo; 1900 int ptegidx; 1901 u_int sr; 1902 1903 va &= ~ADDR_POFF; 1904 sr = va_to_sr(pm->pm_sr, va); 1905 ptegidx = va_to_pteg(sr, va); 1906 1907 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1908 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1909 if (pteidx_p) 1910 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1911 return (pvo); 1912 } 1913 } 1914 1915 return (NULL); 1916 } 1917 1918 static struct pte * 1919 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1920 { 1921 struct pte *pt; 1922 1923 /* 1924 * If we haven't been supplied the ptegidx, calculate it. 1925 */ 1926 if (pteidx == -1) { 1927 int ptegidx; 1928 u_int sr; 1929 1930 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 1931 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 1932 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1933 } 1934 1935 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1936 1937 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1938 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 1939 "valid pte index", pvo); 1940 } 1941 1942 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1943 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 1944 "pvo but no valid pte", pvo); 1945 } 1946 1947 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1948 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1949 panic("pmap_pvo_to_pte: pvo %p has valid pte in " 1950 "pmap_pteg_table %p but invalid in pvo", pvo, pt); 1951 } 1952 1953 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 1954 != 0) { 1955 panic("pmap_pvo_to_pte: pvo %p pte does not match " 1956 "pte %p in pmap_pteg_table", pvo, pt); 1957 } 1958 1959 return (pt); 1960 } 1961 1962 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1963 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 1964 "pmap_pteg_table but valid in pvo", pvo, pt); 1965 } 1966 1967 return (NULL); 1968 } 1969 1970 static void * 1971 pmap_pvo_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 1972 { 1973 vm_page_t m; 1974 1975 if (bytes != PAGE_SIZE) 1976 panic("pmap_pvo_allocf: benno was shortsighted. hit him."); 1977 1978 *flags = UMA_SLAB_PRIV; 1979 m = vm_page_alloc(pmap_pvo_obj, pmap_pvo_count, VM_ALLOC_SYSTEM); 1980 if (m == NULL) 1981 return (NULL); 1982 pmap_pvo_count++; 1983 return ((void *)VM_PAGE_TO_PHYS(m)); 1984 } 1985 1986 /* 1987 * XXX: THIS STUFF SHOULD BE IN pte.c? 1988 */ 1989 int 1990 pmap_pte_spill(vm_offset_t addr) 1991 { 1992 struct pvo_entry *source_pvo, *victim_pvo; 1993 struct pvo_entry *pvo; 1994 int ptegidx, i, j; 1995 u_int sr; 1996 struct pteg *pteg; 1997 struct pte *pt; 1998 1999 pmap_pte_spills++; 2000 2001 sr = mfsrin(addr); 2002 ptegidx = va_to_pteg(sr, addr); 2003 2004 /* 2005 * Have to substitute some entry. Use the primary hash for this. 2006 * Use low bits of timebase as random generator. 2007 */ 2008 pteg = &pmap_pteg_table[ptegidx]; 2009 __asm __volatile("mftb %0" : "=r"(i)); 2010 i &= 7; 2011 pt = &pteg->pt[i]; 2012 2013 source_pvo = NULL; 2014 victim_pvo = NULL; 2015 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2016 /* 2017 * We need to find a pvo entry for this address. 2018 */ 2019 PMAP_PVO_CHECK(pvo); 2020 if (source_pvo == NULL && 2021 pmap_pte_match(&pvo->pvo_pte, sr, addr, 2022 pvo->pvo_pte.pte_hi & PTE_HID)) { 2023 /* 2024 * Now found an entry to be spilled into the pteg. 2025 * The PTE is now valid, so we know it's active. 2026 */ 2027 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 2028 2029 if (j >= 0) { 2030 PVO_PTEGIDX_SET(pvo, j); 2031 pmap_pte_overflow--; 2032 PMAP_PVO_CHECK(pvo); 2033 return (1); 2034 } 2035 2036 source_pvo = pvo; 2037 2038 if (victim_pvo != NULL) 2039 break; 2040 } 2041 2042 /* 2043 * We also need the pvo entry of the victim we are replacing 2044 * so save the R & C bits of the PTE. 2045 */ 2046 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 2047 pmap_pte_compare(pt, &pvo->pvo_pte)) { 2048 victim_pvo = pvo; 2049 if (source_pvo != NULL) 2050 break; 2051 } 2052 } 2053 2054 if (source_pvo == NULL) 2055 return (0); 2056 2057 if (victim_pvo == NULL) { 2058 if ((pt->pte_hi & PTE_HID) == 0) 2059 panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 2060 "entry", pt); 2061 2062 /* 2063 * If this is a secondary PTE, we need to search it's primary 2064 * pvo bucket for the matching PVO. 2065 */ 2066 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 2067 pvo_olink) { 2068 PMAP_PVO_CHECK(pvo); 2069 /* 2070 * We also need the pvo entry of the victim we are 2071 * replacing so save the R & C bits of the PTE. 2072 */ 2073 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 2074 victim_pvo = pvo; 2075 break; 2076 } 2077 } 2078 2079 if (victim_pvo == NULL) 2080 panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 2081 "entry", pt); 2082 } 2083 2084 /* 2085 * We are invalidating the TLB entry for the EA we are replacing even 2086 * though it's valid. If we don't, we lose any ref/chg bit changes 2087 * contained in the TLB entry. 2088 */ 2089 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 2090 2091 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 2092 pmap_pte_set(pt, &source_pvo->pvo_pte); 2093 2094 PVO_PTEGIDX_CLR(victim_pvo); 2095 PVO_PTEGIDX_SET(source_pvo, i); 2096 pmap_pte_replacements++; 2097 2098 PMAP_PVO_CHECK(victim_pvo); 2099 PMAP_PVO_CHECK(source_pvo); 2100 2101 return (1); 2102 } 2103 2104 static int 2105 pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 2106 { 2107 struct pte *pt; 2108 int i; 2109 2110 /* 2111 * First try primary hash. 2112 */ 2113 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2114 if ((pt->pte_hi & PTE_VALID) == 0) { 2115 pvo_pt->pte_hi &= ~PTE_HID; 2116 pmap_pte_set(pt, pvo_pt); 2117 return (i); 2118 } 2119 } 2120 2121 /* 2122 * Now try secondary hash. 2123 */ 2124 ptegidx ^= pmap_pteg_mask; 2125 ptegidx++; 2126 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2127 if ((pt->pte_hi & PTE_VALID) == 0) { 2128 pvo_pt->pte_hi |= PTE_HID; 2129 pmap_pte_set(pt, pvo_pt); 2130 return (i); 2131 } 2132 } 2133 2134 panic("pmap_pte_insert: overflow"); 2135 return (-1); 2136 } 2137 2138 static boolean_t 2139 pmap_query_bit(vm_page_t m, int ptebit) 2140 { 2141 struct pvo_entry *pvo; 2142 struct pte *pt; 2143 2144 if (pmap_attr_fetch(m) & ptebit) 2145 return (TRUE); 2146 2147 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2148 PMAP_PVO_CHECK(pvo); /* sanity check */ 2149 2150 /* 2151 * See if we saved the bit off. If so, cache it and return 2152 * success. 2153 */ 2154 if (pvo->pvo_pte.pte_lo & ptebit) { 2155 pmap_attr_save(m, ptebit); 2156 PMAP_PVO_CHECK(pvo); /* sanity check */ 2157 return (TRUE); 2158 } 2159 } 2160 2161 /* 2162 * No luck, now go through the hard part of looking at the PTEs 2163 * themselves. Sync so that any pending REF/CHG bits are flushed to 2164 * the PTEs. 2165 */ 2166 SYNC(); 2167 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2168 PMAP_PVO_CHECK(pvo); /* sanity check */ 2169 2170 /* 2171 * See if this pvo has a valid PTE. if so, fetch the 2172 * REF/CHG bits from the valid PTE. If the appropriate 2173 * ptebit is set, cache it and return success. 2174 */ 2175 pt = pmap_pvo_to_pte(pvo, -1); 2176 if (pt != NULL) { 2177 pmap_pte_synch(pt, &pvo->pvo_pte); 2178 if (pvo->pvo_pte.pte_lo & ptebit) { 2179 pmap_attr_save(m, ptebit); 2180 PMAP_PVO_CHECK(pvo); /* sanity check */ 2181 return (TRUE); 2182 } 2183 } 2184 } 2185 2186 return (TRUE); 2187 } 2188 2189 static boolean_t 2190 pmap_clear_bit(vm_page_t m, int ptebit) 2191 { 2192 struct pvo_entry *pvo; 2193 struct pte *pt; 2194 int rv; 2195 2196 /* 2197 * Clear the cached value. 2198 */ 2199 rv = pmap_attr_fetch(m); 2200 pmap_attr_clear(m, ptebit); 2201 2202 /* 2203 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 2204 * we can reset the right ones). note that since the pvo entries and 2205 * list heads are accessed via BAT0 and are never placed in the page 2206 * table, we don't have to worry about further accesses setting the 2207 * REF/CHG bits. 2208 */ 2209 SYNC(); 2210 2211 /* 2212 * For each pvo entry, clear the pvo's ptebit. If this pvo has a 2213 * valid pte clear the ptebit from the valid pte. 2214 */ 2215 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2216 PMAP_PVO_CHECK(pvo); /* sanity check */ 2217 pt = pmap_pvo_to_pte(pvo, -1); 2218 if (pt != NULL) { 2219 pmap_pte_synch(pt, &pvo->pvo_pte); 2220 if (pvo->pvo_pte.pte_lo & ptebit) 2221 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2222 } 2223 rv |= pvo->pvo_pte.pte_lo; 2224 pvo->pvo_pte.pte_lo &= ~ptebit; 2225 PMAP_PVO_CHECK(pvo); /* sanity check */ 2226 } 2227 2228 return ((rv & ptebit) != 0); 2229 } 2230 2231 /* 2232 * Map a set of physical memory pages into the kernel virtual 2233 * address space. Return a pointer to where it is mapped. This 2234 * routine is intended to be used for mapping device memory, 2235 * NOT real memory. 2236 */ 2237 void * 2238 pmap_mapdev(vm_offset_t pa, vm_size_t size) 2239 { 2240 vm_offset_t va, tmpva, offset; 2241 2242 pa = trunc_page(pa); 2243 offset = pa & PAGE_MASK; 2244 size = roundup(offset + size, PAGE_SIZE); 2245 2246 GIANT_REQUIRED; 2247 2248 va = kmem_alloc_pageable(kernel_map, size); 2249 if (!va) 2250 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 2251 2252 for (tmpva = va; size > 0;) { 2253 pmap_kenter(tmpva, pa); 2254 TLBIE(tmpva); /* XXX or should it be invalidate-all ? */ 2255 size -= PAGE_SIZE; 2256 tmpva += PAGE_SIZE; 2257 pa += PAGE_SIZE; 2258 } 2259 2260 return ((void *)(va + offset)); 2261 } 2262 2263 void 2264 pmap_unmapdev(vm_offset_t va, vm_size_t size) 2265 { 2266 vm_offset_t base, offset; 2267 2268 base = trunc_page(va); 2269 offset = va & PAGE_MASK; 2270 size = roundup(offset + size, PAGE_SIZE); 2271 kmem_free(kernel_map, base, size); 2272 } 2273