xref: /freebsd/sys/dev/vnic/mrml_bridge.c (revision 1da7f3f6f72b2245e458fc7195733268ae4a1136)
1 /*
2  * Copyright (C) 2016 Cavium Inc.
3  * All rights reserved.
4  *
5  * Developed by Semihalf.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 #include "opt_platform.h"
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/resource.h>
36 #include <sys/rman.h>
37 #include <sys/socket.h>
38 #include <sys/queue.h>
39 
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/fdt/simplebus.h>
43 
44 #include <machine/bus.h>
45 #include <machine/resource.h>
46 
47 static MALLOC_DEFINE(M_MRMLB, "MRML bridge", "Cavium MRML bridge");
48 
49 static device_probe_t mrmlb_fdt_probe;
50 static device_attach_t mrmlb_fdt_attach;
51 
52 static struct resource * mrmlb_ofw_bus_alloc_res(device_t, device_t, int, int *,
53     rman_res_t, rman_res_t, rman_res_t, u_int);
54 
55 static const struct ofw_bus_devinfo * mrmlb_ofw_get_devinfo(device_t, device_t);
56 
57 static device_method_t mrmlbus_fdt_methods[] = {
58 	/* Device interface */
59 	DEVMETHOD(device_probe,		mrmlb_fdt_probe),
60 	DEVMETHOD(device_attach,	mrmlb_fdt_attach),
61 
62 	/* Bus interface */
63 	DEVMETHOD(bus_alloc_resource,		mrmlb_ofw_bus_alloc_res),
64 	DEVMETHOD(bus_release_resource,		bus_generic_release_resource),
65 	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
66 
67 	/* ofw_bus interface */
68 	DEVMETHOD(ofw_bus_get_devinfo,	mrmlb_ofw_get_devinfo),
69 	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
70 	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
71 	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
72 	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
73 	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
74 
75 	DEVMETHOD_END
76 };
77 
78 DEFINE_CLASS_0(mrmlbus, mrmlbus_fdt_driver, mrmlbus_fdt_methods,
79     sizeof(struct simplebus_softc));
80 
81 EARLY_DRIVER_MODULE(mrmlbus, pcib, mrmlbus_fdt_driver, 0, 0,
82     BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
83 MODULE_VERSION(mrmlbus, 1);
84 
85 static int mrmlb_ofw_fill_ranges(phandle_t, struct simplebus_softc *);
86 static int mrmlb_ofw_bus_attach(device_t);
87 
88 static int
89 mrmlb_fdt_probe(device_t dev)
90 {
91 
92 	if (!ofw_bus_status_okay(dev))
93 		return (ENXIO);
94 
95 	if (!ofw_bus_is_compatible(dev, "cavium,thunder-8890-mrml-bridge"))
96 		return (ENXIO);
97 
98 	device_set_desc(dev, "Cavium ThunderX MRML bridge");
99 	return (BUS_PROBE_SPECIFIC);
100 }
101 
102 static int
103 mrmlb_fdt_attach(device_t dev)
104 {
105 	int err;
106 
107 	err = mrmlb_ofw_bus_attach(dev);
108 	if (err != 0)
109 		return (err);
110 
111 	return (bus_generic_attach(dev));
112 }
113 
114 /* OFW bus interface */
115 struct mrmlb_ofw_devinfo {
116 	struct ofw_bus_devinfo	di_dinfo;
117 	struct resource_list	di_rl;
118 };
119 
120 static const struct ofw_bus_devinfo *
121 mrmlb_ofw_get_devinfo(device_t bus __unused, device_t child)
122 {
123 	struct mrmlb_ofw_devinfo *di;
124 
125 	di = device_get_ivars(child);
126 	return (&di->di_dinfo);
127 }
128 
129 static struct resource *
130 mrmlb_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
131     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
132 {
133 	struct simplebus_softc *sc;
134 	struct mrmlb_ofw_devinfo *di;
135 	struct resource_list_entry *rle;
136 	int i;
137 
138 	if (RMAN_IS_DEFAULT_RANGE(start, end)) {
139 		if ((di = device_get_ivars(child)) == NULL)
140 			return (NULL);
141 		if (type == SYS_RES_IOPORT)
142 		    type = SYS_RES_MEMORY;
143 
144 		/* Find defaults for this rid */
145 		rle = resource_list_find(&di->di_rl, type, *rid);
146 		if (rle == NULL)
147 			return (NULL);
148 
149 		start = rle->start;
150 		end = rle->end;
151 		count = rle->count;
152 	}
153 
154 	sc = device_get_softc(bus);
155 
156 	if (type == SYS_RES_MEMORY) {
157 		/* Remap through ranges property */
158 		for (i = 0; i < sc->nranges; i++) {
159 			if (start >= sc->ranges[i].bus && end <
160 			    sc->ranges[i].bus + sc->ranges[i].size) {
161 				start -= sc->ranges[i].bus;
162 				start += sc->ranges[i].host;
163 				end -= sc->ranges[i].bus;
164 				end += sc->ranges[i].host;
165 				break;
166 			}
167 		}
168 
169 		if (i == sc->nranges && sc->nranges != 0) {
170 			device_printf(bus, "Could not map resource "
171 			    "%#lx-%#lx\n", start, end);
172 			return (NULL);
173 		}
174 	}
175 
176 	return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
177 	    count, flags));
178 }
179 
180 /* Helper functions */
181 
182 static int
183 mrmlb_ofw_fill_ranges(phandle_t node, struct simplebus_softc *sc)
184 {
185 	int host_address_cells;
186 	cell_t *base_ranges;
187 	ssize_t nbase_ranges;
188 	int err;
189 	int i, j, k;
190 
191 	err = OF_searchencprop(OF_parent(node), "#address-cells",
192 	    &host_address_cells, sizeof(host_address_cells));
193 	if (err <= 0)
194 		return (-1);
195 
196 	nbase_ranges = OF_getproplen(node, "ranges");
197 	if (nbase_ranges < 0)
198 		return (-1);
199 	sc->nranges = nbase_ranges / sizeof(cell_t) /
200 	    (sc->acells + host_address_cells + sc->scells);
201 	if (sc->nranges == 0)
202 		return (0);
203 
204 	sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
205 	    M_MRMLB, M_WAITOK);
206 	base_ranges = malloc(nbase_ranges, M_MRMLB, M_WAITOK);
207 	OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
208 
209 	for (i = 0, j = 0; i < sc->nranges; i++) {
210 		sc->ranges[i].bus = 0;
211 		for (k = 0; k < sc->acells; k++) {
212 			sc->ranges[i].bus <<= 32;
213 			sc->ranges[i].bus |= base_ranges[j++];
214 		}
215 		sc->ranges[i].host = 0;
216 		for (k = 0; k < host_address_cells; k++) {
217 			sc->ranges[i].host <<= 32;
218 			sc->ranges[i].host |= base_ranges[j++];
219 		}
220 		sc->ranges[i].size = 0;
221 		for (k = 0; k < sc->scells; k++) {
222 			sc->ranges[i].size <<= 32;
223 			sc->ranges[i].size |= base_ranges[j++];
224 		}
225 	}
226 
227 	free(base_ranges, M_MRMLB);
228 	return (sc->nranges);
229 }
230 
231 static int
232 mrmlb_ofw_bus_attach(device_t dev)
233 {
234 	struct simplebus_softc *sc;
235 	struct mrmlb_ofw_devinfo *di;
236 	device_t child;
237 	phandle_t parent, node;
238 
239 	parent = ofw_bus_get_node(dev);
240 	simplebus_init(dev, parent);
241 
242 	sc = device_get_softc(dev);
243 
244 	if (mrmlb_ofw_fill_ranges(parent, sc) < 0) {
245 		device_printf(dev, "could not get ranges\n");
246 		return (ENXIO);
247 	}
248 	/* Iterate through all bus subordinates */
249 	for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
250 		/* Allocate and populate devinfo. */
251 		di = malloc(sizeof(*di), M_MRMLB, M_WAITOK | M_ZERO);
252 		if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {
253 			free(di, M_MRMLB);
254 			continue;
255 		}
256 
257 		/* Initialize and populate resource list. */
258 		resource_list_init(&di->di_rl);
259 		ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells,
260 		    &di->di_rl);
261 		ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL);
262 
263 		/* Add newbus device for this FDT node */
264 		child = device_add_child(dev, NULL, -1);
265 		if (child == NULL) {
266 			resource_list_free(&di->di_rl);
267 			ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
268 			free(di, M_MRMLB);
269 			continue;
270 		}
271 
272 		device_set_ivars(child, di);
273 	}
274 
275 	return (0);
276 }
277