xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision cd0d51baaa4509a1db83251a601d34404d20c990)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/stdint.h>
32 #include <sys/stddef.h>
33 #include <sys/param.h>
34 #include <sys/queue.h>
35 #include <sys/types.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/bus.h>
39 #include <sys/module.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42 #include <sys/condvar.h>
43 #include <sys/sysctl.h>
44 #include <sys/sx.h>
45 #include <sys/unistd.h>
46 #include <sys/callout.h>
47 #include <sys/malloc.h>
48 #include <sys/priv.h>
49 
50 #include <dev/usb/usb.h>
51 #include <dev/usb/usbdi.h>
52 
53 #include <dev/usb/usb_core.h>
54 #include <dev/usb/usb_busdma.h>
55 #include <dev/usb/usb_process.h>
56 #include <dev/usb/usb_util.h>
57 
58 #include <dev/usb/usb_controller.h>
59 #include <dev/usb/usb_bus.h>
60 #include <dev/usb/usb_pci.h>
61 #include <dev/usb/controller/xhci.h>
62 #include <dev/usb/controller/xhcireg.h>
63 #include "usb_if.h"
64 
65 static device_probe_t xhci_pci_probe;
66 static device_attach_t xhci_pci_attach;
67 static device_detach_t xhci_pci_detach;
68 static usb_take_controller_t xhci_pci_take_controller;
69 
70 static device_method_t xhci_device_methods[] = {
71 	/* device interface */
72 	DEVMETHOD(device_probe, xhci_pci_probe),
73 	DEVMETHOD(device_attach, xhci_pci_attach),
74 	DEVMETHOD(device_detach, xhci_pci_detach),
75 	DEVMETHOD(device_suspend, bus_generic_suspend),
76 	DEVMETHOD(device_resume, bus_generic_resume),
77 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
78 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
79 
80 	DEVMETHOD_END
81 };
82 
83 static driver_t xhci_driver = {
84 	.name = "xhci",
85 	.methods = xhci_device_methods,
86 	.size = sizeof(struct xhci_softc),
87 };
88 
89 static devclass_t xhci_devclass;
90 
91 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL);
92 MODULE_DEPEND(xhci, usb, 1, 1, 1);
93 
94 static const char *
95 xhci_pci_match(device_t self)
96 {
97 	uint32_t device_id = pci_get_devid(self);
98 
99 	switch (device_id) {
100 	case 0x145c1022:
101 		return ("AMD KERNCZ USB 3.0 controller");
102 	case 0x43ba1022:
103 		return ("AMD X399 USB 3.0 controller");
104 	case 0x43b91022: /* X370 */
105 	case 0x43bb1022: /* B350 */
106 		return ("AMD 300 Series USB 3.0 controller");
107 	case 0x78141022:
108 		return ("AMD FCH USB 3.0 controller");
109 
110 	case 0x01941033:
111 		return ("NEC uPD720200 USB 3.0 controller");
112 	case 0x00151912:
113 		return ("NEC uPD720202 USB 3.0 controller");
114 
115 	case 0x10001b73:
116 		return ("Fresco Logic FL1000G USB 3.0 controller");
117 	case 0x11001b73:
118 		return ("Fresco Logic FL1100 USB 3.0 controller");
119 
120 	case 0x10421b21:
121 		return ("ASMedia ASM1042 USB 3.0 controller");
122 	case 0x11421b21:
123 		return ("ASMedia ASM1042A USB 3.0 controller");
124 
125 	case 0x0f358086:
126 		return ("Intel BayTrail USB 3.0 controller");
127 	case 0x19d08086:
128 		return ("Intel Denverton USB 3.0 controller");
129 	case 0x9c318086:
130 	case 0x1e318086:
131 		return ("Intel Panther Point USB 3.0 controller");
132 	case 0x22b58086:
133 		return ("Intel Braswell USB 3.0 controller");
134 	case 0x5aa88086:
135 		return ("Intel Apollo Lake USB 3.0 controller");
136 	case 0x8c318086:
137 		return ("Intel Lynx Point USB 3.0 controller");
138 	case 0x8cb18086:
139 		return ("Intel Wildcat Point USB 3.0 controller");
140 	case 0x8d318086:
141 		return ("Intel Wellsburg USB 3.0 controller");
142 	case 0x9cb18086:
143 		return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
144 	case 0x9d2f8086:
145 		return ("Intel Sunrise Point-LP USB 3.0 controller");
146 	case 0xa12f8086:
147 		return ("Intel Sunrise Point USB 3.0 controller");
148 	case 0xa1af8086:
149 		return ("Intel Lewisburg USB 3.0 controller");
150 	case 0xa2af8086:
151 		return ("Intel Union Point USB 3.0 controller");
152 	case 0xa36d8086:
153 		return ("Intel Cannon Lake USB 3.1 controller");
154 
155 	case 0xa01b177d:
156 		return ("Cavium ThunderX USB 3.0 controller");
157 
158 	default:
159 		break;
160 	}
161 
162 	if ((pci_get_class(self) == PCIC_SERIALBUS)
163 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
164 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
165 		return ("XHCI (generic) USB 3.0 controller");
166 	}
167 	return (NULL);			/* dunno */
168 }
169 
170 static int
171 xhci_pci_probe(device_t self)
172 {
173 	const char *desc = xhci_pci_match(self);
174 
175 	if (desc) {
176 		device_set_desc(self, desc);
177 		return (BUS_PROBE_DEFAULT);
178 	} else {
179 		return (ENXIO);
180 	}
181 }
182 
183 static int xhci_use_msi = 1;
184 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
185 static int xhci_use_msix = 1;
186 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix);
187 
188 static void
189 xhci_interrupt_poll(void *_sc)
190 {
191 	struct xhci_softc *sc = _sc;
192 	USB_BUS_UNLOCK(&sc->sc_bus);
193 	xhci_interrupt(sc);
194 	USB_BUS_LOCK(&sc->sc_bus);
195 	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
196 }
197 
198 static int
199 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
200 {
201 	uint32_t temp;
202 	uint32_t usb3_mask;
203 	uint32_t usb2_mask;
204 
205 	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
206 	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
207 
208 	temp |= set;
209 	temp &= ~clear;
210 
211 	/* Don't set bits which the hardware doesn't support */
212 	usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
213 	usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
214 
215 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
216 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
217 
218 	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
219 
220 	return (0);
221 }
222 
223 static int
224 xhci_pci_attach(device_t self)
225 {
226 	struct xhci_softc *sc = device_get_softc(self);
227 	int count, err, msix_table, rid;
228 	uint8_t usemsi = 1;
229 	uint8_t usedma32 = 0;
230 
231 	rid = PCI_XHCI_CBMEM;
232 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
233 	    RF_ACTIVE);
234 	if (!sc->sc_io_res) {
235 		device_printf(self, "Could not map memory\n");
236 		return (ENOMEM);
237 	}
238 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
239 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
240 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
241 
242 	switch (pci_get_devid(self)) {
243 	case 0x01941033:	/* NEC uPD720200 USB 3.0 controller */
244 	case 0x00141912:	/* NEC uPD720201 USB 3.0 controller */
245 		/* Don't use 64-bit DMA on these controllers. */
246 		usedma32 = 1;
247 		break;
248 	case 0x10001b73:	/* FL1000G */
249 		/* Fresco Logic host doesn't support MSI. */
250 		usemsi = 0;
251 		break;
252 	case 0x0f358086:	/* BayTrail */
253 	case 0x9c318086:	/* Panther Point */
254 	case 0x1e318086:	/* Panther Point */
255 	case 0x8c318086:	/* Lynx Point */
256 	case 0x8cb18086:	/* Wildcat Point */
257 	case 0x9cb18086:	/* Broadwell Mobile Integrated */
258 		/*
259 		 * On Intel chipsets, reroute ports from EHCI to XHCI
260 		 * controller and use a different IMOD value.
261 		 */
262 		sc->sc_port_route = &xhci_pci_port_route;
263 		sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
264 		sc->sc_ctlstep = 1;
265 		break;
266 	}
267 
268 	if (xhci_init(sc, self, usedma32)) {
269 		device_printf(self, "Could not initialize softc\n");
270 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
271 		    sc->sc_io_res);
272 		return (ENXIO);
273 	}
274 
275 	pci_enable_busmaster(self);
276 
277 	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
278 
279 	rid = 0;
280 	if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) {
281 		sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY,
282 		    &msix_table, RF_ACTIVE);
283 		if (sc->sc_msix_res == NULL) {
284 			/* May not be enabled */
285 			device_printf(self,
286 			    "Unable to map MSI-X table \n");
287 		} else {
288 			count = 1;
289 			if (pci_alloc_msix(self, &count) == 0) {
290 				if (bootverbose)
291 					device_printf(self, "MSI-X enabled\n");
292 				rid = 1;
293 			} else {
294 				bus_release_resource(self, SYS_RES_MEMORY,
295 				    msix_table, sc->sc_msix_res);
296 				sc->sc_msix_res = NULL;
297 			}
298 		}
299 	}
300 	if (rid == 0 && xhci_use_msi && usemsi) {
301 		count = 1;
302 		if (pci_alloc_msi(self, &count) == 0) {
303 			if (bootverbose)
304 				device_printf(self, "MSI enabled\n");
305 			rid = 1;
306 		}
307 	}
308 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
309 	    RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
310 	if (sc->sc_irq_res == NULL) {
311 		pci_release_msi(self);
312 		device_printf(self, "Could not allocate IRQ\n");
313 		/* goto error; FALLTHROUGH - use polling */
314 	}
315 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
316 	if (sc->sc_bus.bdev == NULL) {
317 		device_printf(self, "Could not add USB device\n");
318 		goto error;
319 	}
320 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
321 
322 	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
323 
324 	if (sc->sc_irq_res != NULL) {
325 		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
326 		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
327 		if (err != 0) {
328 			bus_release_resource(self, SYS_RES_IRQ,
329 			    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
330 			sc->sc_irq_res = NULL;
331 			pci_release_msi(self);
332 			device_printf(self, "Could not setup IRQ, err=%d\n", err);
333 			sc->sc_intr_hdl = NULL;
334 		}
335 	}
336 	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
337 		if (xhci_use_polling() != 0) {
338 			device_printf(self, "Interrupt polling at %dHz\n", hz);
339 			USB_BUS_LOCK(&sc->sc_bus);
340 			xhci_interrupt_poll(sc);
341 			USB_BUS_UNLOCK(&sc->sc_bus);
342 		} else
343 			goto error;
344 	}
345 
346 	xhci_pci_take_controller(self);
347 
348 	err = xhci_halt_controller(sc);
349 
350 	if (err == 0)
351 		err = xhci_start_controller(sc);
352 
353 	if (err == 0)
354 		err = device_probe_and_attach(sc->sc_bus.bdev);
355 
356 	if (err) {
357 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
358 		goto error;
359 	}
360 	return (0);
361 
362 error:
363 	xhci_pci_detach(self);
364 	return (ENXIO);
365 }
366 
367 static int
368 xhci_pci_detach(device_t self)
369 {
370 	struct xhci_softc *sc = device_get_softc(self);
371 
372 	/* during module unload there are lots of children leftover */
373 	device_delete_children(self);
374 
375 	usb_callout_drain(&sc->sc_callout);
376 	xhci_halt_controller(sc);
377 	xhci_reset_controller(sc);
378 
379 	pci_disable_busmaster(self);
380 
381 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
382 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
383 		sc->sc_intr_hdl = NULL;
384 	}
385 	if (sc->sc_irq_res) {
386 		bus_release_resource(self, SYS_RES_IRQ,
387 		    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
388 		sc->sc_irq_res = NULL;
389 		pci_release_msi(self);
390 	}
391 	if (sc->sc_io_res) {
392 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
393 		    sc->sc_io_res);
394 		sc->sc_io_res = NULL;
395 	}
396 	if (sc->sc_msix_res) {
397 		bus_release_resource(self, SYS_RES_MEMORY,
398 		    rman_get_rid(sc->sc_msix_res), sc->sc_msix_res);
399 		sc->sc_msix_res = NULL;
400 	}
401 
402 	xhci_uninit(sc);
403 
404 	return (0);
405 }
406 
407 static int
408 xhci_pci_take_controller(device_t self)
409 {
410 	struct xhci_softc *sc = device_get_softc(self);
411 	uint32_t cparams;
412 	uint32_t eecp;
413 	uint32_t eec;
414 	uint16_t to;
415 	uint8_t bios_sem;
416 
417 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
418 
419 	eec = -1;
420 
421 	/* Synchronise with the BIOS if it owns the controller. */
422 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
423 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
424 		eec = XREAD4(sc, capa, eecp);
425 
426 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
427 			continue;
428 		bios_sem = XREAD1(sc, capa, eecp +
429 		    XHCI_XECP_BIOS_SEM);
430 		if (bios_sem == 0)
431 			continue;
432 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
433 		    "to give up control\n");
434 		XWRITE1(sc, capa, eecp +
435 		    XHCI_XECP_OS_SEM, 1);
436 		to = 500;
437 		while (1) {
438 			bios_sem = XREAD1(sc, capa, eecp +
439 			    XHCI_XECP_BIOS_SEM);
440 			if (bios_sem == 0)
441 				break;
442 
443 			if (--to == 0) {
444 				device_printf(sc->sc_bus.bdev,
445 				    "timed out waiting for BIOS\n");
446 				break;
447 			}
448 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
449 		}
450 	}
451 	return (0);
452 }
453