1 /* 2 * Copyright (c) 2016 Andriy Gapon 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/kernel.h> 35 #include <sys/lock.h> 36 #include <sys/mutex.h> 37 #include <sys/malloc.h> 38 #include <sys/module.h> 39 #include <sys/proc.h> 40 #include <sys/rman.h> 41 #include <sys/time.h> 42 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <machine/stdarg.h> 46 47 #include <isa/isavar.h> 48 49 #include <dev/superio/superio.h> 50 51 #include "isa_if.h" 52 53 54 typedef void (*sio_conf_enter_f)(struct resource*, uint16_t); 55 typedef void (*sio_conf_exit_f)(struct resource*, uint16_t); 56 57 struct sio_conf_methods { 58 sio_conf_enter_f enter; 59 sio_conf_exit_f exit; 60 superio_vendor_t vendor; 61 }; 62 63 struct sio_device { 64 uint8_t ldn; 65 superio_dev_type_t type; 66 }; 67 68 struct superio_devinfo { 69 STAILQ_ENTRY(superio_devinfo) link; 70 struct resource_list resources; 71 device_t dev; 72 uint8_t ldn; 73 superio_dev_type_t type; 74 uint16_t iobase; 75 uint16_t iobase2; 76 uint8_t irq; 77 uint8_t dma; 78 }; 79 80 struct siosc { 81 struct mtx conf_lock; 82 STAILQ_HEAD(, superio_devinfo) devlist; 83 struct resource* io_res; 84 int io_rid; 85 uint16_t io_port; 86 const struct sio_conf_methods *methods; 87 const struct sio_device *known_devices; 88 superio_vendor_t vendor; 89 uint16_t devid; 90 uint8_t revid; 91 uint8_t current_ldn; 92 uint8_t ldn_reg; 93 uint8_t enable_reg; 94 }; 95 96 #define NUMPORTS 2 97 98 static uint8_t 99 sio_read(struct resource* res, uint8_t reg) 100 { 101 bus_write_1(res, 0, reg); 102 return (bus_read_1(res, 1)); 103 } 104 105 /* Read a word from two one-byte registers, big endian. */ 106 static uint16_t 107 sio_readw(struct resource* res, uint8_t reg) 108 { 109 uint16_t v; 110 111 v = sio_read(res, reg); 112 v <<= 8; 113 v |= sio_read(res, reg + 1); 114 return (v); 115 } 116 117 static void 118 sio_write(struct resource* res, uint8_t reg, uint8_t val) 119 { 120 bus_write_1(res, 0, reg); 121 bus_write_1(res, 1, val); 122 } 123 124 static void 125 sio_ldn_select(struct siosc *sc, uint8_t ldn) 126 { 127 mtx_assert(&sc->conf_lock, MA_OWNED); 128 if (ldn == sc->current_ldn) 129 return; 130 sio_write(sc->io_res, sc->ldn_reg, ldn); 131 sc->current_ldn = ldn; 132 } 133 134 static uint8_t 135 sio_ldn_read(struct siosc *sc, uint8_t ldn, uint8_t reg) 136 { 137 mtx_assert(&sc->conf_lock, MA_OWNED); 138 if (reg >= sc->enable_reg) { 139 sio_ldn_select(sc, ldn); 140 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 141 } 142 return (sio_read(sc->io_res, reg)); 143 } 144 145 static uint16_t 146 sio_ldn_readw(struct siosc *sc, uint8_t ldn, uint8_t reg) 147 { 148 mtx_assert(&sc->conf_lock, MA_OWNED); 149 if (reg >= sc->enable_reg) { 150 sio_ldn_select(sc, ldn); 151 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 152 } 153 return (sio_readw(sc->io_res, reg)); 154 } 155 156 static void 157 sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val) 158 { 159 mtx_assert(&sc->conf_lock, MA_OWNED); 160 if (reg <= sc->ldn_reg) { 161 printf("ignored attempt to write special register 0x%x\n", reg); 162 return; 163 } 164 sio_ldn_select(sc, ldn); 165 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 166 sio_write(sc->io_res, reg, val); 167 } 168 169 static void 170 sio_conf_enter(struct siosc *sc) 171 { 172 mtx_lock(&sc->conf_lock); 173 sc->methods->enter(sc->io_res, sc->io_port); 174 } 175 176 static void 177 sio_conf_exit(struct siosc *sc) 178 { 179 sc->methods->exit(sc->io_res, sc->io_port); 180 mtx_unlock(&sc->conf_lock); 181 } 182 183 static void 184 ite_conf_enter(struct resource* res, uint16_t port) 185 { 186 bus_write_1(res, 0, 0x87); 187 bus_write_1(res, 0, 0x01); 188 bus_write_1(res, 0, 0x55); 189 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa); 190 } 191 192 static void 193 ite_conf_exit(struct resource* res, uint16_t port) 194 { 195 sio_write(res, 0x02, 0x02); 196 } 197 198 static const struct sio_conf_methods ite_conf_methods = { 199 .enter = ite_conf_enter, 200 .exit = ite_conf_exit, 201 .vendor = SUPERIO_VENDOR_ITE 202 }; 203 204 static void 205 nvt_conf_enter(struct resource* res, uint16_t port) 206 { 207 bus_write_1(res, 0, 0x87); 208 bus_write_1(res, 0, 0x87); 209 } 210 211 static void 212 nvt_conf_exit(struct resource* res, uint16_t port) 213 { 214 bus_write_1(res, 0, 0xaa); 215 } 216 217 static const struct sio_conf_methods nvt_conf_methods = { 218 .enter = nvt_conf_enter, 219 .exit = nvt_conf_exit, 220 .vendor = SUPERIO_VENDOR_NUVOTON 221 }; 222 223 static const struct sio_conf_methods * const methods_table[] = { 224 &ite_conf_methods, 225 &nvt_conf_methods, 226 NULL 227 }; 228 229 static const uint16_t ports_table[] = { 230 0x2e, 0x4e, 0 231 }; 232 233 const struct sio_device ite_devices[] = { 234 { .ldn = 4, .type = SUPERIO_DEV_HWM }, 235 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 236 { .type = SUPERIO_DEV_NONE }, 237 }; 238 239 const struct sio_device nvt_devices[] = { 240 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 241 { .type = SUPERIO_DEV_NONE }, 242 }; 243 244 const struct sio_device nct5104_devices[] = { 245 { .ldn = 7, .type = SUPERIO_DEV_GPIO }, 246 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 247 { .ldn = 15, .type = SUPERIO_DEV_GPIO }, 248 { .type = SUPERIO_DEV_NONE }, 249 }; 250 251 static const struct { 252 superio_vendor_t vendor; 253 uint16_t devid; 254 uint16_t mask; 255 const char *descr; 256 const struct sio_device *devices; 257 } superio_table[] = { 258 { 259 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8712, 260 .devices = ite_devices, 261 }, 262 { 263 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8716, 264 .devices = ite_devices, 265 }, 266 { 267 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8718, 268 .devices = ite_devices, 269 }, 270 { 271 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8720, 272 .devices = ite_devices, 273 }, 274 { 275 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8721, 276 .devices = ite_devices, 277 }, 278 { 279 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8726, 280 .devices = ite_devices, 281 }, 282 { 283 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8728, 284 .devices = ite_devices, 285 }, 286 { 287 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8771, 288 .devices = ite_devices, 289 }, 290 { 291 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x1061, .mask = 0x00, 292 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. A)", 293 .devices = nct5104_devices, 294 }, 295 { 296 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5200, .mask = 0xff, 297 .descr = "Winbond 83627HF/F/HG/G", 298 .devices = nvt_devices, 299 }, 300 { 301 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5900, .mask = 0xff, 302 .descr = "Winbond 83627S", 303 .devices = nvt_devices, 304 }, 305 { 306 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6000, .mask = 0xff, 307 .descr = "Winbond 83697HF", 308 .devices = nvt_devices, 309 }, 310 { 311 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6800, .mask = 0xff, 312 .descr = "Winbond 83697UG", 313 .devices = nvt_devices, 314 }, 315 { 316 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x7000, .mask = 0xff, 317 .descr = "Winbond 83637HF", 318 .devices = nvt_devices, 319 }, 320 { 321 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8200, .mask = 0xff, 322 .descr = "Winbond 83627THF", 323 .devices = nvt_devices, 324 }, 325 { 326 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8500, .mask = 0xff, 327 .descr = "Winbond 83687THF", 328 .devices = nvt_devices, 329 }, 330 { 331 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8800, .mask = 0xff, 332 .descr = "Winbond 83627EHF", 333 .devices = nvt_devices, 334 }, 335 { 336 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa000, .mask = 0xff, 337 .descr = "Winbond 83627DHG", 338 .devices = nvt_devices, 339 }, 340 { 341 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa200, .mask = 0xff, 342 .descr = "Winbond 83627UHG", 343 .devices = nvt_devices, 344 }, 345 { 346 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa500, .mask = 0xff, 347 .descr = "Winbond 83667HG", 348 .devices = nvt_devices, 349 }, 350 { 351 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb000, .mask = 0xff, 352 .descr = "Winbond 83627DHG-P", 353 .devices = nvt_devices, 354 }, 355 { 356 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb300, .mask = 0xff, 357 .descr = "Winbond 83667HG-B", 358 .devices = nvt_devices, 359 }, 360 { 361 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb400, .mask = 0xff, 362 .descr = "Nuvoton NCT6775", 363 .devices = nvt_devices, 364 }, 365 { 366 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc300, .mask = 0xff, 367 .descr = "Nuvoton NCT6776", 368 .devices = nvt_devices, 369 }, 370 { 371 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc400, .mask = 0xff, 372 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)", 373 .devices = nct5104_devices, 374 }, 375 { 376 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc500, .mask = 0xff, 377 .descr = "Nuvoton NCT6779", 378 .devices = nvt_devices, 379 }, 380 { 381 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc800, .mask = 0xff, 382 .descr = "Nuvoton NCT6791", 383 .devices = nvt_devices, 384 }, 385 { 386 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc900, .mask = 0xff, 387 .descr = "Nuvoton NCT6792", 388 .devices = nvt_devices, 389 }, 390 { 391 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd100, .mask = 0xff, 392 .descr = "Nuvoton NCT6793", 393 .devices = nvt_devices, 394 }, 395 { 396 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd300, .mask = 0xff, 397 .descr = "Nuvoton NCT6795", 398 .devices = nvt_devices, 399 }, 400 { 0, 0 } 401 }; 402 403 static const char * 404 devtype_to_str(superio_dev_type_t type) 405 { 406 switch (type) { 407 case SUPERIO_DEV_NONE: 408 return ("none"); 409 case SUPERIO_DEV_HWM: 410 return ("HWM"); 411 case SUPERIO_DEV_WDT: 412 return ("WDT"); 413 case SUPERIO_DEV_GPIO: 414 return ("GPIO"); 415 case SUPERIO_DEV_MAX: 416 return ("invalid"); 417 } 418 return ("invalid"); 419 } 420 421 static int 422 superio_detect(device_t dev, bool claim, struct siosc *sc) 423 { 424 struct resource *res; 425 rman_res_t port; 426 rman_res_t count; 427 uint16_t devid; 428 uint8_t revid; 429 int error; 430 int rid; 431 int i, m; 432 433 error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, &count); 434 if (error != 0) 435 return (error); 436 if (port > UINT16_MAX || count < NUMPORTS) { 437 device_printf(dev, "unexpected I/O range size\n"); 438 return (ENXIO); 439 } 440 441 /* 442 * Make a temporary resource reservation for hardware probing. 443 * If we can't get the resources we need then 444 * we need to abort. Possibly this indicates 445 * the resources were used by another device 446 * in which case the probe would have failed anyhow. 447 */ 448 rid = 0; 449 res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); 450 if (res == NULL) { 451 if (claim) 452 device_printf(dev, "failed to allocate I/O resource\n"); 453 return (ENXIO); 454 } 455 456 for (m = 0; methods_table[m] != NULL; m++) { 457 methods_table[m]->enter(res, port); 458 if (methods_table[m]->vendor == SUPERIO_VENDOR_ITE) { 459 devid = sio_readw(res, 0x20); 460 revid = sio_read(res, 0x22); 461 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_NUVOTON) { 462 devid = sio_read(res, 0x20); 463 revid = sio_read(res, 0x21); 464 devid = (devid << 8) | revid; 465 } else { 466 continue; 467 } 468 methods_table[m]->exit(res, port); 469 for (i = 0; superio_table[i].vendor != 0; i++) { 470 uint16_t mask; 471 472 mask = superio_table[i].mask; 473 if (superio_table[i].vendor != 474 methods_table[m]->vendor) 475 continue; 476 if ((superio_table[i].devid & ~mask) != (devid & ~mask)) 477 continue; 478 break; 479 } 480 481 /* Found a matching SuperIO entry. */ 482 if (superio_table[i].vendor != 0) 483 break; 484 } 485 486 if (methods_table[m] == NULL) 487 error = ENXIO; 488 else 489 error = 0; 490 if (!claim || error != 0) { 491 bus_release_resource(dev, SYS_RES_IOPORT, rid, res); 492 return (error); 493 } 494 495 sc->methods = methods_table[m]; 496 sc->vendor = sc->methods->vendor; 497 sc->known_devices = superio_table[i].devices; 498 sc->io_res = res; 499 sc->io_rid = rid; 500 sc->io_port = port; 501 sc->devid = devid; 502 sc->revid = revid; 503 504 KASSERT(sc->vendor == SUPERIO_VENDOR_ITE || 505 sc->vendor == SUPERIO_VENDOR_NUVOTON, 506 ("Only ITE and Nuvoton SuperIO-s are supported")); 507 sc->ldn_reg = 0x07; 508 sc->enable_reg = 0x30; 509 sc->current_ldn = 0xff; /* no device should have this */ 510 511 if (superio_table[i].descr != NULL) { 512 device_set_desc(dev, superio_table[i].descr); 513 } else if (sc->vendor == SUPERIO_VENDOR_ITE) { 514 char descr[64]; 515 516 snprintf(descr, sizeof(descr), 517 "ITE IT%4x SuperIO (revision 0x%02x)", 518 sc->devid, sc->revid); 519 device_set_desc_copy(dev, descr); 520 } 521 return (0); 522 } 523 524 static void 525 superio_identify(driver_t *driver, device_t parent) 526 { 527 device_t child; 528 int i; 529 530 /* 531 * Don't create child devices if any already exist. 532 * Those could be created via isa hints or if this 533 * driver is loaded, unloaded and then loaded again. 534 */ 535 if (device_find_child(parent, "superio", -1)) { 536 if (bootverbose) 537 printf("superio: device(s) already created\n"); 538 return; 539 } 540 541 /* 542 * Create a child for each candidate port. 543 * It would be nice if we could somehow clean up those 544 * that this driver fails to probe. 545 */ 546 for (i = 0; ports_table[i] != 0; i++) { 547 child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, 548 "superio", -1); 549 if (child == NULL) { 550 device_printf(parent, "failed to add superio child\n"); 551 continue; 552 } 553 bus_set_resource(child, SYS_RES_IOPORT, 0, ports_table[i], 2); 554 if (superio_detect(child, false, NULL) != 0) 555 device_delete_child(parent, child); 556 } 557 } 558 559 static int 560 superio_probe(device_t dev) 561 { 562 struct siosc *sc; 563 int error; 564 565 /* Make sure we do not claim some ISA PNP device. */ 566 if (isa_get_logicalid(dev) != 0) 567 return (ENXIO); 568 569 /* 570 * XXX We can populate the softc now only because we return 571 * BUS_PROBE_SPECIFIC 572 */ 573 sc = device_get_softc(dev); 574 error = superio_detect(dev, true, sc); 575 if (error != 0) 576 return (error); 577 return (BUS_PROBE_SPECIFIC); 578 } 579 580 static void 581 superio_add_known_child(device_t dev, superio_dev_type_t type, uint8_t ldn) 582 { 583 struct siosc *sc = device_get_softc(dev); 584 struct superio_devinfo *dinfo; 585 device_t child; 586 587 child = BUS_ADD_CHILD(dev, 0, NULL, -1); 588 if (child == NULL) { 589 device_printf(dev, "failed to add child for ldn %d, type %s\n", 590 ldn, devtype_to_str(type)); 591 return; 592 } 593 dinfo = device_get_ivars(child); 594 dinfo->ldn = ldn; 595 dinfo->type = type; 596 sio_conf_enter(sc); 597 dinfo->iobase = sio_ldn_readw(sc, ldn, 0x60); 598 dinfo->iobase2 = sio_ldn_readw(sc, ldn, 0x62); 599 dinfo->irq = sio_ldn_readw(sc, ldn, 0x70); 600 dinfo->dma = sio_ldn_readw(sc, ldn, 0x74); 601 sio_conf_exit(sc); 602 STAILQ_INSERT_TAIL(&sc->devlist, dinfo, link); 603 } 604 605 static int 606 superio_attach(device_t dev) 607 { 608 struct siosc *sc = device_get_softc(dev); 609 int i; 610 611 mtx_init(&sc->conf_lock, device_get_nameunit(dev), "superio", MTX_DEF); 612 STAILQ_INIT(&sc->devlist); 613 614 for (i = 0; sc->known_devices[i].type != SUPERIO_DEV_NONE; i++) { 615 superio_add_known_child(dev, sc->known_devices[i].type, 616 sc->known_devices[i].ldn); 617 } 618 619 bus_generic_probe(dev); 620 bus_generic_attach(dev); 621 return (0); 622 } 623 624 static int 625 superio_detach(device_t dev) 626 { 627 struct siosc *sc = device_get_softc(dev); 628 int error; 629 630 error = bus_generic_detach(dev); 631 if (error != 0) 632 return (error); 633 device_delete_children(dev); 634 bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid, sc->io_res); 635 mtx_destroy(&sc->conf_lock); 636 return (0); 637 } 638 639 static device_t 640 superio_add_child(device_t dev, u_int order, const char *name, int unit) 641 { 642 struct superio_devinfo *dinfo; 643 device_t child; 644 645 child = device_add_child_ordered(dev, order, name, unit); 646 if (child == NULL) 647 return (NULL); 648 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 649 if (dinfo == NULL) { 650 device_delete_child(dev, child); 651 return (NULL); 652 } 653 dinfo->ldn = 0xff; 654 dinfo->type = SUPERIO_DEV_NONE; 655 dinfo->dev = child; 656 resource_list_init(&dinfo->resources); 657 device_set_ivars(child, dinfo); 658 return (child); 659 } 660 661 static int 662 superio_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 663 { 664 struct superio_devinfo *dinfo; 665 666 dinfo = device_get_ivars(child); 667 switch (which) { 668 case SUPERIO_IVAR_LDN: 669 *result = dinfo->ldn; 670 break; 671 case SUPERIO_IVAR_TYPE: 672 *result = dinfo->type; 673 break; 674 case SUPERIO_IVAR_IOBASE: 675 *result = dinfo->iobase; 676 break; 677 case SUPERIO_IVAR_IOBASE2: 678 *result = dinfo->iobase2; 679 break; 680 case SUPERIO_IVAR_IRQ: 681 *result = dinfo->irq; 682 break; 683 case SUPERIO_IVAR_DMA: 684 *result = dinfo->dma; 685 break; 686 default: 687 return (ENOENT); 688 } 689 return (0); 690 } 691 692 static int 693 superio_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 694 { 695 696 switch (which) { 697 case SUPERIO_IVAR_LDN: 698 case SUPERIO_IVAR_TYPE: 699 case SUPERIO_IVAR_IOBASE: 700 case SUPERIO_IVAR_IOBASE2: 701 case SUPERIO_IVAR_IRQ: 702 case SUPERIO_IVAR_DMA: 703 return (EINVAL); 704 default: 705 return (ENOENT); 706 } 707 } 708 709 static struct resource_list * 710 superio_get_resource_list(device_t dev, device_t child) 711 { 712 struct superio_devinfo *dinfo = device_get_ivars(child); 713 714 return (&dinfo->resources); 715 } 716 717 static int 718 superio_printf(struct superio_devinfo *dinfo, const char *fmt, ...) 719 { 720 va_list ap; 721 int retval; 722 723 retval = printf("superio:%s@ldn%0x2x: ", 724 devtype_to_str(dinfo->type), dinfo->ldn); 725 va_start(ap, fmt); 726 retval += vprintf(fmt, ap); 727 va_end(ap); 728 return (retval); 729 } 730 731 static void 732 superio_child_detached(device_t dev, device_t child) 733 { 734 struct superio_devinfo *dinfo; 735 struct resource_list *rl; 736 737 dinfo = device_get_ivars(child); 738 rl = &dinfo->resources; 739 740 if (resource_list_release_active(rl, dev, child, SYS_RES_IRQ) != 0) 741 superio_printf(dinfo, "Device leaked IRQ resources\n"); 742 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0) 743 superio_printf(dinfo, "Device leaked memory resources\n"); 744 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0) 745 superio_printf(dinfo, "Device leaked I/O resources\n"); 746 } 747 748 static int 749 superio_child_location_str(device_t parent, device_t child, char *buf, 750 size_t buflen) 751 { 752 uint8_t ldn; 753 754 ldn = superio_get_ldn(child); 755 snprintf(buf, buflen, "ldn=0x%02x", ldn); 756 return (0); 757 } 758 759 static int 760 superio_child_pnp_str(device_t parent, device_t child, char *buf, 761 size_t buflen) 762 { 763 superio_dev_type_t type; 764 765 type = superio_get_type(child); 766 snprintf(buf, buflen, "type=%s", devtype_to_str(type)); 767 return (0); 768 } 769 770 static int 771 superio_print_child(device_t parent, device_t child) 772 { 773 superio_dev_type_t type; 774 uint8_t ldn; 775 int retval; 776 777 ldn = superio_get_ldn(child); 778 type = superio_get_type(child); 779 780 retval = bus_print_child_header(parent, child); 781 retval += printf(" at %s ldn 0x%02x", devtype_to_str(type), ldn); 782 retval += bus_print_child_footer(parent, child); 783 784 return (retval); 785 } 786 787 superio_vendor_t 788 superio_vendor(device_t dev) 789 { 790 device_t sio_dev = device_get_parent(dev); 791 struct siosc *sc = device_get_softc(sio_dev); 792 793 return (sc->vendor); 794 } 795 796 uint16_t 797 superio_devid(device_t dev) 798 { 799 device_t sio_dev = device_get_parent(dev); 800 struct siosc *sc = device_get_softc(sio_dev); 801 802 return (sc->devid); 803 } 804 805 uint8_t 806 superio_revid(device_t dev) 807 { 808 device_t sio_dev = device_get_parent(dev); 809 struct siosc *sc = device_get_softc(sio_dev); 810 811 return (sc->revid); 812 } 813 814 uint8_t 815 superio_read(device_t dev, uint8_t reg) 816 { 817 device_t sio_dev = device_get_parent(dev); 818 struct siosc *sc = device_get_softc(sio_dev); 819 struct superio_devinfo *dinfo = device_get_ivars(dev); 820 uint8_t v; 821 822 sio_conf_enter(sc); 823 v = sio_ldn_read(sc, dinfo->ldn, reg); 824 sio_conf_exit(sc); 825 return (v); 826 } 827 828 void 829 superio_write(device_t dev, uint8_t reg, uint8_t val) 830 { 831 device_t sio_dev = device_get_parent(dev); 832 struct siosc *sc = device_get_softc(sio_dev); 833 struct superio_devinfo *dinfo = device_get_ivars(dev); 834 835 sio_conf_enter(sc); 836 sio_ldn_write(sc, dinfo->ldn, reg, val); 837 sio_conf_exit(sc); 838 } 839 840 bool 841 superio_dev_enabled(device_t dev, uint8_t mask) 842 { 843 device_t sio_dev = device_get_parent(dev); 844 struct siosc *sc = device_get_softc(sio_dev); 845 struct superio_devinfo *dinfo = device_get_ivars(dev); 846 uint8_t v; 847 848 /* GPIO device is always active in ITE chips. */ 849 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 850 return (true); 851 852 v = superio_read(dev, sc->enable_reg); 853 return ((v & mask) != 0); 854 } 855 856 void 857 superio_dev_enable(device_t dev, uint8_t mask) 858 { 859 device_t sio_dev = device_get_parent(dev); 860 struct siosc *sc = device_get_softc(sio_dev); 861 struct superio_devinfo *dinfo = device_get_ivars(dev); 862 uint8_t v; 863 864 /* GPIO device is always active in ITE chips. */ 865 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 866 return; 867 868 sio_conf_enter(sc); 869 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 870 v |= mask; 871 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 872 sio_conf_exit(sc); 873 } 874 875 void 876 superio_dev_disable(device_t dev, uint8_t mask) 877 { 878 device_t sio_dev = device_get_parent(dev); 879 struct siosc *sc = device_get_softc(sio_dev); 880 struct superio_devinfo *dinfo = device_get_ivars(dev); 881 uint8_t v; 882 883 /* GPIO device is always active in ITE chips. */ 884 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 885 return; 886 887 sio_conf_enter(sc); 888 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 889 v &= ~mask; 890 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 891 sio_conf_exit(sc); 892 } 893 894 device_t 895 superio_find_dev(device_t superio, superio_dev_type_t type, int ldn) 896 { 897 struct siosc *sc = device_get_softc(superio); 898 struct superio_devinfo *dinfo; 899 900 if (ldn < -1 || ldn > UINT8_MAX) 901 return (NULL); /* ERANGE */ 902 if (type == SUPERIO_DEV_NONE && ldn == -1) 903 return (NULL); /* EINVAL */ 904 905 STAILQ_FOREACH(dinfo, &sc->devlist, link) { 906 if (ldn != -1 && dinfo->ldn != ldn) 907 continue; 908 if (type != SUPERIO_DEV_NONE && dinfo->type != type) 909 continue; 910 return (dinfo->dev); 911 } 912 return (NULL); 913 } 914 915 static devclass_t superio_devclass; 916 917 static device_method_t superio_methods[] = { 918 DEVMETHOD(device_identify, superio_identify), 919 DEVMETHOD(device_probe, superio_probe), 920 DEVMETHOD(device_attach, superio_attach), 921 DEVMETHOD(device_detach, superio_detach), 922 DEVMETHOD(device_shutdown, bus_generic_shutdown), 923 DEVMETHOD(device_suspend, bus_generic_suspend), 924 DEVMETHOD(device_resume, bus_generic_resume), 925 926 DEVMETHOD(bus_add_child, superio_add_child), 927 DEVMETHOD(bus_child_detached, superio_child_detached), 928 DEVMETHOD(bus_child_location_str, superio_child_location_str), 929 DEVMETHOD(bus_child_pnpinfo_str, superio_child_pnp_str), 930 DEVMETHOD(bus_print_child, superio_print_child), 931 DEVMETHOD(bus_read_ivar, superio_read_ivar), 932 DEVMETHOD(bus_write_ivar, superio_write_ivar), 933 DEVMETHOD(bus_get_resource_list, superio_get_resource_list), 934 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 935 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 936 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 937 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 938 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 939 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 940 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 941 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 942 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 943 944 DEVMETHOD_END 945 }; 946 947 static driver_t superio_driver = { 948 "superio", 949 superio_methods, 950 sizeof(struct siosc) 951 }; 952 953 DRIVER_MODULE(superio, isa, superio_driver, superio_devclass, 0, 0); 954 MODULE_VERSION(superio, 1); 955