xref: /freebsd/sys/dev/sound/pci/emu10kx.c (revision 2be1a816b9ff69588e55be0a84cbe2a31efc0f2f)
1 /*-
2  * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
3  * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #include <sys/param.h>
31 #include <sys/types.h>
32 #include <sys/bus.h>
33 #include <machine/bus.h>
34 #include <sys/rman.h>
35 #include <sys/systm.h>
36 #include <sys/sbuf.h>
37 #include <sys/queue.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/sysctl.h>
41 #include <sys/kdb.h>
42 
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcivar.h>
45 
46 #include <machine/clock.h>	/* for DELAY */
47 
48 #include <dev/sound/chip.h>
49 #include <dev/sound/pcm/sound.h>
50 #include <dev/sound/pcm/ac97.h>
51 
52 #include <dev/sound/pci/emu10kx.h>
53 
54 /* hw flags */
55 #define	HAS_51		0x0001
56 #define	HAS_71		0x0002
57 #define	HAS_AC97	0x0004
58 
59 #define	IS_EMU10K1	0x0008
60 #define	IS_EMU10K2	0x0010
61 #define	IS_CA0102	0x0020
62 #define	IS_CA0108	0x0040
63 #define	IS_UNKNOWN	0x0080
64 
65 #define	BROKEN_DIGITAL	0x0100
66 #define	DIGITAL_ONLY	0x0200
67 
68 #define	IS_CARDBUS	0x0400
69 
70 #define	MODE_ANALOG	1
71 #define	MODE_DIGITAL	2
72 #define	SPDIF_MODE_PCM	1
73 #define	SPDIF_MODE_AC3	2
74 
75 #define	MACS	0x0
76 #define	MACS1	0x1
77 #define	MACW	0x2
78 #define	MACW1	0x3
79 #define	MACINTS	0x4
80 #define	MACINTW	0x5
81 #define	ACC3	0x6
82 #define	MACMV	0x7
83 #define	ANDXOR	0x8
84 #define	TSTNEG	0x9
85 #define	LIMIT	0xA
86 #define	LIMIT1	0xB
87 #define	LOG	0xC
88 #define	EXP	0xD
89 #define	INTERP	0xE
90 #define	SKIP	0xF
91 
92 #define	GPR(i)	(sc->gpr_base+(i))
93 #define	INP(i)	(sc->input_base+(i))
94 #define	OUTP(i)	(sc->output_base+(i))
95 #define	FX(i)	(i)
96 #define	FX2(i)	(sc->efxc_base+(i))
97 #define	DSP_CONST(i) (sc->dsp_zero+(i))
98 
99 #define	COND_NORMALIZED	DSP_CONST(0x1)
100 #define	COND_BORROW	DSP_CONST(0x2)
101 #define	COND_MINUS	DSP_CONST(0x3)
102 #define	COND_LESS_ZERO	DSP_CONST(0x4)
103 #define	COND_EQ_ZERO	DSP_CONST(0x5)
104 #define	COND_SATURATION	DSP_CONST(0x6)
105 #define	COND_NEQ_ZERO	DSP_CONST(0x8)
106 
107 #define	DSP_ACCUM	DSP_CONST(0x16)
108 #define	DSP_CCR		DSP_CONST(0x17)
109 
110 /* Live! Inputs */
111 #define	IN_AC97_L 	0x00
112 #define	IN_AC97_R 	0x01
113 #define	IN_AC97		IN_AC97_L
114 #define	IN_SPDIF_CD_L	0x02
115 #define	IN_SPDIF_CD_R	0x03
116 #define	IN_SPDIF_CD	IN_SPDIF_CD_L
117 #define	IN_ZOOM_L 	0x04
118 #define	IN_ZOOM_R 	0x05
119 #define	IN_ZOOM		IN_ZOOM_L
120 #define	IN_TOSLINK_L	0x06
121 #define	IN_TOSLINK_R	0x07
122 #define	IN_TOSLINK	IN_TOSLINK_L
123 #define	IN_LINE1_L	0x08
124 #define	IN_LINE1_R	0x09
125 #define	IN_LINE1	IN_LINE1_L
126 #define	IN_COAX_SPDIF_L	0x0a
127 #define	IN_COAX_SPDIF_R	0x0b
128 #define	IN_COAX_SPDIF	IN_COAX_SPDIF_L
129 #define	IN_LINE2_L	0x0c
130 #define	IN_LINE2_R	0x0d
131 #define	IN_LINE2	IN_LINE2_L
132 #define	IN_0E		0x0e
133 #define	IN_0F		0x0f
134 
135 /* Outputs */
136 #define	OUT_AC97_L	0x00
137 #define	OUT_AC97_R	0x01
138 #define	OUT_AC97	OUT_AC97_L
139 #define	OUT_A_FRONT	OUT_AC97
140 #define	OUT_TOSLINK_L 	0x02
141 #define	OUT_TOSLINK_R 	0x03
142 #define	OUT_TOSLINK	OUT_TOSLINK_L
143 #define	OUT_D_CENTER	0x04
144 #define	OUT_D_SUB	0x05
145 #define	OUT_HEADPHONE_L	0x06
146 #define	OUT_HEADPHONE_R	0x07
147 #define	OUT_HEADPHONE	OUT_HEADPHONE_L
148 #define	OUT_REAR_L	0x08
149 #define	OUT_REAR_R	0x09
150 #define	OUT_REAR	OUT_REAR_L
151 #define	OUT_ADC_REC_L 	0x0a
152 #define	OUT_ADC_REC_R	0x0b
153 #define	OUT_ADC_REC	OUT_ADC_REC_L
154 #define	OUT_MIC_CAP	0x0c
155 
156 /* Live! 5.1 Digital, non-standart 5.1 (center & sub) outputs */
157 #define	OUT_A_CENTER	0x11
158 #define	OUT_A_SUB	0x12
159 
160 /* Audigy Inputs */
161 #define	A_IN_AC97_L	0x00
162 #define	A_IN_AC97_R	0x01
163 #define	A_IN_AC97	A_IN_AC97_L
164 #define	A_IN_SPDIF_CD_L	0x02
165 #define	A_IN_SPDIF_CD_R	0x03
166 #define	A_IN_SPDIF_CD	A_IN_SPDIF_CD_L
167 #define	A_IN_O_SPDIF_L	0x04
168 #define	A_IN_O_SPDIF_R	0x05
169 #define	A_IN_O_SPDIF	A_IN_O_SPDIF_L
170 #define	A_IN_LINE2_L	0x08
171 #define	A_IN_LINE2_R	0x09
172 #define	A_IN_LINE2	A_IN_LINE2_L
173 #define	A_IN_R_SPDIF_L	0x0a
174 #define	A_IN_R_SPDIF_R	0x0b
175 #define	A_IN_R_SPDIF	A_IN_R_SPDIF_L
176 #define	A_IN_AUX2_L	0x0c
177 #define	A_IN_AUX2_R	0x0d
178 #define	A_IN_AUX2	A_IN_AUX2_L
179 
180 /* Audigiy Outputs */
181 #define	A_OUT_D_FRONT_L	0x00
182 #define	A_OUT_D_FRONT_R	0x01
183 #define	A_OUT_D_FRONT	A_OUT_D_FRONT_L
184 #define	A_OUT_D_CENTER	0x02
185 #define	A_OUT_D_SUB	0x03
186 #define	A_OUT_D_SIDE_L	0x04
187 #define	A_OUT_D_SIDE_R	0x05
188 #define	A_OUT_D_SIDE	A_OUT_D_SIDE_L
189 #define	A_OUT_D_REAR_L	0x06
190 #define	A_OUT_D_REAR_R	0x07
191 #define	A_OUT_D_REAR	A_OUT_D_REAR_L
192 
193 /* on Audigy Platinum only */
194 #define	A_OUT_HPHONE_L	0x04
195 #define	A_OUT_HPHONE_R	0x05
196 #define	A_OUT_HPHONE	A_OUT_HPHONE_L
197 
198 #define	A_OUT_A_FRONT_L	0x08
199 #define	A_OUT_A_FRONT_R	0x09
200 #define	A_OUT_A_FRONT	A_OUT_A_FRONT_L
201 #define	A_OUT_A_CENTER	0x0a
202 #define	A_OUT_A_SUB	0x0b
203 #define	A_OUT_A_SIDE_L	0x0c
204 #define	A_OUT_A_SIDE_R	0x0d
205 #define	A_OUT_A_SIDE	A_OUT_A_SIDE_L
206 #define	A_OUT_A_REAR_L	0x0e
207 #define	A_OUT_A_REAR_R	0x0f
208 #define	A_OUT_A_REAR	A_OUT_A_REAR_L
209 #define	A_OUT_AC97_L	0x10
210 #define	A_OUT_AC97_R	0x11
211 #define	A_OUT_AC97	A_OUT_AC97_L
212 #define	A_OUT_ADC_REC_L	0x16
213 #define	A_OUT_ADC_REC_R	0x17
214 #define	A_OUT_ADC_REC	A_OUT_ADC_REC_L
215 
216 #include "emu10k1-alsa%diked.h"
217 #include "p16v-alsa%diked.h"
218 #include "p17v-alsa%diked.h"
219 
220 #define	C_FRONT_L	0
221 #define	C_FRONT_R	1
222 #define	C_REC_L		2
223 #define	C_REC_R		3
224 #define	C_REAR_L	4
225 #define	C_REAR_R	5
226 #define	C_CENTER	6
227 #define	C_SUB		7
228 #define	C_SIDE_L	8
229 #define	C_SIDE_R	9
230 #define	NUM_CACHES	10
231 
232 #define	CDSPDIFMUTE	0
233 #define	ANALOGMUTE	1
234 #define	NUM_MUTE	2
235 
236 #define	EMU_MAX_GPR	512
237 #define	EMU_MAX_IRQ_CONSUMERS 32
238 
239 struct emu_voice {
240 	int	vnum;
241 	unsigned int	b16:1, stereo:1, busy:1, running:1, ismaster:1;
242 	int	speed;
243 	int	start;
244 	int	end;
245 	int	vol;
246 	uint32_t buf;
247 	void	*vbuf;
248 	struct emu_voice *slave;
249 	uint32_t sa;
250 	uint32_t ea;
251 	uint32_t routing[8];
252 	uint32_t amounts[8];
253 };
254 
255 struct emu_memblk {
256 	SLIST_ENTRY(emu_memblk)	link;
257 	void		*buf;
258 	char		owner[16];
259 	bus_addr_t	buf_addr;
260 	uint32_t	pte_start, pte_size;
261 };
262 
263 struct emu_mem {
264 	uint8_t		bmap[EMU_MAXPAGES / 8];
265 	uint32_t	*ptb_pages;
266 	void		*silent_page;
267 	bus_addr_t	silent_page_addr;
268 	bus_addr_t	ptb_pages_addr;
269 	bus_dma_tag_t	dmat;
270 	struct emu_sc_info *card;
271 	SLIST_HEAD(, emu_memblk) blocks;
272 };
273 
274 /* rm */
275 struct emu_rm {
276 	struct emu_sc_info *card;
277 	struct mtx	gpr_lock;
278 	signed int	allocmap[EMU_MAX_GPR];
279 	int		num_gprs;
280 	int		last_free_gpr;
281 	int 		num_used;
282 };
283 
284 struct emu_intr_handler {
285 	void*		softc;
286 	uint32_t	intr_mask;
287 	uint32_t	inte_mask;
288 	uint32_t(*irq_func) (void *softc, uint32_t irq);
289 };
290 
291 struct emu_sc_info {
292 	struct mtx	lock;
293 	struct mtx	rw;		/* Hardware exclusive access lock */
294 
295 	/* Hardware and subdevices */
296 	device_t	dev;
297 	device_t	pcm[RT_COUNT];
298 	device_t	midi[2];
299 	uint32_t	type;
300 	uint32_t	rev;
301 
302 	bus_space_tag_t	st;
303 	bus_space_handle_t sh;
304 
305 	struct cdev	*cdev;		/* /dev/emu10k character device */
306 	struct mtx	emu10kx_lock;
307 	int		emu10kx_isopen;
308 	struct sbuf	emu10kx_sbuf;
309 	int		emu10kx_bufptr;
310 
311 
312 	/* Resources */
313 	struct resource	*reg;
314 	struct resource	*irq;
315 	void 		*ih;
316 
317 	/* IRQ handlers */
318 	struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS];
319 
320 	/* Card HW configuration */
321 	unsigned int	mode;	/* analog / digital */
322 	unsigned int	mchannel_fx;
323 	unsigned int	dsp_zero;
324 	unsigned int	code_base;
325 	unsigned int	code_size;
326 	unsigned int	gpr_base;
327 	unsigned int	num_gprs;
328 	unsigned int	input_base;
329 	unsigned int	output_base;
330 	unsigned int	efxc_base;
331 	unsigned int	opcode_shift;
332 	unsigned int	high_operand_shift;
333 	unsigned int	address_mask;
334 	uint32_t 	is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1,
335 			has_ac97:1, has_51:1, has_71:1,
336 			enable_ir:1,
337 			broken_digital:1, is_cardbus:1;
338 
339 	signed int	mch_disabled, mch_rec, dbg_level;
340 	signed int 	num_inputs;
341 	unsigned int 	num_outputs;
342 	unsigned int 	num_fxbuses;
343 	unsigned int 	routing_code_start;
344 	unsigned int	routing_code_end;
345 
346 	/* HW resources */
347 	struct emu_voice voice[NUM_G];			/* Hardware voices */
348 	uint32_t	irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */
349 	int 		timer[EMU_MAX_IRQ_CONSUMERS];	/* timer */
350 	int		timerinterval;
351 	struct		emu_rm *rm;
352 	struct		emu_mem mem;			/* memory */
353 
354 	/* Mixer */
355 	int		mixer_gpr[NUM_MIXERS];
356 	int		mixer_volcache[NUM_MIXERS];
357 	int		cache_gpr[NUM_CACHES];
358 	int		dummy_gpr;
359 	int		mute_gpr[NUM_MUTE];
360 	struct sysctl_ctx_list	*ctx;
361 	struct sysctl_oid	*root;
362 };
363 
364 static void	emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error);
365 static void*	emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr);
366 static void	emu_free(struct emu_mem *mem, void *dmabuf);
367 static void*	emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner);
368 static int	emu_memfree(struct emu_mem *mem, void *membuf);
369 static int	emu_memstart(struct emu_mem *mem, void *membuf);
370 
371 /* /dev */
372 static int	emu10kx_dev_init(struct emu_sc_info *sc);
373 static int	emu10kx_dev_uninit(struct emu_sc_info *sc);
374 static int	emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s);
375 
376 static void	emumix_set_mode(struct emu_sc_info *sc, int mode);
377 static void	emumix_set_spdif_mode(struct emu_sc_info *sc, int mode);
378 static void	emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol);
379 static void	emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);
380 static int	sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS);
381 
382 static int	emu_rm_init(struct emu_sc_info *sc);
383 static int	emu_rm_uninit(struct emu_sc_info *sc);
384 static int	emu_rm_gpr_alloc(struct emu_rm *rm, int count);
385 
386 static unsigned int emu_getcard(device_t dev);
387 static uint32_t	emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size);
388 static void	emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size);
389 static void	emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data);
390 
391 static void	emu_vstop(struct emu_sc_info *sc, char channel, int enable);
392 
393 static void	emu_intr(void *p);
394 static void	emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data);
395 static void	emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc);
396 static void	emu_initefx(struct emu_sc_info *sc);
397 
398 static int	emu_cardbus_init(struct emu_sc_info *sc);
399 static int	emu_init(struct emu_sc_info *sc);
400 static int	emu_uninit(struct emu_sc_info *sc);
401 
402 static int	emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result);
403 static int	emu_write_ivar(device_t bus __unused, device_t dev __unused,
404     int ivar_index, uintptr_t value __unused);
405 
406 static int	emu_pci_probe(device_t dev);
407 static int	emu_pci_attach(device_t dev);
408 static int	emu_pci_detach(device_t dev);
409 static int	emu_modevent(module_t mod __unused, int cmd, void *data __unused);
410 
411 #ifdef	SND_EMU10KX_DEBUG
412 
413 #define EMU_MTX_DEBUG() do { 						\
414 		if (mtx_owned(&sc->rw)) {				\
415 		printf("RW owned in %s line %d for %s\n", __func__,	\
416 			__LINE__ , device_get_nameunit(sc->dev));	\
417 		printf("rw lock owned: %d\n", mtx_owned(&sc->rw));	\
418 		printf("rw lock: value %x thread %x\n",			\
419 			((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), 		\
420 			(uintptr_t)curthread);				\
421 		printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\
422 		db_show_mtx(&sc->rw);					\
423 		}							\
424 	} while (0)
425 #else
426 #define EMU_MTX_DEBUG() do { 						\
427 	} while (0)
428 #endif
429 
430 #define EMU_RWLOCK() do {		\
431 	EMU_MTX_DEBUG();		\
432 	mtx_lock(&(sc->rw));		\
433 	} while (0)
434 
435 #define EMU_RWUNLOCK() do {		\
436 	mtx_unlock(&(sc->rw));		\
437 	EMU_MTX_DEBUG();		\
438 	} while (0)
439 
440 /* Supported cards */
441 struct emu_hwinfo {
442 	uint16_t	vendor;
443 	uint16_t	device;
444 	uint16_t	subvendor;
445 	uint16_t	subdevice;
446 	char		SBcode[8];
447 	char		desc[32];
448 	int		flags;
449 };
450 
451 static struct emu_hwinfo emu_cards[] = {
452 	{0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0},
453 	/* 0x0020..0x002f 4.0 EMU10K1 cards */
454 	{0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
455 	{0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1},
456 	{0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1},
457 
458 	/* (range unknown) 5.1 EMU10K1 cards */
459 	{0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
460 
461 	/* 0x80??..0x805? 4.0 EMU10K1 cards */
462 	{0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
463 	{0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1},
464 	{0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
465 	{0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1},
466 	{0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
467 	{0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
468 	{0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1},
469 	{0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
470 	{0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
471 	{0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
472 
473 	/* 0x8061..0x???? 5.1 EMU10K1  cards */
474 	{0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
475 	{0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1},
476 	{0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
477 	{0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
478 	{0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
479 	{0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1},
480 
481 	/* Generic SB Live! */
482 	{0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1},
483 
484 	/* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */
485 
486 	/* 0x0051..0x0051 5.1 CA0100-IAF cards */
487 	{0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2},
488 	/* ES is CA0100-IDF chip that don't work in digital mode */
489 	{0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL},
490 	/* 0x0053..0x005C 5.1 CA0101-NAF cards */
491 	{0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
492 	{0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
493 
494 	/* 0x1002..0x1009 5.1 CA0102-IAT cards */
495 	{0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102},
496 	{0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102},
497 	{0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102},
498 
499 	/* 0x2001..0x2003 7.1 CA0102-ICT cards */
500 	{0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
501 	{0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
502 	/* XXX No reports about 0x2003 & 0x2004 cards */
503 	{0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
504 	{0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
505 	{0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
506 
507 	/* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */
508 	{0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102},
509 
510 	/* Generic Audigy or Audigy 2 */
511 	{0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2},
512 
513 	/* We don't support CA0103-DAT (Audigy LS) cards */
514 	/* There is NO CA0104-xxx cards */
515 	/* There is NO CA0105-xxx cards */
516 	/* We don't support CA0106-DAT (SB Live! 24 bit) cards */
517 	/* There is NO CA0107-xxx cards */
518 
519 	/* 0x1000..0x1001 7.1 CA0108-IAT cards */
520 	{0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY},
521 	{0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
522 	{0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
523 
524 	{0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS},
525 
526 	{0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108},
527 };
528 /* Unsupported cards */
529 
530 static struct emu_hwinfo emu_bad_cards[] = {
531 	/* APS cards should be possible to support */
532 	{0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0},
533 	{0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0},
534 	{0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0},
535 	/* Similar-named ("Live!" or "Audigy") cards on different chipsets */
536 	{0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0},
537 	{0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0},
538 	{0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0},
539 };
540 
541 /*
542  * Get best known information about device.
543  */
544 static unsigned int
545 emu_getcard(device_t dev)
546 {
547 	uint16_t device;
548 	uint16_t subdevice;
549 	int n_cards;
550 	unsigned int thiscard;
551 	int i;
552 
553 	device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2);
554 	subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2);
555 
556 	n_cards = sizeof(emu_cards) / sizeof(struct emu_hwinfo);
557 	thiscard = 0;
558 	for (i = 1; i < n_cards; i++) {
559 		if (device == emu_cards[i].device) {
560 			if (subdevice == emu_cards[i].subdevice) {
561 				thiscard = i;
562 				break;
563 			}
564 			if (0x0000 == emu_cards[i].subdevice) {
565 				thiscard = i;
566 				/*
567 				 * don't break, we can get more specific card
568 				 * later in the list.
569 				 */
570 			}
571 		}
572 	}
573 
574 	n_cards = sizeof(emu_bad_cards) / sizeof(struct emu_hwinfo);
575 	for (i = 0; i < n_cards; i++) {
576 		if (device == emu_bad_cards[i].device) {
577 			if (subdevice == emu_bad_cards[i].subdevice) {
578 				thiscard = 0;
579 				break;
580 			}
581 			if (0x0000 == emu_bad_cards[i].subdevice) {
582 				thiscard = 0;
583 				break;	/* we avoid all this cards */
584 			}
585 		}
586 	}
587 	return (thiscard);
588 }
589 
590 
591 /*
592  * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers.
593  * Some of them are used directly, some of them provide pointer / data pairs.
594  */
595 static uint32_t
596 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
597 {
598 
599 	KASSERT(sc != NULL, ("emu_rd: NULL sc"));
600 	switch (size) {
601 	case 1:
602 		return (bus_space_read_1(sc->st, sc->sh, regno));
603 	case 2:
604 		return (bus_space_read_2(sc->st, sc->sh, regno));
605 	case 4:
606 		return (bus_space_read_4(sc->st, sc->sh, regno));
607 	}
608 	return (0xffffffff);
609 }
610 
611 static void
612 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
613 {
614 
615 	KASSERT(sc != NULL, ("emu_rd: NULL sc"));
616 	switch (size) {
617 	case 1:
618 		bus_space_write_1(sc->st, sc->sh, regno, data);
619 		break;
620 	case 2:
621 		bus_space_write_2(sc->st, sc->sh, regno, data);
622 		break;
623 	case 4:
624 		bus_space_write_4(sc->st, sc->sh, regno, data);
625 		break;
626 	}
627 }
628 /*
629  * PTR / DATA interface. Access to EMU10Kx is made
630  * via (channel, register) pair. Some registers are channel-specific,
631  * some not.
632  */
633 uint32_t
634 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg)
635 {
636 	uint32_t ptr, val, mask, size, offset;
637 
638 	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
639 
640 	EMU_RWLOCK();
641 	emu_wr_nolock(sc, PTR, ptr, 4);
642 	val = emu_rd_nolock(sc, DATA, 4);
643 	EMU_RWUNLOCK();
644 
645 	/*
646 	 * XXX Some register numbers has data size and offset encoded in
647 	 * it to get only part of 32bit register. This use is not described
648 	 * in register name, be careful!
649 	 */
650 	if (reg & 0xff000000) {
651 		size = (reg >> 24) & 0x3f;
652 		offset = (reg >> 16) & 0x1f;
653 		mask = ((1 << size) - 1) << offset;
654 		val &= mask;
655 		val >>= offset;
656 	}
657 	return (val);
658 }
659 
660 void
661 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data)
662 {
663 	uint32_t ptr, mask, size, offset;
664 
665 	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
666 
667 	EMU_RWLOCK();
668 	emu_wr_nolock(sc, PTR, ptr, 4);
669 	/*
670 	 * XXX Another kind of magic encoding in register number. This can
671 	 * give you side effect - it will read previous data from register
672 	 * and change only required bits.
673 	 */
674 	if (reg & 0xff000000) {
675 		size = (reg >> 24) & 0x3f;
676 		offset = (reg >> 16) & 0x1f;
677 		mask = ((1 << size) - 1) << offset;
678 		data <<= offset;
679 		data &= mask;
680 		data |= emu_rd_nolock(sc, DATA, 4) & ~mask;
681 	}
682 	emu_wr_nolock(sc, DATA, data, 4);
683 	EMU_RWUNLOCK();
684 }
685 /*
686  * PTR2 / DATA2 interface. Access to P16v is made
687  * via (channel, register) pair. Some registers are channel-specific,
688  * some not. This interface is supported by CA0102 and CA0108 chips only.
689  */
690 uint32_t
691 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg)
692 {
693 	uint32_t val;
694 
695 	/* XXX separate lock? */
696 	EMU_RWLOCK();
697 	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
698 	val = emu_rd_nolock(sc, DATA2, 4);
699 
700 	EMU_RWUNLOCK();
701 
702 	return (val);
703 }
704 
705 void
706 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data)
707 {
708 
709 	EMU_RWLOCK();
710 	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
711 	emu_wr_nolock(sc, DATA2, data, 4);
712 	EMU_RWUNLOCK();
713 }
714 /*
715  * XXX CardBus interface. Not tested on any real hardware.
716  */
717 static void
718 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data)
719 {
720 	uint32_t val;
721 
722 	/*
723 	 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems
724 	 * to be some reg/value accessible kind of config register on CardBus
725 	 * CA0108, with value(?) in top 16 bit, address(?) in low 16
726 	 */
727 
728 	val = emu_rd_nolock(sc, 0x38, 4);
729 	emu_wr_nolock(sc, 0x38, data, 4);
730 	val = emu_rd_nolock(sc, 0x38, 4);
731 
732 }
733 
734 /*
735  * Direct hardware register access
736  * Assume that it is never used to access PTR-based registers and can run unlocked.
737  */
738 void
739 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
740 {
741 	KASSERT(regno != PTR, ("emu_wr: attempt to write to PTR"));
742 	KASSERT(regno != PTR2, ("emu_wr: attempt to write to PTR2"));
743 
744 	emu_wr_nolock(sc, regno, data, size);
745 }
746 
747 uint32_t
748 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
749 {
750 	uint32_t rd;
751 
752 	KASSERT(regno != DATA, ("emu_rd: attempt to read DATA"));
753 	KASSERT(regno != DATA2, ("emu_rd: attempt to read DATA2"));
754 
755 	rd = emu_rd_nolock(sc, regno, size);
756 	return (rd);
757 }
758 
759 /*
760  * Enabling IR MIDI messages is another kind of black magic. It just
761  * has to be made this way. It really do it.
762  */
763 void
764 emu_enable_ir(struct emu_sc_info *sc)
765 {
766 	uint32_t iocfg;
767 
768 	if (sc->is_emu10k2 || sc->is_ca0102) {
769 		iocfg = emu_rd_nolock(sc, A_IOCFG, 2);
770 		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT2, 2);
771 		DELAY(500);
772 		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, 2);
773 		DELAY(500);
774 		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1, 2);
775 		DELAY(100);
776 		emu_wr_nolock(sc, A_IOCFG, iocfg, 2);
777 		device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
778 		sc->enable_ir = 1;
779 	}
780 	if (sc->is_emu10k1) {
781 		iocfg = emu_rd_nolock(sc, HCFG, 4);
782 		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT2, 4);
783 		DELAY(500);
784 		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT1 | HCFG_GPOUT2, 4);
785 		DELAY(100);
786 		emu_wr_nolock(sc, HCFG, iocfg, 4);
787 		device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
788 		sc->enable_ir = 1;
789 	}
790 }
791 
792 
793 /*
794  * emu_timer_ - HW timer managment
795  */
796 int
797 emu_timer_create(struct emu_sc_info *sc)
798 {
799 	int i, timer;
800 
801 	timer = -1;
802 
803 	mtx_lock(&sc->lock);
804 	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
805 		if (sc->timer[i] == 0) {
806 			sc->timer[i] = -1;	/* disable it */
807 			timer = i;
808 			mtx_unlock(&sc->lock);
809 			return (timer);
810 		}
811 	mtx_unlock(&sc->lock);
812 
813 	return (-1);
814 }
815 
816 int
817 emu_timer_set(struct emu_sc_info *sc, int timer, int delay)
818 {
819 	int i;
820 
821 	if (timer < 0)
822 		return (-1);
823 
824 	RANGE(delay, 16, 1024);
825 	RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
826 
827 	mtx_lock(&sc->lock);
828 	sc->timer[timer] = delay;
829 	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
830 		if (sc->timerinterval > sc->timer[i])
831 			sc->timerinterval = sc->timer[i];
832 
833 	/* XXX */
834 	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
835 	mtx_unlock(&sc->lock);
836 
837 	return (timer);
838 }
839 
840 int
841 emu_timer_enable(struct emu_sc_info *sc, int timer, int go)
842 {
843 	uint32_t x;
844 	int ena_int;
845 	int i;
846 
847 	if (timer < 0)
848 		return (-1);
849 
850 	RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
851 
852 	mtx_lock(&sc->lock);
853 
854 	if ((go == 1) && (sc->timer[timer] < 0))
855 		sc->timer[timer] = -sc->timer[timer];
856 	if ((go == 0) && (sc->timer[timer] > 0))
857 		sc->timer[timer] = -sc->timer[timer];
858 
859 	ena_int = 0;
860 	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
861 		if (sc->timerinterval > sc->timer[i])
862 			sc->timerinterval = sc->timer[i];
863 		if (sc->timer[i] > 0)
864 			ena_int = 1;
865 	}
866 
867 	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
868 
869 	if (ena_int == 1) {
870 		x = emu_rd(sc, INTE, 4);
871 		x |= INTE_INTERVALTIMERENB;
872 		emu_wr(sc, INTE, x, 4);
873 	} else {
874 		x = emu_rd(sc, INTE, 4);
875 		x &= ~INTE_INTERVALTIMERENB;
876 		emu_wr(sc, INTE, x, 4);
877 	}
878 	mtx_unlock(&sc->lock);
879 	return (0);
880 }
881 
882 int
883 emu_timer_clear(struct emu_sc_info *sc, int timer)
884 {
885 	if (timer < 0)
886 		return (-1);
887 
888 	RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
889 
890 	emu_timer_enable(sc, timer, 0);
891 
892 	mtx_lock(&sc->lock);
893 	if (sc->timer[timer] != 0)
894 		sc->timer[timer] = 0;
895 	mtx_unlock(&sc->lock);
896 
897 	return (timer);
898 }
899 
900 /*
901  * emu_intr_ - HW interrupt handler managment
902  */
903 int
904 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc)
905 {
906 	int i;
907 	uint32_t x;
908 
909 	mtx_lock(&sc->lock);
910 	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
911 		if (sc->ihandler[i].inte_mask == 0) {
912 			sc->ihandler[i].inte_mask = inte_mask;
913 			sc->ihandler[i].intr_mask = intr_mask;
914 			sc->ihandler[i].softc = isc;
915 			sc->ihandler[i].irq_func = func;
916 			x = emu_rd(sc, INTE, 4);
917 			x |= inte_mask;
918 			emu_wr(sc, INTE, x, 4);
919 			mtx_unlock(&sc->lock);
920 			if (sc->dbg_level > 1)
921 				device_printf(sc->dev, "ihandle %d registered\n", i);
922 
923 			return (i);
924 		}
925 	mtx_unlock(&sc->lock);
926 	if (sc->dbg_level > 1)
927 		device_printf(sc->dev, "ihandle not registered\n");
928 
929 	return (-1);
930 }
931 
932 int
933 emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
934 {
935 	uint32_t x;
936 	int i;
937 
938 	mtx_lock(&sc->lock);
939 
940 	if (sc->ihandler[hnumber].inte_mask == 0) {
941 		mtx_unlock(&sc->lock);
942 		return (-1);
943 	}
944 
945 	x = emu_rd(sc, INTE, 4);
946 	x &= ~sc->ihandler[hnumber].inte_mask;
947 
948 	sc->ihandler[hnumber].inte_mask = 0;
949 	sc->ihandler[hnumber].intr_mask = 0;
950 	sc->ihandler[hnumber].softc = NULL;
951 	sc->ihandler[hnumber].irq_func = NULL;
952 
953 	/* other interrupt handlers may use this INTE value */
954 	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
955 		if (sc->ihandler[i].inte_mask != 0)
956 			x |= sc->ihandler[i].inte_mask;
957 
958 	emu_wr(sc, INTE, x, 4);
959 
960 	mtx_unlock(&sc->lock);
961 	return (hnumber);
962 }
963 
964 static void
965 emu_intr(void *p)
966 {
967 	struct emu_sc_info *sc = (struct emu_sc_info *)p;
968 	uint32_t stat, ack;
969 	int i;
970 
971 	for (;;) {
972 		stat = emu_rd(sc, IPR, 4);
973 		ack = 0;
974 		if (stat == 0)
975 			break;
976 		emu_wr(sc, IPR, stat, 4);
977 		for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
978 			if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
979 			    (((void *)sc->ihandler[i].irq_func) != NULL)) {
980 				ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc,
981 				    (sc->ihandler[i].intr_mask) & stat);
982 			}
983 		}
984 	if (sc->dbg_level > 1)
985 		if (stat & (~ack))
986 			device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack));
987 
988 	}
989 
990 	if ((sc->is_ca0102) || (sc->is_ca0108))
991 		for (;;) {
992 			stat = emu_rd(sc, IPR2, 4);
993 			ack = 0;
994 			if (stat == 0)
995 				break;
996 			emu_wr(sc, IPR2, stat, 4);
997 			if (sc->dbg_level > 1)
998 				device_printf(sc->dev, "IPR2: %08x\n", stat);
999 
1000 			break;	/* to avoid infinite loop. shoud be removed
1001 				 * after completion of P16V interface. */
1002 		}
1003 
1004 	if (sc->is_ca0102)
1005 		for (;;) {
1006 			stat = emu_rd(sc, IPR3, 4);
1007 			ack = 0;
1008 			if (stat == 0)
1009 				break;
1010 			emu_wr(sc, IPR3, stat, 4);
1011 			if (sc->dbg_level > 1)
1012 				device_printf(sc->dev, "IPR3: %08x\n", stat);
1013 
1014 			break;	/* to avoid infinite loop. should be removed
1015 				 * after completion of S/PDIF interface */
1016 		}
1017 }
1018 
1019 
1020 /*
1021  * Get data from private emu10kx structure for PCM buffer allocation.
1022  * Used by PCM code only.
1023  */
1024 bus_dma_tag_t
1025 emu_gettag(struct emu_sc_info *sc)
1026 {
1027 	return (sc->mem.dmat);
1028 }
1029 
1030 static void
1031 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error)
1032 {
1033 	bus_addr_t *phys = (bus_addr_t *) arg;
1034 
1035 	*phys = error ? 0 : (bus_addr_t) segs->ds_addr;
1036 
1037 	if (bootverbose) {
1038 		printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n",
1039 		    (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1040 		    nseg, error);
1041 	}
1042 }
1043 
1044 static void *
1045 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr)
1046 {
1047 	void *dmabuf;
1048 	bus_dmamap_t map;
1049 	int error;
1050 
1051 	*addr = 0;
1052 	if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, &map))) {
1053 		if (mem->card->dbg_level > 2)
1054 			device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error);
1055 		return (NULL);
1056 		}
1057 	if ((error = bus_dmamap_load(mem->dmat, map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) {
1058 		if (mem->card->dbg_level > 2)
1059 			device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error);
1060 		return (NULL);
1061 		}
1062 	return (dmabuf);
1063 }
1064 
1065 static void
1066 emu_free(struct emu_mem *mem, void *dmabuf)
1067 {
1068 	bus_dmamem_free(mem->dmat, dmabuf, NULL);
1069 }
1070 
1071 static void *
1072 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner)
1073 {
1074 	uint32_t blksz, start, idx, ofs, tmp, found;
1075 	struct emu_memblk *blk;
1076 	void *membuf;
1077 
1078 	blksz = sz / EMUPAGESIZE;
1079 	if (sz > (blksz * EMUPAGESIZE))
1080 		blksz++;
1081 	if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) {
1082 		if (mem->card->dbg_level > 2)
1083 			device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n");
1084 		return (NULL);
1085 		}
1086 	/* find a free block in the bitmap */
1087 	found = 0;
1088 	start = 1;
1089 	while (!found && start + blksz < EMU_MAXPAGES) {
1090 		found = 1;
1091 		for (idx = start; idx < start + blksz; idx++)
1092 			if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1093 				found = 0;
1094 		if (!found)
1095 			start++;
1096 	}
1097 	if (!found) {
1098 		if (mem->card->dbg_level > 2)
1099 			device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n");
1100 		return (NULL);
1101 		}
1102 	blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
1103 	if (blk == NULL) {
1104 		if (mem->card->dbg_level > 2)
1105 			device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n");
1106 		return (NULL);
1107 		}
1108 	bzero(blk, sizeof(*blk));
1109 	membuf = emu_malloc(mem, sz, &blk->buf_addr);
1110 	*addr = blk->buf_addr;
1111 	if (membuf == NULL) {
1112 		if (mem->card->dbg_level > 2)
1113 			device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n");
1114 		free(blk, M_DEVBUF);
1115 		return (NULL);
1116 	}
1117 	blk->buf = membuf;
1118 	blk->pte_start = start;
1119 	blk->pte_size = blksz;
1120 	strncpy(blk->owner, owner, 15);
1121 	blk->owner[15] = '\0';
1122 	ofs = 0;
1123 	for (idx = start; idx < start + blksz; idx++) {
1124 		mem->bmap[idx >> 3] |= 1 << (idx & 7);
1125 		tmp = (uint32_t) (u_long) ((uint8_t *) blk->buf_addr + ofs);
1126 		mem->ptb_pages[idx] = (tmp << 1) | idx;
1127 		ofs += EMUPAGESIZE;
1128 	}
1129 	SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1130 	return (membuf);
1131 }
1132 
1133 static int
1134 emu_memfree(struct emu_mem *mem, void *membuf)
1135 {
1136 	uint32_t idx, tmp;
1137 	struct emu_memblk *blk, *i;
1138 
1139 	blk = NULL;
1140 	SLIST_FOREACH(i, &mem->blocks, link) {
1141 		if (i->buf == membuf)
1142 			blk = i;
1143 	}
1144 	if (blk == NULL)
1145 		return (EINVAL);
1146 	SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1147 	emu_free(mem, membuf);
1148 	tmp = (uint32_t) (mem->silent_page_addr) << 1;
1149 	for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1150 		mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1151 		mem->ptb_pages[idx] = tmp | idx;
1152 	}
1153 	free(blk, M_DEVBUF);
1154 	return (0);
1155 }
1156 
1157 static int
1158 emu_memstart(struct emu_mem *mem, void *membuf)
1159 {
1160 	struct emu_memblk *blk, *i;
1161 
1162 	blk = NULL;
1163 	SLIST_FOREACH(i, &mem->blocks, link) {
1164 		if (i->buf == membuf)
1165 			blk = i;
1166 	}
1167 	if (blk == NULL)
1168 		return (-1);
1169 	return (blk->pte_start);
1170 }
1171 
1172 
1173 static uint32_t
1174 emu_rate_to_pitch(uint32_t rate)
1175 {
1176 	static uint32_t logMagTable[128] = {
1177 		0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
1178 		0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
1179 		0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
1180 		0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
1181 		0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
1182 		0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
1183 		0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
1184 		0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
1185 		0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
1186 		0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
1187 		0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
1188 		0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
1189 		0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
1190 		0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
1191 		0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
1192 		0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
1193 	};
1194 	static char logSlopeTable[128] = {
1195 		0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
1196 		0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
1197 		0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
1198 		0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
1199 		0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
1200 		0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
1201 		0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
1202 		0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
1203 		0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
1204 		0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
1205 		0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
1206 		0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
1207 		0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
1208 		0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
1209 		0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
1210 		0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
1211 	};
1212 	int i;
1213 
1214 	if (rate == 0)
1215 		return (0);
1216 	rate *= 11185;		/* Scale 48000 to 0x20002380 */
1217 	for (i = 31; i > 0; i--) {
1218 		if (rate & 0x80000000) {	/* Detect leading "1" */
1219 			return (((uint32_t) (i - 15) << 20) +
1220 			    logMagTable[0x7f & (rate >> 24)] +
1221 			    (0x7f & (rate >> 17)) *
1222 			    logSlopeTable[0x7f & (rate >> 24)]);
1223 		}
1224 		rate <<= 1;
1225 	}
1226 	/* NOTREACHED */
1227 	return (0);
1228 }
1229 
1230 static uint32_t
1231 emu_rate_to_linearpitch(uint32_t rate)
1232 {
1233 	rate = (rate << 8) / 375;
1234 	return ((rate >> 1) + (rate & 1));
1235 }
1236 
1237 struct emu_voice *
1238 emu_valloc(struct emu_sc_info *sc)
1239 {
1240 	struct emu_voice *v;
1241 	int i;
1242 
1243 	v = NULL;
1244 	mtx_lock(&sc->lock);
1245 	for (i = 0; i < NUM_G && sc->voice[i].busy; i++);
1246 	if (i < NUM_G) {
1247 		v = &sc->voice[i];
1248 		v->busy = 1;
1249 	}
1250 	mtx_unlock(&sc->lock);
1251 	return (v);
1252 }
1253 
1254 void
1255 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v)
1256 {
1257 	int i, r;
1258 
1259 	mtx_lock(&sc->lock);
1260 	for (i = 0; i < NUM_G; i++) {
1261 		if (v == &sc->voice[i] && sc->voice[i].busy) {
1262 			v->busy = 0;
1263 			/*
1264 			 * XXX What we should do with mono channels?
1265 			 * See -pcm.c emupchan_init for other side of
1266 			 * this problem
1267 			 */
1268 			if (v->slave != NULL)
1269 				r = emu_memfree(&sc->mem, v->vbuf);
1270 		}
1271 	}
1272 	mtx_unlock(&sc->lock);
1273 }
1274 
1275 int
1276 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s,
1277     uint32_t sz, struct snd_dbuf *b)
1278 {
1279 	void *vbuf;
1280 	bus_addr_t tmp_addr;
1281 
1282 	vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit");
1283 	if (vbuf == NULL) {
1284 		if(sc->dbg_level > 2)
1285 			device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n");
1286 		return (ENOMEM);
1287 		}
1288 	if (b != NULL)
1289 		sndbuf_setup(b, vbuf, sz);
1290 	m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE;
1291 	if (m->start < 0) {
1292 		if(sc->dbg_level > 2)
1293 			device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n");
1294 		emu_memfree(&sc->mem, vbuf);
1295 		return (ENOMEM);
1296 	}
1297 	m->end = m->start + sz;
1298 	m->speed = 0;
1299 	m->b16 = 0;
1300 	m->stereo = 0;
1301 	m->running = 0;
1302 	m->ismaster = 1;
1303 	m->vol = 0xff;
1304 	m->buf = tmp_addr;
1305 	m->vbuf = vbuf;
1306 	m->slave = s;
1307 	if (s != NULL) {
1308 		s->start = m->start;
1309 		s->end = m->end;
1310 		s->speed = 0;
1311 		s->b16 = 0;
1312 		s->stereo = 0;
1313 		s->running = 0;
1314 		s->ismaster = 0;
1315 		s->vol = m->vol;
1316 		s->buf = m->buf;
1317 		s->vbuf = NULL;
1318 		s->slave = NULL;
1319 	}
1320 	return (0);
1321 }
1322 
1323 void
1324 emu_vsetup(struct emu_voice *v, int fmt, int spd)
1325 {
1326 	if (fmt) {
1327 		v->b16 = (fmt & AFMT_16BIT) ? 1 : 0;
1328 		v->stereo = (fmt & AFMT_STEREO) ? 1 : 0;
1329 		if (v->slave != NULL) {
1330 			v->slave->b16 = v->b16;
1331 			v->slave->stereo = v->stereo;
1332 		}
1333 	}
1334 	if (spd) {
1335 		v->speed = spd;
1336 		if (v->slave != NULL)
1337 			v->slave->speed = v->speed;
1338 	}
1339 }
1340 
1341 void
1342 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt,  struct emu_voice *v)
1343 {
1344 	int i;
1345 
1346 	for (i = 0; i < 8; i++) {
1347 		v->routing[i] = rt->routing_left[i];
1348 		v->amounts[i] = rt->amounts_left[i];
1349 	}
1350 	if ((v->stereo) && (v->ismaster == 0))
1351 		for (i = 0; i < 8; i++) {
1352 			v->routing[i] = rt->routing_right[i];
1353 			v->amounts[i] = rt->amounts_right[i];
1354 		}
1355 
1356 	if ((v->stereo) && (v->slave != NULL))
1357 		emu_vroute(sc, rt, v->slave);
1358 }
1359 
1360 void
1361 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v)
1362 {
1363 	int s;
1364 	uint32_t start, val, silent_page;
1365 
1366 	s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
1367 
1368 	v->sa = v->start >> s;
1369 	v->ea = v->end >> s;
1370 
1371 
1372 	if (v->stereo) {
1373 		emu_wrptr(sc, v->vnum, CPF, CPF_STEREO_MASK);
1374 	} else {
1375 		emu_wrptr(sc, v->vnum, CPF, 0);
1376 	}
1377 	val = v->stereo ? 28 : 30;
1378 	val *= v->b16 ? 1 : 2;
1379 	start = v->sa + val;
1380 
1381 	if (sc->is_emu10k1) {
1382 		emu_wrptr(sc, v->vnum, FXRT, ((v->routing[3] << 12) |
1383 		    (v->routing[2] << 8) |
1384 		    (v->routing[1] << 4) |
1385 		    (v->routing[0] << 0)) << 16);
1386 	} else {
1387 		emu_wrptr(sc, v->vnum, A_FXRT1, (v->routing[3] << 24) |
1388 		    (v->routing[2] << 16) |
1389 		    (v->routing[1] << 8) |
1390 		    (v->routing[0] << 0));
1391 		emu_wrptr(sc, v->vnum, A_FXRT2, (v->routing[7] << 24) |
1392 		    (v->routing[6] << 16) |
1393 		    (v->routing[5] << 8) |
1394 		    (v->routing[4] << 0));
1395 		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, (v->amounts[7] << 24) |
1396 		    (v->amounts[6] << 26) |
1397 		    (v->amounts[5] << 8) |
1398 		    (v->amounts[4] << 0));
1399 	}
1400 	emu_wrptr(sc, v->vnum, PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
1401 	emu_wrptr(sc, v->vnum, DSL, v->ea | (v->amounts[3] << 24));
1402 	emu_wrptr(sc, v->vnum, PSST, v->sa | (v->amounts[2] << 24));
1403 
1404 	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
1405 	emu_wrptr(sc, v->vnum, Z1, 0);
1406 	emu_wrptr(sc, v->vnum, Z2, 0);
1407 
1408 	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | MAP_PTI_MASK;
1409 	emu_wrptr(sc, v->vnum, MAPA, silent_page);
1410 	emu_wrptr(sc, v->vnum, MAPB, silent_page);
1411 
1412 	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
1413 	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
1414 	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
1415 	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
1416 	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
1417 	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
1418 	emu_wrptr(sc, v->vnum, FMMOD, 0);
1419 	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
1420 	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
1421 	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
1422 
1423 	emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
1424 	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
1425 
1426 	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
1427 	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
1428 	if ((v->stereo) && (v->slave != NULL))
1429 		emu_vwrite(sc, v->slave);
1430 }
1431 
1432 static void
1433 emu_vstop(struct emu_sc_info *sc, char channel, int enable)
1434 {
1435 	int reg;
1436 
1437 	reg = (channel & 0x20) ? SOLEH : SOLEL;
1438 	channel &= 0x1f;
1439 	reg |= 1 << 24;
1440 	reg |= channel << 16;
1441 	emu_wrptr(sc, 0, reg, enable);
1442 }
1443 
1444 void
1445 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go)
1446 {
1447 	uint32_t pitch_target, initial_pitch;
1448 	uint32_t cra, cs, ccis;
1449 	uint32_t sample, i;
1450 
1451 	if (go) {
1452 		cra = 64;
1453 		cs = v->stereo ? 4 : 2;
1454 		ccis = v->stereo ? 28 : 30;
1455 		ccis *= v->b16 ? 1 : 2;
1456 		sample = v->b16 ? 0x00000000 : 0x80808080;
1457 		for (i = 0; i < cs; i++)
1458 			emu_wrptr(sc, v->vnum, CD0 + i, sample);
1459 		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
1460 		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
1461 		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
1462 
1463 		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
1464 		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
1465 		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
1466 		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
1467 		emu_vstop(sc, v->vnum, 0);
1468 
1469 		pitch_target = emu_rate_to_linearpitch(v->speed);
1470 		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
1471 		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
1472 		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
1473 		emu_wrptr(sc, v->vnum, IP, initial_pitch);
1474 	} else {
1475 		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
1476 		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
1477 		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
1478 		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
1479 		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
1480 		emu_wrptr(sc, v->vnum, IP, 0);
1481 		emu_vstop(sc, v->vnum, 1);
1482 	}
1483 	if ((v->stereo) && (v->slave != NULL))
1484 		emu_vtrigger(sc, v->slave, go);
1485 }
1486 
1487 int
1488 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v)
1489 {
1490 	int s, ptr;
1491 
1492 	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
1493 	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
1494 	return (ptr & ~0x0000001f);
1495 }
1496 
1497 
1498 /* fx */
1499 static void
1500 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data)
1501 {
1502 	emu_wrptr(sc, 0, sc->code_base + pc, data);
1503 }
1504 
1505 
1506 static void
1507 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc)
1508 {
1509 	if ((*pc) + 1 > sc->code_size) {
1510 		device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc));
1511 		return;
1512 	}
1513 	emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y);
1514 	emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w);
1515 	(*pc)++;
1516 }
1517 
1518 static int
1519 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS)
1520 {
1521 	struct emu_sc_info *sc;
1522 	int	mixer_id;
1523 	int	new_vol;
1524 	int	err;
1525 
1526 	sc = arg1;
1527 	mixer_id = arg2;
1528 
1529 	new_vol = emumix_get_volume(sc, mixer_id);
1530 	err = sysctl_handle_int(oidp, &new_vol, 0, req);
1531 
1532 	if (err || req->newptr == NULL)
1533 		return (err);
1534 	if (new_vol < 0 || new_vol > 100)
1535 		return (EINVAL);
1536 	emumix_set_volume(sc, mixer_id, new_vol);
1537 
1538 	return (0);
1539 }
1540 
1541 static int
1542 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume)
1543 {
1544 	int volgpr;
1545 	char	sysctl_name[32];
1546 
1547 	volgpr = emu_rm_gpr_alloc(sc->rm, 1);
1548 	emumix_set_fxvol(sc, volgpr, defvolume);
1549 	/*
1550 	 * Mixer controls with NULL mix_name are handled
1551 	 * by AC97 emulation code or PCM mixer.
1552 	 */
1553 	if (mix_name != NULL) {
1554 		/*
1555 		 * Temporary sysctls should start with underscore,
1556 		 * see freebsd-current mailing list, emu10kx driver
1557 		 * discussion around 2006-05-24.
1558 		 */
1559 		snprintf(sysctl_name, 32, "_%s", mix_name);
1560 		SYSCTL_ADD_PROC(sc->ctx,
1561 			SYSCTL_CHILDREN(sc->root),
1562 			OID_AUTO, sysctl_name,
1563 			CTLTYPE_INT | CTLFLAG_RW, sc, mix_id,
1564 			sysctl_emu_mixer_control, "I", "");
1565 	}
1566 
1567 	return (volgpr);
1568 }
1569 
1570 static int
1571 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS)
1572 {
1573 	struct emu_sc_info *sc;
1574 	int	new_val;
1575 	int	err;
1576 
1577 	sc = arg1;
1578 
1579 	new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0;
1580 	err = sysctl_handle_int(oidp, &new_val, 0, req);
1581 
1582 	if (err || req->newptr == NULL)
1583 		return (err);
1584 	if (new_val < 0 || new_val > 1)
1585 		return (EINVAL);
1586 
1587 	switch (new_val) {
1588 		case 0:
1589 			emumix_set_mode(sc, MODE_ANALOG);
1590 			break;
1591 		case 1:
1592 			emumix_set_mode(sc, MODE_DIGITAL);
1593 			break;
1594 	}
1595 	return (0);
1596 }
1597 
1598 static void
1599 emu_digitalswitch(struct emu_sc_info *sc)
1600 {
1601 	/* XXX temporary? */
1602 	SYSCTL_ADD_PROC(sc->ctx,
1603 		SYSCTL_CHILDREN(sc->root),
1604 		OID_AUTO, "_digital",
1605 		CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1606 		sysctl_emu_digitalswitch_control, "I", "Enable digital output");
1607 
1608 	return;
1609 }
1610 
1611 /*
1612  * Allocate cache GPRs that will hold mixed output channels
1613  * and clear it on every DSP run.
1614  */
1615 #define	EFX_CACHE(CACHE_IDX) do {				\
1616 	sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \
1617 	emu_addefxop(sc, ACC3, 					\
1618 		GPR(sc->cache_gpr[CACHE_IDX]), 			\
1619 		DSP_CONST(0), 					\
1620 		DSP_CONST(0), 					\
1621 		DSP_CONST(0), 					\
1622 		&pc);						\
1623 } while (0)
1624 
1625 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */
1626 #define	EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { 	\
1627 	sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX,  DEF); \
1628 	sc->mixer_volcache[IN_GPR_IDX] = DEF; 			\
1629 	emu_addefxop(sc, MACS, 					\
1630 		GPR(sc->cache_gpr[OUT_CACHE_IDX]), 		\
1631 		GPR(sc->cache_gpr[OUT_CACHE_IDX]),		\
1632 		INP_NR,						\
1633 		GPR(sc->mixer_gpr[IN_GPR_IDX]),			\
1634 		&pc);						\
1635 } while (0)
1636 
1637 /* allocate GPR, OUT = IN * VOL */
1638 #define	EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do {	\
1639 	sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \
1640 	sc->mixer_volcache[OUT_GPR_IDX] = DEF;			\
1641 	emu_addefxop(sc, MACS,					\
1642 		OUTP(OUTP_NR),					\
1643 		DSP_CONST(0),					\
1644 		GPR(sc->cache_gpr[OUT_CACHE_IDX]),		\
1645 		GPR(sc->mixer_gpr[OUT_GPR_IDX]),		\
1646 		&pc);						\
1647 } while (0)
1648 
1649 /* like EFX_OUTPUT, but don't allocate mixer gpr */
1650 #define	EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do {	\
1651 	emu_addefxop(sc, MACS,					\
1652 		OUTP(OUTP_NR),					\
1653 		DSP_CONST(0),					\
1654 		GPR(sc->cache_gpr[OUT_CACHE_IDX]),		\
1655 		GPR(sc->mixer_gpr[OUT_GPR_IDX]),		\
1656 		&pc);						\
1657 } while (0)
1658 
1659 /* skip next OPCOUNT instructions if FLAG != 0 */
1660 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do {			\
1661 	emu_addefxop(sc, MACS,					\
1662 		DSP_CONST(0),					\
1663 		GPR(sc->mute_gpr[FLAG_GPR]),					\
1664 		DSP_CONST(0),					\
1665 		DSP_CONST(0),					\
1666 		&pc);						\
1667 	emu_addefxop(sc, SKIP,					\
1668 		DSP_CCR,					\
1669 		DSP_CCR,					\
1670 		COND_NEQ_ZERO,					\
1671 		OPCOUNT,					\
1672 		&pc);						\
1673 } while (0)
1674 
1675 #define EFX_COPY(TO, FROM) do {					\
1676 	emu_addefxop(sc, ACC3,					\
1677 		TO,						\
1678 		DSP_CONST(0),					\
1679 		DSP_CONST(0),					\
1680 		FROM,						\
1681 		&pc);						\
1682 } while (0)
1683 
1684 
1685 static void
1686 emu_initefx(struct emu_sc_info *sc)
1687 {
1688 	unsigned int i;
1689 	uint32_t pc;
1690 
1691 	/* stop DSP */
1692 	if (sc->is_emu10k1) {
1693 		emu_wrptr(sc, 0, DBG, EMU10K1_DBG_SINGLE_STEP);
1694 	} else {
1695 		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1696 	}
1697 
1698 	/* code size is in instructions */
1699 	pc = 0;
1700 	for (i = 0; i < sc->code_size; i++) {
1701 		if (sc->is_emu10k1) {
1702 			emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc);
1703 		} else {
1704 			emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc);
1705 		}
1706 	}
1707 
1708 	/* allocate GPRs for mute switches (EFX_SKIP). Mute by default */
1709 	for (i = 0; i < NUM_MUTE; i++) {
1710 		sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1);
1711 		emumix_set_gpr(sc, sc->mute_gpr[i], 1);
1712 	}
1713 	emu_digitalswitch(sc);
1714 
1715 	pc = 0;
1716 
1717 	/*
1718 	 * DSP code below is not good, because:
1719 	 * 1. It can be written smaller, if it can use DSP accumulator register
1720 	 * instead of cache_gpr[].
1721 	 * 2. It can be more careful when volume is 100%, because in DSP
1722 	 * x*0x7fffffff may not be equal to x !
1723 	 */
1724 
1725 	/* clean outputs */
1726 	for (i = 0; i < 16 ; i++) {
1727 		emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc);
1728 	}
1729 
1730 
1731 	if (sc->is_emu10k1) {
1732 		EFX_CACHE(C_FRONT_L);
1733 		EFX_CACHE(C_FRONT_R);
1734 		EFX_CACHE(C_REC_L);
1735 		EFX_CACHE(C_REC_R);
1736 
1737 		/* fx0 to front/record, 100%/muted by default */
1738 		EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1739 		EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1740 		EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1741 		EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1742 
1743 		/* in0, from AC97 codec output */
1744 		EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0);
1745 		EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0);
1746 		EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1747 		EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1748 
1749 		/* in1, from CD S/PDIF */
1750 		/* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */
1751 		EFX_SKIP(4, CDSPDIFMUTE);
1752 		EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1753 		EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1754 		EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1755 		EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1756 
1757 		if (sc->dbg_level > 0) {
1758 			/* in2, ZoomVide (???) */
1759 			EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1760 			EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1761 			EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0);
1762 			EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0);
1763 		}
1764 
1765 		/* in3, TOSLink  */
1766 		EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0);
1767 		EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0);
1768 		EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0);
1769 		EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0);
1770 		/* in4, LineIn  */
1771 		EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1772 		EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1773 		EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0);
1774 		EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0);
1775 
1776 		/* in5, on-card S/PDIF */
1777 		EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
1778 		EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
1779 		EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
1780 		EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
1781 
1782 		/* in6, Line2 on Live!Drive */
1783 		EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
1784 		EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
1785 		EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0);
1786 		EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0);
1787 
1788 		if (sc->dbg_level > 0) {
1789 			/* in7, unknown */
1790 			EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
1791 			EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
1792 			EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
1793 			EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
1794 		}
1795 
1796 		/* analog and digital */
1797 		EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100);
1798 		EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100);
1799 		/* S/PDIF */
1800 		EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L);
1801 		EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R);
1802 		/* Headphones */
1803 		EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L);
1804 		EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R);
1805 
1806 		/* rec output to "ADC" */
1807 		EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100);
1808 		EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100);
1809 
1810 		if (!(sc->mch_disabled)) {
1811 			/*
1812 			 * Additional channel volume is controlled by mixer in
1813 			 * emu_dspmixer_set() in -pcm.c
1814 			 */
1815 
1816 			/* fx2/3 (pcm1) to rear */
1817 			EFX_CACHE(C_REAR_L);
1818 			EFX_CACHE(C_REAR_R);
1819 			EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
1820 			EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
1821 
1822 			EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100);
1823 			EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100);
1824 			if (sc->has_51) {
1825 				/* fx4 (pcm2) to center */
1826 				EFX_CACHE(C_CENTER);
1827 				EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
1828 				EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1829 
1830 				/* XXX in digital mode (default) this should be muted because
1831 				this output is shared with digital out */
1832 				EFX_SKIP(1, ANALOGMUTE);
1833 				EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1834 
1835 				/* fx5 (pcm3) to sub */
1836 				EFX_CACHE(C_SUB);
1837 				EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
1838 				EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1839 
1840 				/* XXX in digital mode (default) this should be muted because
1841 				this output is shared with digital out */
1842 				EFX_SKIP(1, ANALOGMUTE);
1843 				EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1844 
1845 			}
1846 		} else {
1847 			/* SND_EMU10KX_MULTICHANNEL_DISABLED */
1848 			EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */
1849 			EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */
1850 
1851 #if 0
1852 			/* XXX 5.1 does not work */
1853 
1854 			if (sc->has_51) {
1855 				/* (fx0+fx1)/2 to center */
1856 				EFX_CACHE(C_CENTER);
1857 				emu_addefxop(sc, MACS,
1858 					GPR(sc->cache_gpr[C_CENTER]),
1859 					GPR(sc->cache_gpr[C_CENTER]),
1860 					DSP_CONST(0xd), /* = 1/2 */
1861 					GPR(sc->cache_gpr[C_FRONT_L]),
1862 					&pc);
1863 				emu_addefxop(sc, MACS,
1864 					GPR(sc->cache_gpr[C_CENTER]),
1865 					GPR(sc->cache_gpr[C_CENTER]),
1866 					DSP_CONST(0xd), /* = 1/2 */
1867 					GPR(sc->cache_gpr[C_FRONT_R]),
1868 					&pc);
1869 				EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1870 
1871 				/* XXX in digital mode (default) this should be muted because
1872 				this output is shared with digital out */
1873 				EFX_SKIP(1, ANALOGMUTE);
1874 				EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1875 
1876 				/* (fx0+fx1)/2  to sub */
1877 				EFX_CACHE(C_SUB);
1878 				emu_addefxop(sc, MACS,
1879 					GPR(sc->cache_gpr[C_CENTER]),
1880 					GPR(sc->cache_gpr[C_CENTER]),
1881 					DSP_CONST(0xd), /* = 1/2 */
1882 					GPR(sc->cache_gpr[C_FRONT_L]),
1883 					&pc);
1884 				emu_addefxop(sc, MACS,
1885 					GPR(sc->cache_gpr[C_CENTER]),
1886 					GPR(sc->cache_gpr[C_CENTER]),
1887 					DSP_CONST(0xd), /* = 1/2 */
1888 					GPR(sc->cache_gpr[C_FRONT_R]),
1889 					&pc);
1890 				/* XXX add lowpass filter here */
1891 
1892 				EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1893 
1894 				/* XXX in digital mode (default) this should be muted because
1895 				this output is shared with digital out */
1896 				EFX_SKIP(1, ANALOGMUTE);
1897 				EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1898 			}
1899 #endif
1900 		} /* !mch_disabled */
1901 		if (sc->mch_rec) {
1902 			/*
1903 			 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots
1904 			 * are used as outputs and already filled with data
1905 			 */
1906 			/*
1907 			 * XXX On Live! cards stream does not begin at zero offset.
1908 			 * It can be HW, driver or sound buffering problem.
1909 			 * Use sync substream (offset 0x3E) to let userland find
1910 			 * correct data.
1911 			 */
1912 
1913 			/*
1914 			 * Substream map (in byte offsets, each substream is 2 bytes):
1915 			 *	0x00..0x1E - outputs
1916 			 *	0x20..0x3E - FX, inputs ans sync stream
1917 			 */
1918 
1919 			/* First 2 channels (offset 0x20,0x22) are empty */
1920 			for(i = (sc->has_51 ? 2 : 0); i < 2; i++)
1921 				EFX_COPY(FX2(i), DSP_CONST(0));
1922 
1923 			/* PCM Playback monitoring, offset 0x24..0x2A */
1924 			for(i = 0; i < 4; i++)
1925 				EFX_COPY(FX2(i+2), FX(i));
1926 
1927 			/* Copy of some inputs, offset 0x2C..0x3C */
1928 			for(i = 0; i < 9; i++)
1929 				EFX_COPY(FX2(i+8), INP(i));
1930 
1931 			/* sync data (0xc0de, offset 0x3E) */
1932 			sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
1933 			emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
1934 
1935 			EFX_COPY(FX2(15), GPR(sc->dummy_gpr));
1936 		} /* mch_rec */
1937 	} else /* emu10k2 and later */ {
1938 		EFX_CACHE(C_FRONT_L);
1939 		EFX_CACHE(C_FRONT_R);
1940 		EFX_CACHE(C_REC_L);
1941 		EFX_CACHE(C_REC_R);
1942 
1943 		/* fx0 to front/record, 100%/muted by default */
1944 		/*
1945 		 * FRONT_[L|R] is controlled by AC97 emulation in
1946 		 * emu_ac97_[read|write]_emulation in -pcm.c
1947 		 */
1948 		EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1949 		EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1950 		EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1951 		EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1952 
1953 		/* in0, from AC97 codec output */
1954 		EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100);
1955 		EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100);
1956 		EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1957 		EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1958 
1959 		/* in1, from CD S/PDIF */
1960 		EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1961 		EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1962 		EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1963 		EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1964 
1965 		/* in2, optical & coax S/PDIF on AudigyDrive*/
1966 		/* XXX Should be muted when GPRSCS valid stream == 0 */
1967 		EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1968 		EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1969 		EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0);
1970 		EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0);
1971 
1972 		if (sc->dbg_level > 0) {
1973 			/* in3, unknown */
1974 			EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0);
1975 			EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0);
1976 			EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0);
1977 			EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0);
1978 		}
1979 
1980 		/* in4, LineIn 2 on AudigyDrive */
1981 		EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1982 		EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1983 		EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0);
1984 		EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0);
1985 
1986 		/* in5, on-card S/PDIF */
1987 		EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
1988 		EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
1989 		EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
1990 		EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
1991 
1992 		/* in6, AUX2 on AudigyDrive */
1993 		EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
1994 		EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
1995 		EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0);
1996 		EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0);
1997 
1998 		if (sc->dbg_level > 0) {
1999 			/* in7, unknown */
2000 			EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
2001 			EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
2002 			EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
2003 			EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
2004 		}
2005 
2006 		/* front output to headphones and  alog and digital *front */
2007 		/* volume controlled by AC97 emulation */
2008 		EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100);
2009 		EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100);
2010 		EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L);
2011 		EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R);
2012 		EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L);
2013 		EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R);
2014 
2015 		/* rec output to "ADC" */
2016 		/* volume controlled by AC97 emulation */
2017 		EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100);
2018 		EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100);
2019 
2020 		if (!(sc->mch_disabled)) {
2021 			/*
2022 			 * Additional channel volume is controlled by mixer in
2023 			 * emu_dspmixer_set() in -pcm.c
2024 			 */
2025 
2026 			/* fx2/3 (pcm1) to rear */
2027 			EFX_CACHE(C_REAR_L);
2028 			EFX_CACHE(C_REAR_R);
2029 			EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
2030 			EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
2031 
2032 			EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100);
2033 			EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100);
2034 			EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L);
2035 			EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R);
2036 
2037 			/* fx4 (pcm2) to center */
2038 			EFX_CACHE(C_CENTER);
2039 			EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
2040 			EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2041 #if 0
2042 			/*
2043 			 * XXX in digital mode (default) this should be muted
2044 			 * because this output is shared with digital out
2045 			 */
2046 			EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2047 #endif
2048 			/* fx5 (pcm3) to sub */
2049 			EFX_CACHE(C_SUB);
2050 			EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
2051 			EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2052 #if 0
2053 			/*
2054 			 * XXX in digital mode (default) this should be muted
2055 			 * because this output is shared with digital out
2056 			 */
2057 			EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2058 #endif
2059 			if (sc->has_71) {
2060 				/* XXX this will broke headphones on AudigyDrive */
2061 				/* fx6/7 (pcm4) to side */
2062 				EFX_CACHE(C_SIDE_L);
2063 				EFX_CACHE(C_SIDE_R);
2064 				EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100);
2065 				EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100);
2066 				EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100);
2067 				EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100);
2068 				EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L);
2069 				EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R);
2070 			}
2071 		} else {	/* mch_disabled */
2072 			EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L);
2073 			EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R);
2074 
2075 			EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L);
2076 			EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R);
2077 
2078 			if (sc->has_51) {
2079 				/* (fx0+fx1)/2 to center */
2080 				EFX_CACHE(C_CENTER);
2081 				emu_addefxop(sc, MACS,
2082 					GPR(sc->cache_gpr[C_CENTER]),
2083 					GPR(sc->cache_gpr[C_CENTER]),
2084 					DSP_CONST(0xd), /* = 1/2 */
2085 					GPR(sc->cache_gpr[C_FRONT_L]),
2086 					&pc);
2087 				emu_addefxop(sc, MACS,
2088 					GPR(sc->cache_gpr[C_CENTER]),
2089 					GPR(sc->cache_gpr[C_CENTER]),
2090 					DSP_CONST(0xd), /* = 1/2 */
2091 					GPR(sc->cache_gpr[C_FRONT_R]),
2092 					&pc);
2093 				EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2094 
2095 				/* XXX in digital mode (default) this should be muted because
2096 				this output is shared with digital out */
2097 				EFX_SKIP(1, ANALOGMUTE);
2098 				EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2099 
2100 				/* (fx0+fx1)/2  to sub */
2101 				EFX_CACHE(C_SUB);
2102 				emu_addefxop(sc, MACS,
2103 					GPR(sc->cache_gpr[C_SUB]),
2104 					GPR(sc->cache_gpr[C_SUB]),
2105 					DSP_CONST(0xd), /* = 1/2 */
2106 					GPR(sc->cache_gpr[C_FRONT_L]),
2107 					&pc);
2108 				emu_addefxop(sc, MACS,
2109 					GPR(sc->cache_gpr[C_SUB]),
2110 					GPR(sc->cache_gpr[C_SUB]),
2111 					DSP_CONST(0xd), /* = 1/2 */
2112 					GPR(sc->cache_gpr[C_FRONT_R]),
2113 					&pc);
2114 				/* XXX add lowpass filter here */
2115 
2116 				EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2117 
2118 				/* XXX in digital mode (default) this should be muted because
2119 				this output is shared with digital out */
2120 				EFX_SKIP(1, ANALOGMUTE);
2121 				EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2122 			}
2123 		} /* mch_disabled */
2124 		if (sc->mch_rec) {
2125 			/* MCH RECORDING, high 32 slots */
2126 
2127 			/*
2128 			 * Stream map (in byte offsets):
2129 			 *	0x00..0x3E - outputs
2130 			 *	0x40..0x7E - FX, inputs
2131 			 *	each substream is 2 bytes.
2132 			 */
2133 			/*
2134 			 * XXX Audigy 2 Value cards (and, possibly,
2135 			 * Audigy 4) write some unknown data in place of
2136 			 * some outputs (offsets 0x20..0x3F) and one
2137 			 * input (offset 0x7E).
2138 			 */
2139 
2140 			/* PCM Playback monitoring, offsets 0x40..0x5E */
2141 			for(i = 0; i < 16; i++)
2142 				EFX_COPY(FX2(i), FX(i));
2143 
2144 			/* Copy of all inputs, offsets 0x60..0x7E */
2145 			for(i = 0; i < 16; i++)
2146 				EFX_COPY(FX2(i+16), INP(i));
2147 #if 0
2148 			/* XXX Audigy seems to work correct and does not need this */
2149 			/* sync data (0xc0de), offset 0x7E */
2150 			sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
2151 			emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
2152 			EFX_COPY(FX2(31), GPR(sc->dummy_gpr));
2153 #endif
2154 		} /* mch_rec */
2155 	}
2156 
2157 	sc->routing_code_end = pc;
2158 
2159 	/* start DSP */
2160 	if (sc->is_emu10k1) {
2161 		emu_wrptr(sc, 0, DBG, 0);
2162 	} else {
2163 		emu_wrptr(sc, 0, A_DBG, 0);
2164 	}
2165 }
2166 
2167 /* /dev/em10kx */
2168 static d_open_t		emu10kx_open;
2169 static d_close_t	emu10kx_close;
2170 static d_read_t		emu10kx_read;
2171 
2172 static struct cdevsw emu10kx_cdevsw = {
2173 	.d_open = 	emu10kx_open,
2174 	.d_close =	emu10kx_close,
2175 	.d_read = 	emu10kx_read,
2176 	.d_name = 	"emu10kx",
2177 	.d_version = 	D_VERSION,
2178 };
2179 
2180 
2181 static int
2182 emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2183 {
2184 	int error;
2185 	struct emu_sc_info *sc;
2186 
2187 	sc = i_dev->si_drv1;
2188 	mtx_lock(&sc->emu10kx_lock);
2189 	if (sc->emu10kx_isopen) {
2190 		mtx_unlock(&sc->emu10kx_lock);
2191 		return (EBUSY);
2192 	}
2193 	sc->emu10kx_isopen = 1;
2194 	mtx_unlock(&sc->emu10kx_lock);
2195 	if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) {
2196 		error = ENXIO;
2197 		goto out;
2198 	}
2199 	sc->emu10kx_bufptr = 0;
2200 	error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM;
2201 out:
2202 	if (error) {
2203 		mtx_lock(&sc->emu10kx_lock);
2204 		sc->emu10kx_isopen = 0;
2205 		mtx_unlock(&sc->emu10kx_lock);
2206 	}
2207 	return (error);
2208 }
2209 
2210 static int
2211 emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2212 {
2213 	struct emu_sc_info *sc;
2214 
2215 	sc = i_dev->si_drv1;
2216 
2217 	mtx_lock(&sc->emu10kx_lock);
2218 	if (!(sc->emu10kx_isopen)) {
2219 		mtx_unlock(&sc->emu10kx_lock);
2220 		return (EBADF);
2221 	}
2222 	sbuf_delete(&sc->emu10kx_sbuf);
2223 	sc->emu10kx_isopen = 0;
2224 	mtx_unlock(&sc->emu10kx_lock);
2225 
2226 	return (0);
2227 }
2228 
2229 static int
2230 emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused)
2231 {
2232 	int l, err;
2233 	struct emu_sc_info *sc;
2234 
2235 	sc = i_dev->si_drv1;
2236 	mtx_lock(&sc->emu10kx_lock);
2237 	if (!(sc->emu10kx_isopen)) {
2238 		mtx_unlock(&sc->emu10kx_lock);
2239 		return (EBADF);
2240 	}
2241 	mtx_unlock(&sc->emu10kx_lock);
2242 
2243 	l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr);
2244 	err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0;
2245 	sc->emu10kx_bufptr += l;
2246 
2247 	return (err);
2248 }
2249 
2250 static int
2251 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s)
2252 {
2253 	int i;
2254 
2255 	sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n");
2256 	sbuf_printf(s, "\nHardware resource usage:\n");
2257 	sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs);
2258 	sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size);
2259 	sbuf_printf(s, "Card supports");
2260 	if (sc->has_ac97) {
2261 		sbuf_printf(s, " AC97 codec");
2262 	} else {
2263 		sbuf_printf(s, " NO AC97 codec");
2264 	}
2265 	if (sc->has_51) {
2266 		if (sc->has_71)
2267 			sbuf_printf(s, " and 7.1 output");
2268 		else
2269 			sbuf_printf(s, " and 5.1 output");
2270 	}
2271 	if (sc->is_emu10k1)
2272 		sbuf_printf(s, ", SBLive! DSP code");
2273 	if (sc->is_emu10k2)
2274 		sbuf_printf(s, ", Audigy DSP code");
2275 	if (sc->is_ca0102)
2276 		sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks");
2277 	if (sc->is_ca0108)
2278 		sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks");
2279 	sbuf_printf(s, "\n");
2280 	if (sc->broken_digital)
2281 		sbuf_printf(s, "Digital mode unsupported\n");
2282 	sbuf_printf(s, "\nInstalled devices:\n");
2283 	for (i = 0; i < RT_COUNT; i++)
2284 		if (sc->pcm[i] != NULL)
2285 			if (device_is_attached(sc->pcm[i])) {
2286 				sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i]));
2287 			}
2288 	if (sc->midi[0] != NULL)
2289 		if (device_is_attached(sc->midi[0])) {
2290 			sbuf_printf(s, "EMU10Kx MIDI Interface\n");
2291 			sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0]));
2292 		}
2293 	if (sc->midi[1] != NULL)
2294 		if (device_is_attached(sc->midi[1])) {
2295 			sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1]));
2296 		}
2297 	if (sc->midi[0] != NULL)
2298 		if (device_is_attached(sc->midi[0])) {
2299 			sbuf_printf(s, "\tIR reciever MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled");
2300 		}
2301 	sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital");
2302 
2303 	sbuf_finish(s);
2304 	return (sbuf_len(s));
2305 }
2306 
2307 /* INIT & UNINIT */
2308 static int
2309 emu10kx_dev_init(struct emu_sc_info *sc)
2310 {
2311 	int unit;
2312 
2313 	mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0);
2314 	unit = device_get_unit(sc->dev);
2315 
2316 	sc->cdev = make_dev(&emu10kx_cdevsw, unit2minor(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit);
2317 	if (sc->cdev != NULL) {
2318 		sc->cdev->si_drv1 = sc;
2319 		return (0);
2320 	}
2321 	return (ENXIO);
2322 }
2323 
2324 static int
2325 emu10kx_dev_uninit(struct emu_sc_info *sc)
2326 {
2327 	mtx_lock(&sc->emu10kx_lock);
2328 	if (sc->emu10kx_isopen) {
2329 		mtx_unlock(&sc->emu10kx_lock);
2330 		return (EBUSY);
2331 	}
2332 	if (sc->cdev)
2333 		destroy_dev(sc->cdev);
2334 	sc->cdev = 0;
2335 
2336 	mtx_destroy(&sc->emu10kx_lock);
2337 	return (0);
2338 }
2339 
2340 /* resource manager */
2341 int
2342 emu_rm_init(struct emu_sc_info *sc)
2343 {
2344 	int i;
2345 	int maxcount;
2346 	struct emu_rm *rm;
2347 
2348 	rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO);
2349 	if (rm == NULL) {
2350 		return (ENOMEM);
2351 	}
2352 	sc->rm = rm;
2353 	rm->card = sc;
2354 	maxcount = sc->num_gprs;
2355 	rm->num_used = 0;
2356 	mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF);
2357 	rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR);
2358 	for (i = 0; i < rm->num_gprs; i++)
2359 		rm->allocmap[i] = 0;
2360 	/* pre-allocate gpr[0] */
2361 	rm->allocmap[0] = 1;
2362 	rm->last_free_gpr = 1;
2363 
2364 	return (0);
2365 }
2366 
2367 int
2368 emu_rm_uninit(struct emu_sc_info *sc)
2369 {
2370 	int i;
2371 
2372 	if (sc->dbg_level > 1) {
2373 		mtx_lock(&(sc->rm->gpr_lock));
2374 		for (i = 1; i < sc->rm->last_free_gpr; i++)
2375 			if (sc->rm->allocmap[i] > 0)
2376 				device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i);
2377 		mtx_unlock(&(sc->rm->gpr_lock));
2378 	}
2379 
2380 	mtx_destroy(&(sc->rm->gpr_lock));
2381 	free(sc->rm, M_DEVBUF);
2382 	return (0);
2383 }
2384 
2385 static int
2386 emu_rm_gpr_alloc(struct emu_rm *rm, int count)
2387 {
2388 	int i, j;
2389 	int allocated_gpr;
2390 
2391 	allocated_gpr = rm->num_gprs;
2392 	/* try fast way first */
2393 	mtx_lock(&(rm->gpr_lock));
2394 	if (rm->last_free_gpr + count <= rm->num_gprs) {
2395 		allocated_gpr = rm->last_free_gpr;
2396 		rm->last_free_gpr += count;
2397 		rm->allocmap[allocated_gpr] = count;
2398 		for (i = 1; i < count; i++)
2399 			rm->allocmap[allocated_gpr + i] = -(count - i);
2400 	} else {
2401 		/* longer */
2402 		i = 0;
2403 		allocated_gpr = rm->num_gprs;
2404 		while (i < rm->last_free_gpr - count) {
2405 			if (rm->allocmap[i] > 0) {
2406 				i += rm->allocmap[i];
2407 			} else {
2408 				allocated_gpr = i;
2409 				for (j = 1; j < count; j++) {
2410 					if (rm->allocmap[i + j] != 0)
2411 						allocated_gpr = rm->num_gprs;
2412 				}
2413 				if (allocated_gpr == i)
2414 					break;
2415 			}
2416 		}
2417 		if (allocated_gpr + count < rm->last_free_gpr) {
2418 			rm->allocmap[allocated_gpr] = count;
2419 			for (i = 1; i < count; i++)
2420 				rm->allocmap[allocated_gpr + i] = -(count - i);
2421 
2422 		}
2423 	}
2424 	if (allocated_gpr == rm->num_gprs)
2425 		allocated_gpr = (-1);
2426 	if (allocated_gpr >= 0)
2427 		rm->num_used += count;
2428 	mtx_unlock(&(rm->gpr_lock));
2429 	return (allocated_gpr);
2430 }
2431 
2432 /* mixer */
2433 void
2434 emumix_set_mode(struct emu_sc_info *sc, int mode)
2435 {
2436 	uint32_t a_iocfg;
2437 	uint32_t hcfg;
2438 	uint32_t tmp;
2439 
2440 	switch (mode) {
2441 	case MODE_DIGITAL:
2442 		/* FALLTHROUGH */
2443 	case MODE_ANALOG:
2444 		break;
2445 	default:
2446 		return;
2447 	}
2448 
2449 	hcfg = HCFG_AUDIOENABLE | HCFG_AUTOMUTE;
2450 	a_iocfg = 0;
2451 
2452 	if (sc->rev >= 6)
2453 		hcfg |= HCFG_JOYENABLE;
2454 
2455 	if (sc->is_emu10k1)
2456 		hcfg |= HCFG_LOCKTANKCACHE_MASK;
2457 	else
2458 		hcfg |= HCFG_CODECFORMAT_I2S | HCFG_JOYENABLE;
2459 
2460 
2461 	if (mode == MODE_DIGITAL) {
2462 		if (sc->broken_digital) {
2463 			device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
2464 		}
2465 		a_iocfg |= A_IOCFG_ENABLE_DIGITAL;
2466 		hcfg |= HCFG_GPOUT0;
2467 	}
2468 
2469 	if (mode == MODE_ANALOG)
2470 		emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2471 
2472 	if (sc->is_emu10k2)
2473 		a_iocfg |= 0x80; /* XXX */
2474 
2475 	if ((sc->is_ca0102) || (sc->is_ca0108))
2476 		/*
2477 		 * Setting A_IOCFG_DISABLE_ANALOG will do opposite things
2478 		 * on diffrerent cards.
2479 		 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
2480 		 * "disable analog outs" on Audigy (emu10k2)
2481 		 */
2482 		a_iocfg |= A_IOCFG_DISABLE_ANALOG;
2483 
2484 	if (sc->is_ca0108)
2485 		a_iocfg |= 0x20; /* XXX */
2486 
2487 	/* Mute analog center & subwoofer before mode change */
2488 	if (mode == MODE_DIGITAL)
2489 		emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
2490 
2491 	emu_wr(sc, HCFG, hcfg, 4);
2492 
2493 	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2494 		tmp = emu_rd(sc, A_IOCFG, 2);
2495 		tmp = a_iocfg;
2496 		emu_wr(sc, A_IOCFG, tmp, 2);
2497 	}
2498 
2499 	/* Unmute if we have changed mode to analog. */
2500 
2501 	if (mode == MODE_ANALOG)
2502 		emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0);
2503 
2504 	sc->mode = mode;
2505 }
2506 
2507 void
2508 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode)
2509 {
2510 	uint32_t spcs;
2511 
2512 	switch (mode) {
2513 	case SPDIF_MODE_PCM:
2514 		break;
2515 	case SPDIF_MODE_AC3:
2516 		device_printf(sc->dev, "AC3 mode does not work and disabled\n");
2517 		return;
2518 	default:
2519 		return;
2520 	}
2521 
2522 	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
2523 	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
2524 	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
2525 	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
2526 
2527 	mode = SPDIF_MODE_PCM;
2528 
2529 	emu_wrptr(sc, 0, SPCS0, spcs);
2530 	emu_wrptr(sc, 0, SPCS1, spcs);
2531 	emu_wrptr(sc, 0, SPCS2, spcs);
2532 }
2533 
2534 #define	L2L_POINTS	10
2535 
2536 static int l2l_df[L2L_POINTS] = {
2537 	0x572C5CA,		/* 100..90 */
2538 	0x3211625,		/* 90..80 */
2539 	0x1CC1A76,		/* 80..70 */
2540 	0x108428F,		/* 70..60 */
2541 	0x097C70A,		/* 60..50 */
2542 	0x0572C5C,		/* 50..40 */
2543 	0x0321162,		/* 40..30 */
2544 	0x01CC1A7,		/* 30..20 */
2545 	0x0108428,		/* 20..10 */
2546 	0x016493D		/* 10..0 */
2547 };
2548 
2549 static int l2l_f[L2L_POINTS] = {
2550 	0x4984461A,		/* 90 */
2551 	0x2A3968A7,		/* 80 */
2552 	0x18406003,		/* 70 */
2553 	0x0DEDC66D,		/* 60 */
2554 	0x07FFFFFF,		/* 50 */
2555 	0x04984461,		/* 40 */
2556 	0x02A3968A,		/* 30 */
2557 	0x01840600,		/* 20 */
2558 	0x00DEDC66,		/* 10 */
2559 	0x00000000		/* 0 */
2560 };
2561 
2562 
2563 static int
2564 log2lin(int log_t)
2565 {
2566 	int lin_t;
2567 	int idx, lin;
2568 
2569 	if (log_t <= 0) {
2570 		lin_t = 0x00000000;
2571 		return (lin_t);
2572 	}
2573 
2574 	if (log_t >= 100) {
2575 		lin_t = 0x7fffffff;
2576 		return (lin_t);
2577 	}
2578 
2579 	idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS);
2580 	lin = log_t % (L2L_POINTS);
2581 	lin_t = l2l_df[idx] * lin + l2l_f[idx];
2582 	return (lin_t);
2583 }
2584 
2585 
2586 void
2587 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol)
2588 {
2589 
2590 	vol = log2lin(vol);
2591 	emumix_set_gpr(sc, gpr, vol);
2592 }
2593 
2594 void
2595 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
2596 {
2597 	if (sc->dbg_level > 1)
2598 		if (gpr == 0) {
2599 			device_printf(sc->dev, "Zero gpr write access\n");
2600 #ifdef KDB
2601 			kdb_backtrace();
2602 #endif
2603 			return;
2604 			}
2605 
2606 	emu_wrptr(sc, 0, GPR(gpr), val);
2607 }
2608 
2609 void
2610 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume)
2611 {
2612 
2613 	RANGE(volume, 0, 100);
2614 	if (mixer_idx < NUM_MIXERS) {
2615 		sc->mixer_volcache[mixer_idx] = volume;
2616 		emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume);
2617 	}
2618 }
2619 
2620 int
2621 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx)
2622 {
2623 	if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0))
2624 		return (sc->mixer_volcache[mixer_idx]);
2625 	return (-1);
2626 }
2627 
2628 /* Init CardBus part */
2629 static int
2630 emu_cardbus_init(struct emu_sc_info *sc)
2631 {
2632 
2633 	/*
2634 	 * XXX May not need this if we have IPR3 handler.
2635 	 * Is it a real init calls, or IPR3 interrupt acknowledgments?
2636 	 * Looks much like "(data << 16) | register".
2637 	 */
2638 	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
2639 	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001);
2640 	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f);
2641 	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f);
2642 
2643 	emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f);
2644 
2645 	return (0);
2646 }
2647 
2648 /* Probe and attach the card */
2649 static int
2650 emu_init(struct emu_sc_info *sc)
2651 {
2652 	uint32_t ch, tmp;
2653 	uint32_t spdif_sr;
2654 	uint32_t ac97slot;
2655 	int def_mode;
2656 	int i;
2657 
2658 	/* disable audio and lock cache */
2659 	emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
2660 
2661 	/* reset recording buffers */
2662 	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
2663 	emu_wrptr(sc, 0, MICBA, 0);
2664 	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
2665 	emu_wrptr(sc, 0, FXBA, 0);
2666 	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
2667 	emu_wrptr(sc, 0, ADCBA, 0);
2668 
2669 	/* disable channel interrupt */
2670 	emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4);
2671 	emu_wrptr(sc, 0, CLIEL, 0);
2672 	emu_wrptr(sc, 0, CLIEH, 0);
2673 	emu_wrptr(sc, 0, SOLEL, 0);
2674 	emu_wrptr(sc, 0, SOLEH, 0);
2675 
2676 	/* disable P16V and S/PDIF interrupts */
2677 	if ((sc->is_ca0102) || (sc->is_ca0108))
2678 		emu_wr(sc, INTE2, 0, 4);
2679 
2680 	if (sc->is_ca0102)
2681 		emu_wr(sc, INTE3, 0, 4);
2682 
2683 	/* init phys inputs and outputs */
2684 	ac97slot = 0;
2685 	if (sc->has_51)
2686 		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE;
2687 	if (sc->has_71)
2688 		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE | AC97SLOT_REAR_LEFT | AC97SLOT_REAR_RIGHT;
2689 	if (sc->is_emu10k2)
2690 		ac97slot |= 0x40;
2691 	emu_wrptr(sc, 0, AC97SLOT, ac97slot);
2692 
2693 	if (sc->is_emu10k2)	/* XXX for later cards? */
2694 		emu_wrptr(sc, 0, SPBYPASS, 0xf00);	/* What will happen if
2695 							 * we write 1 here? */
2696 
2697 	if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
2698 	     /* alignment */ 2, /* boundary */ 0,
2699 	     /* lowaddr */ 1 << 31,	/* can only access 0-2gb */
2700 	     /* highaddr */ BUS_SPACE_MAXADDR,
2701 	     /* filter */ NULL, /* filterarg */ NULL,
2702 	     /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff,
2703 	     /* flags */ 0, /* lockfunc */ busdma_lock_mutex,
2704 	     /* lockarg */ &Giant, &(sc->mem.dmat)) != 0) {
2705 		device_printf(sc->dev, "unable to create dma tag\n");
2706 		bus_dma_tag_destroy(sc->mem.dmat);
2707 		return (ENOMEM);
2708 	}
2709 
2710 	sc->mem.card = sc;
2711 	SLIST_INIT(&sc->mem.blocks);
2712 	sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr);
2713 	if (sc->mem.ptb_pages == NULL)
2714 		return (ENOMEM);
2715 
2716 	sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr);
2717 	if (sc->mem.silent_page == NULL) {
2718 		emu_free(&sc->mem, sc->mem.ptb_pages);
2719 		return (ENOMEM);
2720 	}
2721 	/* Clear page with silence & setup all pointers to this page */
2722 	bzero(sc->mem.silent_page, EMUPAGESIZE);
2723 	tmp = (uint32_t) (sc->mem.silent_page_addr) << 1;
2724 	for (i = 0; i < EMU_MAXPAGES; i++)
2725 		sc->mem.ptb_pages[i] = tmp | i;
2726 
2727 	for (ch = 0; ch < NUM_G; ch++) {
2728 		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
2729 		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
2730 	}
2731 	emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
2732 	emu_wrptr(sc, 0, TCB, 0);	/* taken from original driver */
2733 	emu_wrptr(sc, 0, TCBS, 0);	/* taken from original driver */
2734 
2735 	/* init envelope engine */
2736 	for (ch = 0; ch < NUM_G; ch++) {
2737 		emu_wrptr(sc, ch, DCYSUSV, 0);
2738 		emu_wrptr(sc, ch, IP, 0);
2739 		emu_wrptr(sc, ch, VTFT, 0xffff);
2740 		emu_wrptr(sc, ch, CVCF, 0xffff);
2741 		emu_wrptr(sc, ch, PTRX, 0);
2742 		emu_wrptr(sc, ch, CPF, 0);
2743 		emu_wrptr(sc, ch, CCR, 0);
2744 
2745 		emu_wrptr(sc, ch, PSST, 0);
2746 		emu_wrptr(sc, ch, DSL, 0x10);
2747 		emu_wrptr(sc, ch, CCCA, 0);
2748 		emu_wrptr(sc, ch, Z1, 0);
2749 		emu_wrptr(sc, ch, Z2, 0);
2750 		emu_wrptr(sc, ch, FXRT, 0xd01c0000);
2751 
2752 		emu_wrptr(sc, ch, ATKHLDM, 0);
2753 		emu_wrptr(sc, ch, DCYSUSM, 0);
2754 		emu_wrptr(sc, ch, IFATN, 0xffff);
2755 		emu_wrptr(sc, ch, PEFE, 0);
2756 		emu_wrptr(sc, ch, FMMOD, 0);
2757 		emu_wrptr(sc, ch, TREMFRQ, 24);	/* 1 Hz */
2758 		emu_wrptr(sc, ch, FM2FRQ2, 24);	/* 1 Hz */
2759 		emu_wrptr(sc, ch, TEMPENV, 0);
2760 
2761 		/*** these are last so OFF prevents writing ***/
2762 		emu_wrptr(sc, ch, LFOVAL2, 0);
2763 		emu_wrptr(sc, ch, LFOVAL1, 0);
2764 		emu_wrptr(sc, ch, ATKHLDV, 0);
2765 		emu_wrptr(sc, ch, ENVVOL, 0);
2766 		emu_wrptr(sc, ch, ENVVAL, 0);
2767 
2768 		if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2769 			emu_wrptr(sc, ch, 0x4c, 0x0);
2770 			emu_wrptr(sc, ch, 0x4d, 0x0);
2771 			emu_wrptr(sc, ch, 0x4e, 0x0);
2772 			emu_wrptr(sc, ch, 0x4f, 0x0);
2773 			emu_wrptr(sc, ch, A_FXRT1, 0x3f3f3f3f);
2774 			emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
2775 			emu_wrptr(sc, ch, A_SENDAMOUNTS, 0x0);
2776 		}
2777 	}
2778 
2779 	emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2780 
2781 	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2782 		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, A_SPDIF_48000);
2783 
2784 	/*
2785 	 * CAxxxx cards needs additional setup:
2786 	 * 1. Set I2S capture sample rate to 96000
2787 	 * 2. Disable P16v / P17v proceesing
2788 	 * 3. Allow EMU10K DSP inputs
2789 	 */
2790 	if ((sc->is_ca0102) || (sc->is_ca0108)) {
2791 
2792 		spdif_sr = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE);
2793 		spdif_sr &= 0xfffff1ff;
2794 		spdif_sr |= A_I2S_CAPTURE_96000;
2795 		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, spdif_sr);
2796 
2797 		/* Disable P16v processing */
2798 		emu_wr_p16vptr(sc, 0, SRCSel, 0x14);
2799 
2800 		/* Setup P16v/P17v sound routing */
2801 		if (sc->is_ca0102)
2802 			emu_wr_p16vptr(sc, 0, SRCMULTI_ENABLE, 0xFF00FF00);
2803 		else {
2804 			emu_wr_p16vptr(sc, 0, P17V_MIXER_I2S_ENABLE, 0xFF000000);
2805 			emu_wr_p16vptr(sc, 0, P17V_MIXER_SPDIF_ENABLE, 0xFF000000);
2806 
2807 			tmp = emu_rd(sc, A_IOCFG, 2);
2808 			emu_wr(sc, A_IOCFG, tmp & ~0x8, 2);
2809 		}
2810 	}
2811 	emu_initefx(sc);
2812 
2813 	def_mode = MODE_ANALOG;
2814 	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2815 		def_mode = MODE_DIGITAL;
2816 	if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) {
2817 		device_printf(sc->dev, "Audigy card initialized in analog mode.\n");
2818 		def_mode = MODE_ANALOG;
2819 	}
2820 	emumix_set_mode(sc, def_mode);
2821 
2822 	if (bootverbose) {
2823 		tmp = emu_rd(sc, HCFG, 4);
2824 		device_printf(sc->dev, "Card Configuration (   0x%08x )\n", tmp);
2825 		device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n",
2826 		    (tmp & 0x80000000 ? "[Legacy MPIC] " : ""),
2827 		    (tmp & 0x40000000 ? "[0x40] " : ""),
2828 		    (tmp & 0x20000000 ? "[0x20] " : ""),
2829 		    (tmp & 0x10000000 ? "[0x10] " : ""),
2830 		    (tmp & 0x08000000 ? "[0x08] " : ""),
2831 		    (tmp & 0x04000000 ? "[0x04] " : ""),
2832 		    (tmp & 0x02000000 ? "[0x02] " : ""),
2833 		    (tmp & 0x01000000 ? "[0x01]" : " "));
2834 		device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n",
2835 		    (tmp & 0x00800000 ? "[0x80] " : ""),
2836 		    (tmp & 0x00400000 ? "[0x40] " : ""),
2837 		    (tmp & 0x00200000 ? "[Legacy INT] " : ""),
2838 		    (tmp & 0x00100000 ? "[0x10] " : ""),
2839 		    (tmp & 0x00080000 ? "[0x08] " : ""),
2840 		    (tmp & 0x00040000 ? "[Codec4] " : ""),
2841 		    (tmp & 0x00020000 ? "[Codec2] " : ""),
2842 		    (tmp & 0x00010000 ? "[I2S Codec]" : " "));
2843 		device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n",
2844 		    (tmp & 0x00008000 ? "[0x80] " : ""),
2845 		    (tmp & 0x00004000 ? "[GPINPUT0] " : ""),
2846 		    (tmp & 0x00002000 ? "[GPINPUT1] " : ""),
2847 		    (tmp & 0x00001000 ? "[GPOUT0] " : ""),
2848 		    (tmp & 0x00000800 ? "[GPOUT1] " : ""),
2849 		    (tmp & 0x00000400 ? "[GPOUT2] " : ""),
2850 		    (tmp & 0x00000200 ? "[Joystick] " : ""),
2851 		    (tmp & 0x00000100 ? "[0x01]" : " "));
2852 		device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n",
2853 		    (tmp & 0x00000080 ? "[0x80] " : ""),
2854 		    (tmp & 0x00000040 ? "[0x40] " : ""),
2855 		    (tmp & 0x00000020 ? "[0x20] " : ""),
2856 		    (tmp & 0x00000010 ? "[AUTOMUTE] " : ""),
2857 		    (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""),
2858 		    (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""),
2859 		    (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""),
2860 		    (tmp & 0x00000001 ? "[AUDIOENABLE]" : " "));
2861 
2862 		if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2863 			tmp = emu_rd(sc, A_IOCFG, 2);
2864 			device_printf(sc->dev, "Audigy Card Configuration (    0x%04x )\n", tmp);
2865 			device_printf(sc->dev, "Audigy Card Configuration (  & 0xff00 )");
2866 			printf(" : %s%s%s%s%s%s%s%s\n",
2867 			    (tmp & 0x8000 ? "[Rear Speakers] " : ""),
2868 			    (tmp & 0x4000 ? "[Front Speakers] " : ""),
2869 			    (tmp & 0x2000 ? "[0x20] " : ""),
2870 			    (tmp & 0x1000 ? "[0x10] " : ""),
2871 			    (tmp & 0x0800 ? "[0x08] " : ""),
2872 			    (tmp & 0x0400 ? "[0x04] " : ""),
2873 			    (tmp & 0x0200 ? "[0x02] " : ""),
2874 			    (tmp & 0x0100 ? "[AudigyDrive Phones]" : " "));
2875 			device_printf(sc->dev, "Audigy Card Configuration (  & 0x00ff )");
2876 			printf(" : %s%s%s%s%s%s%s%s\n",
2877 			    (tmp & 0x0080 ? "[0x80] " : ""),
2878 			    (tmp & 0x0040 ? "[Mute AnalogOut] " : ""),
2879 			    (tmp & 0x0020 ? "[0x20] " : ""),
2880 			    (tmp & 0x0010 ? "[0x10] " : ""),
2881 			    (tmp & 0x0008 ? "[0x08] " : ""),
2882 			    (tmp & 0x0004 ? "[GPOUT0] " : ""),
2883 			    (tmp & 0x0002 ? "[GPOUT1] " : ""),
2884 			    (tmp & 0x0001 ? "[GPOUT2]" : " "));
2885 		}		/* is_emu10k2 or ca* */
2886 	}			/* bootverbose */
2887 	return (0);
2888 }
2889 
2890 static int
2891 emu_uninit(struct emu_sc_info *sc)
2892 {
2893 	uint32_t ch;
2894 	struct emu_memblk *blk;
2895 
2896 	emu_wr(sc, INTE, 0, 4);
2897 	for (ch = 0; ch < NUM_G; ch++)
2898 		emu_wrptr(sc, ch, DCYSUSV, 0);
2899 	for (ch = 0; ch < NUM_G; ch++) {
2900 		emu_wrptr(sc, ch, VTFT, 0);
2901 		emu_wrptr(sc, ch, CVCF, 0);
2902 		emu_wrptr(sc, ch, PTRX, 0);
2903 		emu_wrptr(sc, ch, CPF, 0);
2904 	}
2905 
2906 	/* disable audio and lock cache */
2907 	emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
2908 
2909 	emu_wrptr(sc, 0, PTB, 0);
2910 	/* reset recording buffers */
2911 	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
2912 	emu_wrptr(sc, 0, MICBA, 0);
2913 	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
2914 	emu_wrptr(sc, 0, FXBA, 0);
2915 	emu_wrptr(sc, 0, FXWC, 0);
2916 	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
2917 	emu_wrptr(sc, 0, ADCBA, 0);
2918 	emu_wrptr(sc, 0, TCB, 0);
2919 	emu_wrptr(sc, 0, TCBS, 0);
2920 
2921 	/* disable channel interrupt */
2922 	emu_wrptr(sc, 0, CLIEL, 0);
2923 	emu_wrptr(sc, 0, CLIEH, 0);
2924 	emu_wrptr(sc, 0, SOLEL, 0);
2925 	emu_wrptr(sc, 0, SOLEH, 0);
2926 
2927 	if (!SLIST_EMPTY(&sc->mem.blocks))
2928 		device_printf(sc->dev, "warning: memblock list not empty\n");
2929 
2930 	SLIST_FOREACH(blk, &sc->mem.blocks, link)
2931 		if (blk != NULL)
2932 		device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner);
2933 
2934 	emu_free(&sc->mem, sc->mem.ptb_pages);
2935 	emu_free(&sc->mem, sc->mem.silent_page);
2936 
2937 	return (0);
2938 }
2939 
2940 static int
2941 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result)
2942 {
2943 	struct sndcard_func *func = device_get_ivars(dev);
2944 	struct emu_sc_info *sc = device_get_softc(bus);
2945 
2946 	if (func==NULL)
2947 		return (ENOMEM);
2948 	if (sc == NULL)
2949 		return (ENOMEM);
2950 
2951 	switch (ivar_index) {
2952 	case EMU_VAR_FUNC:
2953 		*result = func->func;
2954 		break;
2955 	case EMU_VAR_ROUTE:
2956 		if (func->varinfo == NULL)
2957 			return (ENOMEM);
2958 		*result = ((struct emu_pcminfo *)func->varinfo)->route;
2959 		break;
2960 	case EMU_VAR_ISEMU10K1:
2961 		*result = sc->is_emu10k1;
2962 		break;
2963 	case EMU_VAR_MCH_DISABLED:
2964 		*result = sc->mch_disabled;
2965 		break;
2966 	case EMU_VAR_MCH_REC:
2967 		*result = sc->mch_rec;
2968 		break;
2969 	default:
2970 		return (ENOENT);
2971 	}
2972 
2973 	return (0);
2974 }
2975 
2976 static int
2977 emu_write_ivar(device_t bus __unused, device_t dev __unused,
2978     int ivar_index, uintptr_t value __unused)
2979 {
2980 
2981 	switch (ivar_index) {
2982 		case 0:
2983 		return (EINVAL);
2984 
2985 	default:
2986 		return (ENOENT);
2987 	}
2988 }
2989 
2990 static int
2991 emu_pci_probe(device_t dev)
2992 {
2993 	struct sbuf *s;
2994 	unsigned int thiscard = 0;
2995 	uint16_t vendor;
2996 
2997 	vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2);
2998 	if (vendor != 0x1102)
2999 		return (ENXIO);	/* Not Creative */
3000 
3001 	thiscard = emu_getcard(dev);
3002 	if (thiscard == 0)
3003 		return (ENXIO);
3004 
3005 	s = sbuf_new(NULL, NULL, 4096, 0);
3006 	if (s == NULL)
3007 		return (ENOMEM);
3008 	sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode);
3009 	sbuf_finish(s);
3010 
3011 	device_set_desc_copy(dev, sbuf_data(s));
3012 
3013 	sbuf_delete(s);
3014 
3015 	return (BUS_PROBE_DEFAULT);
3016 }
3017 
3018 
3019 static int
3020 emu_pci_attach(device_t dev)
3021 {
3022 	struct sndcard_func *func;
3023 	struct emu_sc_info *sc;
3024 	struct emu_pcminfo *pcminfo;
3025 #if 0
3026 	struct emu_midiinfo *midiinfo;
3027 #endif
3028 	uint32_t data;
3029 	int i;
3030 	int device_flags;
3031 	char status[255];
3032 	int error = ENXIO;
3033 	int unit;
3034 
3035 	sc = device_get_softc(dev);
3036 	unit = device_get_unit(dev);
3037 
3038 	if (resource_disabled("emu10kx", unit)) {
3039 		device_printf(dev, "disabled by kernel hints\n");
3040 		return (ENXIO); /* XXX to avoid unit reuse */
3041 	}
3042 
3043 	/* Get configuration */
3044 
3045 	sc->ctx = device_get_sysctl_ctx(dev);
3046 	if (sc->ctx == NULL)
3047 		goto bad;
3048 	sc->root = device_get_sysctl_tree(dev);
3049 	if (sc->root == NULL)
3050 		goto bad;
3051 
3052 	if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled)))
3053 		RANGE(sc->mch_disabled, 0, 1);
3054 	SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3055 	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3056             OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting");
3057 
3058 	if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec)))
3059 		RANGE(sc->mch_rec, 0, 1);
3060 	SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3061 	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3062             OID_AUTO, "multichannel_recording", CTLFLAG_RD,  &(sc->mch_rec), 0, "Multichannel recording setting");
3063 
3064 	if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level)))
3065 		RANGE(sc->mch_rec, 0, 2);
3066 	SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3067 	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3068             OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level");
3069 
3070 	/* Fill in the softc. */
3071 	mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF);
3072 	mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF);
3073 	sc->dev = dev;
3074 	sc->type = pci_get_devid(dev);
3075 	sc->rev = pci_get_revid(dev);
3076 	sc->enable_ir = 0;
3077 	sc->has_ac97 = 0;
3078 	sc->has_51 = 0;
3079 	sc->has_71 = 0;
3080 	sc->broken_digital = 0;
3081 	sc->is_emu10k1 = 0;
3082 	sc->is_emu10k2 = 0;
3083 	sc->is_ca0102 = 0;
3084 	sc->is_ca0108 = 0;
3085 	sc->is_cardbus = 0;
3086 
3087 	device_flags = emu_cards[emu_getcard(dev)].flags;
3088 	if (device_flags & HAS_51)
3089 		sc->has_51 = 1;
3090 	if (device_flags & HAS_71) {
3091 		sc->has_51 = 1;
3092 		sc->has_71 = 1;
3093 	}
3094 	if (device_flags & IS_EMU10K1)
3095 		sc->is_emu10k1 = 1;
3096 	if (device_flags & IS_EMU10K2)
3097 		sc->is_emu10k2 = 1;
3098 	if (device_flags & IS_CA0102)
3099 		sc->is_ca0102 = 1;
3100 	if (device_flags & IS_CA0108)
3101 		sc->is_ca0108 = 1;
3102 	if ((sc->is_emu10k2) && (sc->rev == 4)) {
3103 		sc->is_emu10k2 = 0;
3104 		sc->is_ca0102 = 1;	/* for unknown Audigy 2 cards */
3105 	}
3106 	if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1))
3107 		if (device_flags & IS_CARDBUS)
3108 			sc->is_cardbus = 1;
3109 
3110 	if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) {
3111 		device_printf(sc->dev, "Unable to detect HW chipset\n");
3112 		goto bad;
3113 	}
3114 	if (device_flags & BROKEN_DIGITAL)
3115 		sc->broken_digital = 1;
3116 	if (device_flags & HAS_AC97)
3117 		sc->has_ac97 = 1;
3118 
3119 	sc->opcode_shift = 0;
3120 	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
3121 		sc->opcode_shift = 24;
3122 		sc->high_operand_shift = 12;
3123 
3124 	/*	DSP map				*/
3125 	/*	sc->fx_base = 0x0		*/
3126 		sc->input_base = 0x40;
3127 	/*	sc->p16vinput_base = 0x50;	*/
3128 		sc->output_base = 0x60;
3129 		sc->efxc_base = 0x80;
3130 	/*	sc->output32h_base = 0xa0;	*/
3131 	/*	sc->output32l_base = 0xb0;	*/
3132 		sc->dsp_zero = 0xc0;
3133 	/*	0xe0...0x100 are unknown	*/
3134 	/*	sc->tram_base = 0x200		*/
3135 	/*	sc->tram_addr_base = 0x300	*/
3136 		sc->gpr_base = A_FXGPREGBASE;
3137 		sc->num_gprs = 0x200;
3138 		sc->code_base = A_MICROCODEBASE;
3139 		sc->code_size = 0x800 / 2;	/* 0x600-0xdff,  2048 words,
3140 						 * 1024 instructions */
3141 
3142 		sc->mchannel_fx = 8;
3143 		sc->num_fxbuses = 16;
3144 		sc->num_inputs = 8;
3145 		sc->num_outputs = 16;
3146 		sc->address_mask = A_PTR_ADDRESS_MASK;
3147 	}
3148 	if (sc->is_emu10k1) {
3149 		sc->has_51 = 0;	/* We don't support 5.1 sound on SB Live! 5.1 */
3150 		sc->opcode_shift = 20;
3151 		sc->high_operand_shift = 10;
3152 		sc->code_base = MICROCODEBASE;
3153 		sc->code_size = 0x400 / 2;	/* 0x400-0x7ff,  1024 words,
3154 						 * 512 instructions */
3155 		sc->gpr_base = FXGPREGBASE;
3156 		sc->num_gprs = 0x100;
3157 		sc->input_base = 0x10;
3158 		sc->output_base = 0x20;
3159 		/*
3160 		 * XXX 5.1 Analog outputs are inside efxc address space!
3161 		 * They use ouput+0x11/+0x12 (=efxc+1/+2).
3162 		 * Don't use this efx registers for recording on SB Live! 5.1!
3163 		 */
3164 		sc->efxc_base = 0x30;
3165 		sc->dsp_zero = 0x40;
3166 		sc->mchannel_fx = 0;
3167 		sc->num_fxbuses = 8;
3168 		sc->num_inputs = 8;
3169 		sc->num_outputs = 16;
3170 		sc->address_mask = PTR_ADDRESS_MASK;
3171 	}
3172 	if (sc->opcode_shift == 0)
3173 		goto bad;
3174 
3175 	data = pci_read_config(dev, PCIR_COMMAND, 2);
3176 	data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
3177 	pci_write_config(dev, PCIR_COMMAND, data, 2);
3178 	data = pci_read_config(dev, PCIR_COMMAND, 2);
3179 
3180 	pci_enable_busmaster(dev);
3181 
3182 	i = PCIR_BAR(0);
3183 	sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
3184 	if (sc->reg == NULL) {
3185 		device_printf(dev, "unable to map register space\n");
3186 		goto bad;
3187 	}
3188 	sc->st = rman_get_bustag(sc->reg);
3189 	sc->sh = rman_get_bushandle(sc->reg);
3190 
3191 	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
3192 		sc->timer[i] = 0;	/* disable it */
3193 
3194 	i = 0;
3195 	sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE);
3196 	if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, NULL, emu_intr, sc, &sc->ih)) {
3197 		device_printf(dev, "unable to map interrupt\n");
3198 		goto bad;
3199 	}
3200 	if (emu_rm_init(sc) != 0) {
3201 		device_printf(dev, "unable to create resource manager\n");
3202 		goto bad;
3203 	}
3204 	if (sc->is_cardbus)
3205 		if (emu_cardbus_init(sc) != 0) {
3206 			device_printf(dev, "unable to initialize CardBus interface\n");
3207 			goto bad;
3208 		}
3209 	if (emu_init(sc) != 0) {
3210 		device_printf(dev, "unable to initialize the card\n");
3211 		goto bad;
3212 	}
3213 	if (emu10kx_dev_init(sc) != 0) {
3214 		device_printf(dev, "unable to create control device\n");
3215 		goto bad;
3216 	}
3217 	snprintf(status, 255, "rev %d at io 0x%lx irq %ld", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq));
3218 
3219 	/* Voices */
3220 	for (i = 0; i < NUM_G; i++) {
3221 		sc->voice[i].vnum = i;
3222 		sc->voice[i].slave = NULL;
3223 		sc->voice[i].busy = 0;
3224 		sc->voice[i].ismaster = 0;
3225 		sc->voice[i].running = 0;
3226 		sc->voice[i].b16 = 0;
3227 		sc->voice[i].stereo = 0;
3228 		sc->voice[i].speed = 0;
3229 		sc->voice[i].start = 0;
3230 		sc->voice[i].end = 0;
3231 	}
3232 
3233 	/* PCM Audio */
3234 	for (i = 0; i < RT_COUNT; i++)
3235 		sc->pcm[i] = NULL;
3236 
3237 	/* FRONT */
3238 	func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3239 	if (func == NULL) {
3240 		error = ENOMEM;
3241 		goto bad;
3242 	}
3243 	pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3244 	if (pcminfo == NULL) {
3245 		error = ENOMEM;
3246 		goto bad;
3247 	}
3248 	pcminfo->card = sc;
3249 	pcminfo->route = RT_FRONT;
3250 
3251 	func->func = SCF_PCM;
3252 	func->varinfo = pcminfo;
3253 	sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1);
3254 	device_set_ivars(sc->pcm[RT_FRONT], func);
3255 
3256 	if (!(sc->mch_disabled)) {
3257 		/* REAR */
3258 		func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3259 		if (func == NULL) {
3260 			error = ENOMEM;
3261 			goto bad;
3262 		}
3263 		pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3264 		if (pcminfo == NULL) {
3265 			error = ENOMEM;
3266 			goto bad;
3267 		}
3268 		pcminfo->card = sc;
3269 		pcminfo->route = RT_REAR;
3270 
3271 		func->func = SCF_PCM;
3272 		func->varinfo = pcminfo;
3273 		sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1);
3274 		device_set_ivars(sc->pcm[RT_REAR], func);
3275 		if (sc->has_51) {
3276 			/* CENTER */
3277 			func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3278 			if (func == NULL) {
3279 				error = ENOMEM;
3280 				goto bad;
3281 			}
3282 			pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3283 			if (pcminfo == NULL) {
3284 				error = ENOMEM;
3285 				goto bad;
3286 			}
3287 			pcminfo->card = sc;
3288 			pcminfo->route = RT_CENTER;
3289 
3290 			func->func = SCF_PCM;
3291 			func->varinfo = pcminfo;
3292 			sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1);
3293 			device_set_ivars(sc->pcm[RT_CENTER], func);
3294 			/* SUB */
3295 			func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3296 			if (func == NULL) {
3297 				error = ENOMEM;
3298 				goto bad;
3299 			}
3300 			pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3301 			if (pcminfo == NULL) {
3302 				error = ENOMEM;
3303 				goto bad;
3304 			}
3305 			pcminfo->card = sc;
3306 			pcminfo->route = RT_SUB;
3307 
3308 			func->func = SCF_PCM;
3309 			func->varinfo = pcminfo;
3310 			sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1);
3311 			device_set_ivars(sc->pcm[RT_SUB], func);
3312 		}
3313 		if (sc->has_71) {
3314 			/* SIDE */
3315 			func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3316 			if (func == NULL) {
3317 				error = ENOMEM;
3318 				goto bad;
3319 			}
3320 			pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3321 			if (pcminfo == NULL) {
3322 				error = ENOMEM;
3323 				goto bad;
3324 			}
3325 			pcminfo->card = sc;
3326 			pcminfo->route = RT_SIDE;
3327 
3328 			func->func = SCF_PCM;
3329 			func->varinfo = pcminfo;
3330 			sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1);
3331 			device_set_ivars(sc->pcm[RT_SIDE], func);
3332 		}
3333 	} /* mch_disabled */
3334 
3335 	if (sc->mch_rec) {
3336 		func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3337 		if (func == NULL) {
3338 			error = ENOMEM;
3339 			goto bad;
3340 		}
3341 		pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3342 		if (pcminfo == NULL) {
3343 			error = ENOMEM;
3344 			goto bad;
3345 		}
3346 		pcminfo->card = sc;
3347 		pcminfo->route = RT_MCHRECORD;
3348 
3349 		func->func = SCF_PCM;
3350 		func->varinfo = pcminfo;
3351 		sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1);
3352 		device_set_ivars(sc->pcm[RT_MCHRECORD], func);
3353 	} /*mch_rec */
3354 
3355 	for (i = 0; i < 2; i++)
3356 		sc->midi[i] = NULL;
3357 
3358 	/* MIDI has some memory mangament and (possible) locking problems */
3359 #if 0
3360 	/* Midi Interface 1: Live!, Audigy, Audigy 2 */
3361 	if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) {
3362 		func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3363 		if (func == NULL) {
3364 			error = ENOMEM;
3365 			goto bad;
3366 		}
3367 		midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3368 		if (midiinfo == NULL) {
3369 			error = ENOMEM;
3370 			goto bad;
3371 		}
3372 		midiinfo->card = sc;
3373 		if (sc->is_emu10k2 || (sc->is_ca0102)) {
3374 			midiinfo->port = A_MUDATA1;
3375 			midiinfo->portnr = 1;
3376 		}
3377 		if (sc->is_emu10k1) {
3378 			midiinfo->port = MUDATA;
3379 			midiinfo->portnr = 1;
3380 		}
3381 		func->func = SCF_MIDI;
3382 		func->varinfo = midiinfo;
3383 		sc->midi[0] = device_add_child(dev, "midi", -1);
3384 		device_set_ivars(sc->midi[0], func);
3385 	}
3386 	/* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */
3387 	if (sc->is_emu10k2 || (sc->is_ca0102)) {
3388 		func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3389 		if (func == NULL) {
3390 			error = ENOMEM;
3391 			goto bad;
3392 		}
3393 		midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3394 		if (midiinfo == NULL) {
3395 			error = ENOMEM;
3396 			goto bad;
3397 		}
3398 		midiinfo->card = sc;
3399 
3400 		midiinfo->port = A_MUDATA2;
3401 		midiinfo->portnr = 2;
3402 
3403 		func->func = SCF_MIDI;
3404 		func->varinfo = midiinfo;
3405 		sc->midi[1] = device_add_child(dev, "midi", -1);
3406 		device_set_ivars(sc->midi[1], func);
3407 	}
3408 #endif
3409 	return (bus_generic_attach(dev));
3410 
3411 bad:
3412 	/* XXX can we just call emu_pci_detach here? */
3413 	if (sc->cdev)
3414 		emu10kx_dev_uninit(sc);
3415 	if (sc->rm != NULL)
3416 		emu_rm_uninit(sc);
3417 	if (sc->reg)
3418 		bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3419 	if (sc->ih)
3420 		bus_teardown_intr(dev, sc->irq, sc->ih);
3421 	if (sc->irq)
3422 		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3423 	mtx_destroy(&sc->rw);
3424 	mtx_destroy(&sc->lock);
3425 	return (error);
3426 }
3427 
3428 static int
3429 emu_pci_detach(device_t dev)
3430 {
3431 	struct emu_sc_info *sc;
3432 	struct sndcard_func *func;
3433 	int devcount, i;
3434 	device_t *childlist;
3435 	int r = 0;
3436 
3437 	sc = device_get_softc(dev);
3438 
3439 	for (i = 0; i < RT_COUNT; i++) {
3440 		if (sc->pcm[i] != NULL) {
3441 			func = device_get_ivars(sc->pcm[i]);
3442 			if (func != NULL && func->func == SCF_PCM) {
3443 				device_set_ivars(sc->pcm[i], NULL);
3444 				free(func->varinfo, M_DEVBUF);
3445 				free(func, M_DEVBUF);
3446 			}
3447 			r = device_delete_child(dev, sc->pcm[i]);
3448 			if (r)	return (r);
3449 		}
3450 	}
3451 
3452 	if (sc->midi[0] != NULL) {
3453 		func = device_get_ivars(sc->midi[0]);
3454 		if (func != NULL && func->func == SCF_MIDI) {
3455 			device_set_ivars(sc->midi[0], NULL);
3456 			free(func->varinfo, M_DEVBUF);
3457 			free(func, M_DEVBUF);
3458 		}
3459 		r = device_delete_child(dev, sc->midi[0]);
3460 		if (r)	return (r);
3461 	}
3462 
3463 	if (sc->midi[1] != NULL) {
3464 		func = device_get_ivars(sc->midi[1]);
3465 		if (func != NULL && func->func == SCF_MIDI) {
3466 			device_set_ivars(sc->midi[1], NULL);
3467 			free(func->varinfo, M_DEVBUF);
3468 			free(func, M_DEVBUF);
3469 		}
3470 		r = device_delete_child(dev, sc->midi[1]);
3471 		if (r)	return (r);
3472 	}
3473 
3474 	if (device_get_children(dev, &childlist, &devcount) == 0)
3475 		for (i = 0; i < devcount - 1; i++) {
3476 			device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i]));
3477 			func = device_get_ivars(childlist[i]);
3478 			if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) {
3479 				device_set_ivars(childlist[i], NULL);
3480 				free(func->varinfo, M_DEVBUF);
3481 				free(func, M_DEVBUF);
3482 			}
3483 			device_delete_child(dev, childlist[i]);
3484 		}
3485 	if (childlist != NULL)
3486 		free(childlist, M_TEMP);
3487 
3488 	r = emu10kx_dev_uninit(sc);
3489 	if (r)
3490 		return (r);
3491 
3492 	/* shutdown chip */
3493 	emu_uninit(sc);
3494 	emu_rm_uninit(sc);
3495 
3496 	if (sc->mem.dmat)
3497 		bus_dma_tag_destroy(sc->mem.dmat);
3498 
3499 	if (sc->reg)
3500 		bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3501 	bus_teardown_intr(dev, sc->irq, sc->ih);
3502 	bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3503 	mtx_destroy(&sc->rw);
3504 	mtx_destroy(&sc->lock);
3505 
3506 	return (bus_generic_detach(dev));
3507 }
3508 /* add suspend, resume */
3509 static device_method_t emu_methods[] = {
3510 	/* Device interface */
3511 	DEVMETHOD(device_probe, emu_pci_probe),
3512 	DEVMETHOD(device_attach, emu_pci_attach),
3513 	DEVMETHOD(device_detach, emu_pci_detach),
3514 	/* Bus methods */
3515 	DEVMETHOD(bus_read_ivar, emu_read_ivar),
3516 	DEVMETHOD(bus_write_ivar, emu_write_ivar),
3517 
3518 	{0, 0}
3519 };
3520 
3521 
3522 static driver_t emu_driver = {
3523 	"emu10kx",
3524 	emu_methods,
3525 	sizeof(struct emu_sc_info),
3526 	NULL,
3527 	0,
3528 	NULL
3529 };
3530 
3531 static int
3532 emu_modevent(module_t mod __unused, int cmd, void *data __unused)
3533 {
3534 	int err = 0;
3535 
3536 	switch (cmd) {
3537 	case MOD_LOAD:
3538 		break;		/* Success */
3539 
3540 	case MOD_UNLOAD:
3541 	case MOD_SHUTDOWN:
3542 
3543 		/* XXX  Should we check state of pcm & midi subdevices here? */
3544 
3545 		break;		/* Success */
3546 
3547 	default:
3548 		err = EINVAL;
3549 		break;
3550 	}
3551 
3552 	return (err);
3553 
3554 }
3555 
3556 static devclass_t emu_devclass;
3557 
3558 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL);
3559 DRIVER_MODULE(snd_emu10kx, cardbus, emu_driver, emu_devclass, emu_modevent, NULL);
3560 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER);
3561