1 /*- 2 * Copyright (c) 2009-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include "efx.h" 35 #include "efx_impl.h" 36 37 #if EFSYS_OPT_SIENA 38 39 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM 40 41 __checkReturn efx_rc_t 42 siena_nvram_partn_size( 43 __in efx_nic_t *enp, 44 __in uint32_t partn, 45 __out size_t *sizep) 46 { 47 efx_rc_t rc; 48 49 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 50 rc = ENOTSUP; 51 goto fail1; 52 } 53 54 if ((rc = efx_mcdi_nvram_info(enp, partn, sizep, 55 NULL, NULL, NULL)) != 0) { 56 goto fail2; 57 } 58 59 return (0); 60 61 fail2: 62 EFSYS_PROBE(fail2); 63 fail1: 64 EFSYS_PROBE1(fail1, efx_rc_t, rc); 65 66 return (rc); 67 } 68 69 __checkReturn efx_rc_t 70 siena_nvram_partn_lock( 71 __in efx_nic_t *enp, 72 __in uint32_t partn) 73 { 74 efx_rc_t rc; 75 76 if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) { 77 goto fail1; 78 } 79 80 return (0); 81 82 fail1: 83 EFSYS_PROBE1(fail1, efx_rc_t, rc); 84 85 return (rc); 86 } 87 88 __checkReturn efx_rc_t 89 siena_nvram_partn_read( 90 __in efx_nic_t *enp, 91 __in uint32_t partn, 92 __in unsigned int offset, 93 __out_bcount(size) caddr_t data, 94 __in size_t size) 95 { 96 size_t chunk; 97 efx_rc_t rc; 98 99 while (size > 0) { 100 chunk = MIN(size, SIENA_NVRAM_CHUNK); 101 102 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, 103 data, chunk)) != 0) { 104 goto fail1; 105 } 106 107 size -= chunk; 108 data += chunk; 109 offset += chunk; 110 } 111 112 return (0); 113 114 fail1: 115 EFSYS_PROBE1(fail1, efx_rc_t, rc); 116 117 return (rc); 118 } 119 120 __checkReturn efx_rc_t 121 siena_nvram_partn_erase( 122 __in efx_nic_t *enp, 123 __in uint32_t partn, 124 __in unsigned int offset, 125 __in size_t size) 126 { 127 efx_rc_t rc; 128 129 if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) { 130 goto fail1; 131 } 132 133 return (0); 134 135 fail1: 136 EFSYS_PROBE1(fail1, efx_rc_t, rc); 137 138 return (rc); 139 } 140 141 __checkReturn efx_rc_t 142 siena_nvram_partn_write( 143 __in efx_nic_t *enp, 144 __in uint32_t partn, 145 __in unsigned int offset, 146 __out_bcount(size) caddr_t data, 147 __in size_t size) 148 { 149 size_t chunk; 150 efx_rc_t rc; 151 152 while (size > 0) { 153 chunk = MIN(size, SIENA_NVRAM_CHUNK); 154 155 if ((rc = efx_mcdi_nvram_write(enp, partn, offset, 156 data, chunk)) != 0) { 157 goto fail1; 158 } 159 160 size -= chunk; 161 data += chunk; 162 offset += chunk; 163 } 164 165 return (0); 166 167 fail1: 168 EFSYS_PROBE1(fail1, efx_rc_t, rc); 169 170 return (rc); 171 } 172 173 void 174 siena_nvram_partn_unlock( 175 __in efx_nic_t *enp, 176 __in uint32_t partn) 177 { 178 boolean_t reboot; 179 efx_rc_t rc; 180 181 /* 182 * Reboot into the new image only for PHYs. The driver has to 183 * explicitly cope with an MC reboot after a firmware update. 184 */ 185 reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 || 186 partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 || 187 partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO); 188 189 if ((rc = efx_mcdi_nvram_update_finish(enp, partn, reboot)) != 0) { 190 goto fail1; 191 } 192 193 return; 194 195 fail1: 196 EFSYS_PROBE1(fail1, efx_rc_t, rc); 197 } 198 199 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 200 201 #if EFSYS_OPT_NVRAM 202 203 typedef struct siena_parttbl_entry_s { 204 unsigned int partn; 205 unsigned int port; 206 efx_nvram_type_t nvtype; 207 } siena_parttbl_entry_t; 208 209 static siena_parttbl_entry_t siena_parttbl[] = { 210 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 1, EFX_NVRAM_NULLPHY}, 211 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 2, EFX_NVRAM_NULLPHY}, 212 {MC_CMD_NVRAM_TYPE_MC_FW, 1, EFX_NVRAM_MC_FIRMWARE}, 213 {MC_CMD_NVRAM_TYPE_MC_FW, 2, EFX_NVRAM_MC_FIRMWARE}, 214 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 1, EFX_NVRAM_MC_GOLDEN}, 215 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 2, EFX_NVRAM_MC_GOLDEN}, 216 {MC_CMD_NVRAM_TYPE_EXP_ROM, 1, EFX_NVRAM_BOOTROM}, 217 {MC_CMD_NVRAM_TYPE_EXP_ROM, 2, EFX_NVRAM_BOOTROM}, 218 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG}, 219 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG}, 220 {MC_CMD_NVRAM_TYPE_PHY_PORT0, 1, EFX_NVRAM_PHY}, 221 {MC_CMD_NVRAM_TYPE_PHY_PORT1, 2, EFX_NVRAM_PHY}, 222 {MC_CMD_NVRAM_TYPE_FPGA, 1, EFX_NVRAM_FPGA}, 223 {MC_CMD_NVRAM_TYPE_FPGA, 2, EFX_NVRAM_FPGA}, 224 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP}, 225 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP}, 226 {MC_CMD_NVRAM_TYPE_FC_FW, 1, EFX_NVRAM_FCFW}, 227 {MC_CMD_NVRAM_TYPE_FC_FW, 2, EFX_NVRAM_FCFW}, 228 {MC_CMD_NVRAM_TYPE_CPLD, 1, EFX_NVRAM_CPLD}, 229 {MC_CMD_NVRAM_TYPE_CPLD, 2, EFX_NVRAM_CPLD}, 230 {MC_CMD_NVRAM_TYPE_LICENSE, 1, EFX_NVRAM_LICENSE}, 231 {MC_CMD_NVRAM_TYPE_LICENSE, 2, EFX_NVRAM_LICENSE} 232 }; 233 234 __checkReturn efx_rc_t 235 siena_nvram_type_to_partn( 236 __in efx_nic_t *enp, 237 __in efx_nvram_type_t type, 238 __out uint32_t *partnp) 239 { 240 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 241 unsigned int i; 242 243 EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES); 244 EFSYS_ASSERT(partnp != NULL); 245 246 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 247 siena_parttbl_entry_t *entry = &siena_parttbl[i]; 248 249 if (entry->port == emip->emi_port && entry->nvtype == type) { 250 *partnp = entry->partn; 251 return (0); 252 } 253 } 254 255 return (ENOTSUP); 256 } 257 258 259 #if EFSYS_OPT_DIAG 260 261 __checkReturn efx_rc_t 262 siena_nvram_test( 263 __in efx_nic_t *enp) 264 { 265 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 266 siena_parttbl_entry_t *entry; 267 unsigned int i; 268 efx_rc_t rc; 269 270 /* 271 * Iterate over the list of supported partition types 272 * applicable to *this* port 273 */ 274 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 275 entry = &siena_parttbl[i]; 276 277 if (entry->port != emip->emi_port || 278 !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn))) 279 continue; 280 281 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) { 282 goto fail1; 283 } 284 } 285 286 return (0); 287 288 fail1: 289 EFSYS_PROBE1(fail1, efx_rc_t, rc); 290 291 return (rc); 292 } 293 294 #endif /* EFSYS_OPT_DIAG */ 295 296 297 #define SIENA_DYNAMIC_CFG_SIZE(_nitems) \ 298 (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) * \ 299 sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0]))) 300 301 __checkReturn efx_rc_t 302 siena_nvram_get_dynamic_cfg( 303 __in efx_nic_t *enp, 304 __in uint32_t partn, 305 __in boolean_t vpd, 306 __out siena_mc_dynamic_config_hdr_t **dcfgp, 307 __out size_t *sizep) 308 { 309 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 310 size_t size; 311 uint8_t cksum; 312 unsigned int vpd_offset; 313 unsigned int vpd_length; 314 unsigned int hdr_length; 315 unsigned int nversions; 316 unsigned int pos; 317 unsigned int region; 318 efx_rc_t rc; 319 320 EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 || 321 partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1); 322 323 /* 324 * Allocate sufficient memory for the entire dynamiccfg area, even 325 * if we're not actually going to read in the VPD. 326 */ 327 if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0) 328 goto fail1; 329 330 EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg); 331 if (dcfg == NULL) { 332 rc = ENOMEM; 333 goto fail2; 334 } 335 336 if ((rc = siena_nvram_partn_read(enp, partn, 0, 337 (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0) 338 goto fail3; 339 340 /* Verify the magic */ 341 if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0) 342 != SIENA_MC_DYNAMIC_CONFIG_MAGIC) 343 goto invalid1; 344 345 /* All future versions of the structure must be backwards compatable */ 346 EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0); 347 348 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 349 nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 350 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 351 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 352 353 /* Verify the hdr doesn't overflow the partn size */ 354 if (hdr_length > size || vpd_offset > size || vpd_length > size || 355 vpd_length + vpd_offset > size) 356 goto invalid2; 357 358 /* Verify the header has room for all it's versions */ 359 if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) || 360 hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions)) 361 goto invalid3; 362 363 /* 364 * Read the remaining portion of the dcfg, either including 365 * the whole of VPD (there is no vpd length in this structure, 366 * so we have to parse each tag), or just the dcfg header itself 367 */ 368 region = vpd ? vpd_offset + vpd_length : hdr_length; 369 if (region > SIENA_NVRAM_CHUNK) { 370 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK, 371 (caddr_t)dcfg + SIENA_NVRAM_CHUNK, 372 region - SIENA_NVRAM_CHUNK)) != 0) 373 goto fail4; 374 } 375 376 /* Verify checksum */ 377 cksum = 0; 378 for (pos = 0; pos < hdr_length; pos++) 379 cksum += ((uint8_t *)dcfg)[pos]; 380 if (cksum != 0) 381 goto invalid4; 382 383 goto done; 384 385 invalid4: 386 EFSYS_PROBE(invalid4); 387 invalid3: 388 EFSYS_PROBE(invalid3); 389 invalid2: 390 EFSYS_PROBE(invalid2); 391 invalid1: 392 EFSYS_PROBE(invalid1); 393 394 /* 395 * Construct a new "null" dcfg, with an empty version vector, 396 * and an empty VPD chunk trailing. This has the neat side effect 397 * of testing the exception paths in the write path. 398 */ 399 EFX_POPULATE_DWORD_1(dcfg->magic, 400 EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC); 401 EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg)); 402 EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0, 403 SIENA_MC_DYNAMIC_CONFIG_VERSION); 404 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 405 EFX_DWORD_0, sizeof (*dcfg)); 406 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0); 407 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0); 408 409 done: 410 *dcfgp = dcfg; 411 *sizep = size; 412 413 return (0); 414 415 fail4: 416 EFSYS_PROBE(fail4); 417 fail3: 418 EFSYS_PROBE(fail3); 419 420 EFSYS_KMEM_FREE(enp->en_esip, size, dcfg); 421 422 fail2: 423 EFSYS_PROBE(fail2); 424 fail1: 425 EFSYS_PROBE1(fail1, efx_rc_t, rc); 426 427 return (rc); 428 } 429 430 __checkReturn efx_rc_t 431 siena_nvram_get_subtype( 432 __in efx_nic_t *enp, 433 __in uint32_t partn, 434 __out uint32_t *subtypep) 435 { 436 efx_mcdi_req_t req; 437 uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN, 438 MC_CMD_GET_BOARD_CFG_OUT_LENMAX)]; 439 efx_word_t *fw_list; 440 efx_rc_t rc; 441 442 (void) memset(payload, 0, sizeof (payload)); 443 req.emr_cmd = MC_CMD_GET_BOARD_CFG; 444 req.emr_in_buf = payload; 445 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN; 446 req.emr_out_buf = payload; 447 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX; 448 449 efx_mcdi_execute(enp, &req); 450 451 if (req.emr_rc != 0) { 452 rc = req.emr_rc; 453 goto fail1; 454 } 455 456 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 457 rc = EMSGSIZE; 458 goto fail2; 459 } 460 461 if (req.emr_out_length_used < 462 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST + 463 (partn + 1) * sizeof (efx_word_t)) { 464 rc = ENOENT; 465 goto fail3; 466 } 467 468 fw_list = MCDI_OUT2(req, efx_word_t, 469 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); 470 *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0); 471 472 return (0); 473 474 fail3: 475 EFSYS_PROBE(fail3); 476 fail2: 477 EFSYS_PROBE(fail2); 478 fail1: 479 EFSYS_PROBE1(fail1, efx_rc_t, rc); 480 481 return (rc); 482 } 483 484 __checkReturn efx_rc_t 485 siena_nvram_get_version( 486 __in efx_nic_t *enp, 487 __in efx_nvram_type_t type, 488 __out uint32_t *subtypep, 489 __out_ecount(4) uint16_t version[4]) 490 { 491 siena_mc_dynamic_config_hdr_t *dcfg; 492 siena_parttbl_entry_t *entry; 493 uint32_t dcfg_partn; 494 uint32_t partn; 495 unsigned int i; 496 efx_rc_t rc; 497 498 if ((rc = siena_nvram_type_to_partn(enp, type, &partn)) != 0) 499 goto fail1; 500 501 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 502 rc = ENOTSUP; 503 goto fail2; 504 } 505 506 if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0) 507 goto fail3; 508 509 /* 510 * Some partitions are accessible from both ports (for instance BOOTROM) 511 * Find the highest version reported by all dcfg structures on ports 512 * that have access to this partition. 513 */ 514 version[0] = version[1] = version[2] = version[3] = 0; 515 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 516 unsigned int nitems; 517 uint16_t temp[4]; 518 size_t length; 519 520 entry = &siena_parttbl[i]; 521 if (entry->partn != partn) 522 continue; 523 524 dcfg_partn = (entry->port == 1) 525 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 526 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 527 /* 528 * Ingore missing partitions on port 2, assuming they're due 529 * to to running on a single port part. 530 */ 531 if ((1 << dcfg_partn) & ~enp->en_u.siena.enu_partn_mask) { 532 if (entry->port == 2) 533 continue; 534 } 535 536 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 537 B_FALSE, &dcfg, &length)) != 0) 538 goto fail4; 539 540 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, 541 EFX_DWORD_0); 542 if (nitems < entry->partn) 543 goto done; 544 545 temp[0] = EFX_WORD_FIELD(dcfg->fw_version[partn].version_w, 546 EFX_WORD_0); 547 temp[1] = EFX_WORD_FIELD(dcfg->fw_version[partn].version_x, 548 EFX_WORD_0); 549 temp[2] = EFX_WORD_FIELD(dcfg->fw_version[partn].version_y, 550 EFX_WORD_0); 551 temp[3] = EFX_WORD_FIELD(dcfg->fw_version[partn].version_z, 552 EFX_WORD_0); 553 if (memcmp(version, temp, sizeof (temp)) < 0) 554 memcpy(version, temp, sizeof (temp)); 555 556 done: 557 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 558 } 559 560 return (0); 561 562 fail4: 563 EFSYS_PROBE(fail4); 564 fail3: 565 EFSYS_PROBE(fail3); 566 fail2: 567 EFSYS_PROBE(fail2); 568 fail1: 569 EFSYS_PROBE1(fail1, efx_rc_t, rc); 570 571 return (rc); 572 } 573 574 __checkReturn efx_rc_t 575 siena_nvram_partn_rw_start( 576 __in efx_nic_t *enp, 577 __in uint32_t partn, 578 __out size_t *chunk_sizep) 579 { 580 efx_rc_t rc; 581 582 if ((rc = siena_nvram_partn_lock(enp, partn)) != 0) 583 goto fail1; 584 585 if (chunk_sizep != NULL) 586 *chunk_sizep = SIENA_NVRAM_CHUNK; 587 588 return (0); 589 590 fail1: 591 EFSYS_PROBE1(fail1, efx_rc_t, rc); 592 593 return (rc); 594 } 595 596 __checkReturn efx_rc_t 597 siena_nvram_erase( 598 __in efx_nic_t *enp, 599 __in efx_nvram_type_t type) 600 { 601 size_t size; 602 uint32_t partn; 603 efx_rc_t rc; 604 605 if ((rc = siena_nvram_type_to_partn(enp, type, &partn)) != 0) 606 goto fail1; 607 608 if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0) 609 goto fail2; 610 611 if ((rc = siena_nvram_partn_erase(enp, partn, 0, size)) != 0) 612 goto fail3; 613 614 return (0); 615 616 fail3: 617 EFSYS_PROBE(fail3); 618 fail2: 619 EFSYS_PROBE(fail2); 620 fail1: 621 EFSYS_PROBE1(fail1, efx_rc_t, rc); 622 623 return (rc); 624 } 625 626 __checkReturn efx_rc_t 627 siena_nvram_write_chunk( 628 __in efx_nic_t *enp, 629 __in efx_nvram_type_t type, 630 __in unsigned int offset, 631 __in_bcount(size) caddr_t data, 632 __in size_t size) 633 { 634 uint32_t partn; 635 efx_rc_t rc; 636 637 if ((rc = siena_nvram_type_to_partn(enp, type, &partn)) != 0) 638 goto fail1; 639 640 if ((rc = siena_nvram_partn_write(enp, partn, offset, data, size)) != 0) 641 goto fail2; 642 643 return (0); 644 645 fail2: 646 EFSYS_PROBE(fail2); 647 fail1: 648 EFSYS_PROBE1(fail1, efx_rc_t, rc); 649 650 return (rc); 651 } 652 653 void 654 siena_nvram_rw_finish( 655 __in efx_nic_t *enp, 656 __in efx_nvram_type_t type) 657 { 658 uint32_t partn; 659 efx_rc_t rc; 660 661 if ((rc = siena_nvram_type_to_partn(enp, type, &partn)) == 0) 662 siena_nvram_partn_unlock(enp, partn); 663 } 664 665 __checkReturn efx_rc_t 666 siena_nvram_set_version( 667 __in efx_nic_t *enp, 668 __in efx_nvram_type_t type, 669 __in_ecount(4) uint16_t version[4]) 670 { 671 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 672 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 673 siena_mc_fw_version_t *fwverp; 674 uint32_t dcfg_partn, partn; 675 size_t dcfg_size; 676 unsigned int hdr_length; 677 unsigned int vpd_length; 678 unsigned int vpd_offset; 679 unsigned int nitems; 680 unsigned int required_hdr_length; 681 unsigned int pos; 682 uint8_t cksum; 683 uint32_t subtype; 684 size_t length; 685 efx_rc_t rc; 686 687 if ((rc = siena_nvram_type_to_partn(enp, type, &partn)) != 0) 688 goto fail1; 689 690 dcfg_partn = (emip->emi_port == 1) 691 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 692 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 693 694 if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0) 695 goto fail2; 696 697 if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0) 698 goto fail2; 699 700 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 701 B_TRUE, &dcfg, &length)) != 0) 702 goto fail3; 703 704 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 705 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 706 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 707 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 708 709 /* 710 * NOTE: This function will blatt any fields trailing the version 711 * vector, or the VPD chunk. 712 */ 713 required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1); 714 if (required_hdr_length + vpd_length > length) { 715 rc = ENOSPC; 716 goto fail4; 717 } 718 719 if (vpd_offset < required_hdr_length) { 720 (void) memmove((caddr_t)dcfg + required_hdr_length, 721 (caddr_t)dcfg + vpd_offset, vpd_length); 722 vpd_offset = required_hdr_length; 723 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 724 EFX_DWORD_0, vpd_offset); 725 } 726 727 if (hdr_length < required_hdr_length) { 728 (void) memset((caddr_t)dcfg + hdr_length, 0, 729 required_hdr_length - hdr_length); 730 hdr_length = required_hdr_length; 731 EFX_POPULATE_WORD_1(dcfg->length, 732 EFX_WORD_0, hdr_length); 733 } 734 735 /* Get the subtype to insert into the fw_subtype array */ 736 if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0) 737 goto fail5; 738 739 /* Fill out the new version */ 740 fwverp = &dcfg->fw_version[partn]; 741 EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype); 742 EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]); 743 EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]); 744 EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]); 745 EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]); 746 747 /* Update the version count */ 748 if (nitems < partn + 1) { 749 nitems = partn + 1; 750 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, 751 EFX_DWORD_0, nitems); 752 } 753 754 /* Update the checksum */ 755 cksum = 0; 756 for (pos = 0; pos < hdr_length; pos++) 757 cksum += ((uint8_t *)dcfg)[pos]; 758 dcfg->csum.eb_u8[0] -= cksum; 759 760 /* Erase and write the new partition */ 761 if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0) 762 goto fail6; 763 764 /* Write out the new structure to nvram */ 765 if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0, 766 (caddr_t)dcfg, vpd_offset + vpd_length)) != 0) 767 goto fail7; 768 769 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 770 771 siena_nvram_partn_unlock(enp, dcfg_partn); 772 773 return (0); 774 775 fail7: 776 EFSYS_PROBE(fail7); 777 fail6: 778 EFSYS_PROBE(fail6); 779 fail5: 780 EFSYS_PROBE(fail5); 781 fail4: 782 EFSYS_PROBE(fail4); 783 784 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 785 fail3: 786 EFSYS_PROBE(fail3); 787 fail2: 788 EFSYS_PROBE(fail2); 789 fail1: 790 EFSYS_PROBE1(fail1, efx_rc_t, rc); 791 792 return (rc); 793 } 794 795 #endif /* EFSYS_OPT_NVRAM */ 796 797 #endif /* EFSYS_OPT_SIENA */ 798