xref: /freebsd/sys/dev/sfxge/common/siena_mcdi.c (revision dd41de95a84d979615a2ef11df6850622bf6184e)
1 /*-
2  * Copyright (c) 2012-2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  *    this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright notice,
11  *    this list of conditions and the following disclaimer in the documentation
12  *    and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  * The views and conclusions contained in the software and documentation are
27  * those of the authors and should not be interpreted as representing official
28  * policies, either expressed or implied, of the FreeBSD Project.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include "efx.h"
35 #include "efx_impl.h"
36 
37 #if EFSYS_OPT_SIENA && EFSYS_OPT_MCDI
38 
39 #define	SIENA_MCDI_PDU(_emip)			\
40 	(((emip)->emi_port == 1)		\
41 	? MC_SMEM_P0_PDU_OFST >> 2		\
42 	: MC_SMEM_P1_PDU_OFST >> 2)
43 
44 #define	SIENA_MCDI_DOORBELL(_emip)		\
45 	(((emip)->emi_port == 1)		\
46 	? MC_SMEM_P0_DOORBELL_OFST >> 2		\
47 	: MC_SMEM_P1_DOORBELL_OFST >> 2)
48 
49 #define	SIENA_MCDI_STATUS(_emip)		\
50 	(((emip)->emi_port == 1)		\
51 	? MC_SMEM_P0_STATUS_OFST >> 2		\
52 	: MC_SMEM_P1_STATUS_OFST >> 2)
53 
54 			void
55 siena_mcdi_send_request(
56 	__in			efx_nic_t *enp,
57 	__in_bcount(hdr_len)	void *hdrp,
58 	__in			size_t hdr_len,
59 	__in_bcount(sdu_len)	void *sdup,
60 	__in			size_t sdu_len)
61 {
62 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
63 	efx_dword_t dword;
64 	unsigned int pdur;
65 	unsigned int dbr;
66 	unsigned int pos;
67 
68 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
69 
70 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
71 	pdur = SIENA_MCDI_PDU(emip);
72 	dbr = SIENA_MCDI_DOORBELL(emip);
73 
74 	/* Write the header */
75 	EFSYS_ASSERT3U(hdr_len, ==, sizeof (efx_dword_t));
76 	dword = *(efx_dword_t *)hdrp;
77 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, pdur, &dword, B_TRUE);
78 
79 	/* Write the payload */
80 	for (pos = 0; pos < sdu_len; pos += sizeof (efx_dword_t)) {
81 		dword = *(efx_dword_t *)((uint8_t *)sdup + pos);
82 		EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM,
83 		    pdur + 1 + (pos >> 2), &dword, B_FALSE);
84 	}
85 
86 	/* Ring the doorbell */
87 	EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, 0xd004be11);
88 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, dbr, &dword, B_FALSE);
89 }
90 
91 			efx_rc_t
92 siena_mcdi_poll_reboot(
93 	__in		efx_nic_t *enp)
94 {
95 #ifndef EFX_GRACEFUL_MC_REBOOT
96  	/*
97 	 * This function is not being used properly.
98 	 * Until its callers are fixed, it should always return 0.
99 	 */
100 	_NOTE(ARGUNUSED(enp))
101 	return (0);
102 #else
103 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
104 	unsigned int rebootr;
105 	efx_dword_t dword;
106 	uint32_t value;
107 
108 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
109 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
110 	rebootr = SIENA_MCDI_STATUS(emip);
111 
112 	EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE);
113 	value = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
114 
115 	if (value == 0)
116 		return (0);
117 
118 	EFX_ZERO_DWORD(dword);
119 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE);
120 
121 	if (value == MC_STATUS_DWORD_ASSERT)
122 		return (EINTR);
123 	else
124 		return (EIO);
125 #endif
126 }
127 
128 extern	__checkReturn	boolean_t
129 siena_mcdi_poll_response(
130 	__in		efx_nic_t *enp)
131 {
132 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
133 	efx_dword_t hdr;
134 	unsigned int pdur;
135 
136 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
137 	pdur = SIENA_MCDI_PDU(emip);
138 
139 	EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, pdur, &hdr, B_FALSE);
140 	return (EFX_DWORD_FIELD(hdr, MCDI_HEADER_RESPONSE) ? B_TRUE : B_FALSE);
141 }
142 
143 			void
144 siena_mcdi_read_response(
145 	__in			efx_nic_t *enp,
146 	__out_bcount(length)	void *bufferp,
147 	__in			size_t offset,
148 	__in			size_t length)
149 {
150 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
151 	unsigned int pdur;
152 	unsigned int pos = 0;
153 	efx_dword_t data;
154 	size_t remaining = length;
155 
156 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
157 	pdur = SIENA_MCDI_PDU(emip);
158 
159 	while (remaining > 0) {
160 		size_t chunk = MIN(remaining, sizeof (data));
161 
162 		EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM,
163 		    pdur + ((offset + pos) >> 2), &data, B_FALSE);
164 		memcpy((uint8_t *)bufferp + pos, &data, chunk);
165 		pos += chunk;
166 		remaining -= chunk;
167 	}
168 }
169 
170 	__checkReturn	efx_rc_t
171 siena_mcdi_init(
172 	__in		efx_nic_t *enp,
173 	__in		const efx_mcdi_transport_t *mtp)
174 {
175 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
176 	efx_oword_t oword;
177 	unsigned int portnum;
178 	efx_rc_t rc;
179 
180 	_NOTE(ARGUNUSED(mtp))
181 
182 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
183 
184 	/* Determine the port number to use for MCDI */
185 	EFX_BAR_READO(enp, FR_AZ_CS_DEBUG_REG, &oword);
186 	portnum = EFX_OWORD_FIELD(oword, FRF_CZ_CS_PORT_NUM);
187 
188 	if (portnum == 0) {
189 		/* Presumably booted from ROM; only MCDI port 1 will work */
190 		emip->emi_port = 1;
191 	} else if (portnum <= 2) {
192 		emip->emi_port = portnum;
193 	} else {
194 		rc = EINVAL;
195 		goto fail1;
196 	}
197 
198 	/* Siena BootROM and firmware only support MCDIv1 */
199 	emip->emi_max_version = 1;
200 
201 	/*
202 	 * Wipe the atomic reboot status so subsequent MCDI requests succeed.
203 	 * BOOT_STATUS is preserved so eno_nic_probe() can boot out of the
204 	 * assertion handler.
205 	 */
206 	(void) siena_mcdi_poll_reboot(enp);
207 
208 	return (0);
209 
210 fail1:
211 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
212 
213 	return (rc);
214 }
215 
216 			void
217 siena_mcdi_fini(
218 	__in		efx_nic_t *enp)
219 {
220 	_NOTE(ARGUNUSED(enp))
221 }
222 
223 	__checkReturn	efx_rc_t
224 siena_mcdi_feature_supported(
225 	__in		efx_nic_t *enp,
226 	__in		efx_mcdi_feature_id_t id,
227 	__out		boolean_t *supportedp)
228 {
229 	efx_rc_t rc;
230 
231 	EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
232 
233 	switch (id) {
234 	case EFX_MCDI_FEATURE_FW_UPDATE:
235 	case EFX_MCDI_FEATURE_LINK_CONTROL:
236 	case EFX_MCDI_FEATURE_MACADDR_CHANGE:
237 	case EFX_MCDI_FEATURE_MAC_SPOOFING:
238 		*supportedp = B_TRUE;
239 		break;
240 	default:
241 		rc = ENOTSUP;
242 		goto fail1;
243 	}
244 
245 	return (0);
246 
247 fail1:
248 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
249 
250 	return (rc);
251 }
252 
253 /* Default timeout for MCDI command processing. */
254 #define	SIENA_MCDI_CMD_TIMEOUT_US	(10 * 1000 * 1000)
255 
256 			void
257 siena_mcdi_get_timeout(
258 	__in		efx_nic_t *enp,
259 	__in		efx_mcdi_req_t *emrp,
260 	__out		uint32_t *timeoutp)
261 {
262 	_NOTE(ARGUNUSED(enp, emrp))
263 
264 	*timeoutp = SIENA_MCDI_CMD_TIMEOUT_US;
265 }
266 
267 #endif	/* EFSYS_OPT_SIENA && EFSYS_OPT_MCDI */
268