xref: /freebsd/sys/dev/sfxge/common/medford_nic.c (revision a0b9e2e854027e6ff61fb075a1309dbc71c42b54)
1 /*-
2  * Copyright (c) 2015-2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  *    this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright notice,
11  *    this list of conditions and the following disclaimer in the documentation
12  *    and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  * The views and conclusions contained in the software and documentation are
27  * those of the authors and should not be interpreted as representing official
28  * policies, either expressed or implied, of the FreeBSD Project.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include "efx.h"
35 #include "efx_impl.h"
36 
37 #if EFSYS_OPT_MEDFORD
38 
39 static	__checkReturn	efx_rc_t
40 medford_nic_get_required_pcie_bandwidth(
41 	__in		efx_nic_t *enp,
42 	__out		uint32_t *bandwidth_mbpsp)
43 {
44 	uint32_t bandwidth;
45 	efx_rc_t rc;
46 
47 	if ((rc = ef10_nic_get_port_mode_bandwidth(enp,
48 						    &bandwidth)) != 0)
49 		goto fail1;
50 
51 	*bandwidth_mbpsp = bandwidth;
52 
53 	return (0);
54 
55 fail1:
56 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
57 
58 	return (rc);
59 }
60 
61 	__checkReturn	efx_rc_t
62 medford_board_cfg(
63 	__in		efx_nic_t *enp)
64 {
65 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
66 	uint32_t sysclk, dpcpu_clk;
67 	uint32_t end_padding;
68 	uint32_t bandwidth;
69 	efx_rc_t rc;
70 
71 	/*
72 	 * Enable firmware workarounds for hardware errata.
73 	 * Expected responses are:
74 	 *  - 0 (zero):
75 	 *	Success: workaround enabled or disabled as requested.
76 	 *  - MC_CMD_ERR_ENOSYS (reported as ENOTSUP):
77 	 *	Firmware does not support the MC_CMD_WORKAROUND request.
78 	 *	(assume that the workaround is not supported).
79 	 *  - MC_CMD_ERR_ENOENT (reported as ENOENT):
80 	 *	Firmware does not support the requested workaround.
81 	 *  - MC_CMD_ERR_EPERM  (reported as EACCES):
82 	 *	Unprivileged function cannot enable/disable workarounds.
83 	 *
84 	 * See efx_mcdi_request_errcode() for MCDI error translations.
85 	 */
86 
87 	if (EFX_PCI_FUNCTION_IS_VF(encp)) {
88 		/*
89 		 * Interrupt testing does not work for VFs. See bug50084 and
90 		 * bug71432 comment 21.
91 		 */
92 		encp->enc_bug41750_workaround = B_TRUE;
93 	}
94 
95 	/* Chained multicast is always enabled on Medford */
96 	encp->enc_bug26807_workaround = B_TRUE;
97 
98 	/*
99 	 * If the bug61265 workaround is enabled, then interrupt holdoff timers
100 	 * cannot be controlled by timer table writes, so MCDI must be used
101 	 * (timer table writes can still be used for wakeup timers).
102 	 */
103 	rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE,
104 	    NULL);
105 	if ((rc == 0) || (rc == EACCES))
106 		encp->enc_bug61265_workaround = B_TRUE;
107 	else if ((rc == ENOTSUP) || (rc == ENOENT))
108 		encp->enc_bug61265_workaround = B_FALSE;
109 	else
110 		goto fail1;
111 
112 	/* Checksums for TSO sends can be incorrect on Medford. */
113 	encp->enc_bug61297_workaround = B_TRUE;
114 
115 	/* Get clock frequencies (in MHz). */
116 	if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
117 		goto fail2;
118 
119 	/*
120 	 * The Medford timer quantum is 1536 dpcpu_clk cycles, documented for
121 	 * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
122 	 */
123 	encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
124 	encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
125 		    FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
126 
127 	/* Alignment for receive packet DMA buffers */
128 	encp->enc_rx_buf_align_start = 1;
129 
130 	/* Get the RX DMA end padding alignment configuration */
131 	if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
132 		if (rc != EACCES)
133 			goto fail3;
134 
135 		/* Assume largest tail padding size supported by hardware */
136 		end_padding = 256;
137 	}
138 	encp->enc_rx_buf_align_end = end_padding;
139 
140 	/*
141 	 * The maximum supported transmit queue size is 2048. TXQs with 4096
142 	 * descriptors are not supported as the top bit is used for vfifo
143 	 * stuffing.
144 	 */
145 	encp->enc_txq_max_ndescs = 2048;
146 
147 	EFX_STATIC_ASSERT(MEDFORD_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
148 	encp->enc_piobuf_limit = MEDFORD_PIOBUF_NBUFS;
149 	encp->enc_piobuf_size = MEDFORD_PIOBUF_SIZE;
150 	encp->enc_piobuf_min_alloc_size = MEDFORD_MIN_PIO_ALLOC_SIZE;
151 
152 	/*
153 	 * Medford stores a single global copy of VPD, not per-PF as on
154 	 * Huntington.
155 	 */
156 	encp->enc_vpd_is_global = B_TRUE;
157 
158 	rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth);
159 	if (rc != 0)
160 		goto fail4;
161 	encp->enc_required_pcie_bandwidth_mbps = bandwidth;
162 	encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
163 
164 	return (0);
165 
166 fail4:
167 	EFSYS_PROBE(fail4);
168 fail3:
169 	EFSYS_PROBE(fail3);
170 fail2:
171 	EFSYS_PROBE(fail2);
172 fail1:
173 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
174 
175 	return (rc);
176 }
177 
178 #endif	/* EFSYS_OPT_MEDFORD */
179