xref: /freebsd/sys/dev/scc/scc_bus.h (revision 8aac90f18aef7c9eea906c3ff9a001ca7b94f375)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2004-2006 Marcel Moolenaar
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef _DEV_SCC_BUS_H_
30 #define	_DEV_SCC_BUS_H_
31 
32 #include <sys/serial.h>
33 #include <serdev_if.h>
34 
35 #define	SCC_IVAR_CHANNEL	0
36 #define	SCC_IVAR_CLASS		1
37 #define	SCC_IVAR_CLOCK		2
38 #define	SCC_IVAR_MODE		3
39 #define	SCC_IVAR_REGSHFT	4
40 #define	SCC_IVAR_HWMTX		5
41 
42 /* Hardware class -- the SCC type. */
43 #define	SCC_CLASS_UNUSED	0
44 #define	SCC_CLASS_Z8530		1
45 #define	SCC_CLASS_QUICC		2
46 
47 /* The possible modes supported by the SCC. */
48 #define	SCC_MODE_ASYNC		0x01
49 #define	SCC_MODE_BISYNC		0x02
50 #define	SCC_MODE_HDLC		0x04
51 
52 #endif /* _DEV_SCC_BUS_H_ */
53