xref: /freebsd/sys/dev/rtwn/rtl8192c/pci/r92ce_rx.c (revision dd41de95a84d979615a2ef11df6850622bf6184e)
1 /*	$OpenBSD: if_rtwn.c,v 1.6 2015/08/28 00:03:53 deraadt Exp $	*/
2 
3 /*-
4  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
5  * Copyright (c) 2015 Stefan Sperling <stsp@openbsd.org>
6  * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
7  *
8  * Permission to use, copy, modify, and distribute this software for any
9  * purpose with or without fee is hereby granted, provided that the above
10  * copyright notice and this permission notice appear in all copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19  */
20 
21 #include <sys/cdefs.h>
22 __FBSDID("$FreeBSD$");
23 
24 #include "opt_wlan.h"
25 
26 #include <sys/param.h>
27 #include <sys/lock.h>
28 #include <sys/mutex.h>
29 #include <sys/mbuf.h>
30 #include <sys/kernel.h>
31 #include <sys/socket.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/queue.h>
35 #include <sys/taskqueue.h>
36 #include <sys/bus.h>
37 #include <sys/endian.h>
38 #include <sys/linker.h>
39 
40 #include <machine/bus.h>
41 #include <machine/resource.h>
42 #include <sys/rman.h>
43 
44 #include <net/if.h>
45 #include <net/ethernet.h>
46 #include <net/if_media.h>
47 
48 #include <net80211/ieee80211_var.h>
49 #include <net80211/ieee80211_radiotap.h>
50 
51 #include <dev/rtwn/if_rtwnvar.h>
52 #include <dev/rtwn/if_rtwn_debug.h>
53 
54 #include <dev/rtwn/pci/rtwn_pci_var.h>
55 
56 #include <dev/rtwn/rtl8192c/pci/r92ce.h>
57 #include <dev/rtwn/rtl8192c/pci/r92ce_reg.h>
58 
59 int
60 r92ce_get_intr_status(struct rtwn_pci_softc *pc, int *rings)
61 {
62 	struct rtwn_softc *sc = &pc->pc_sc;
63 	uint32_t status;
64 	int ret;
65 
66 	*rings = 0;
67 	status = rtwn_read_4(sc, R92C_HISR);
68 	RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: HISR %08X, HISRE %04X\n",
69 	    __func__, status, rtwn_read_2(sc, R92C_HISRE));
70 	if (status == 0 || status == 0xffffffff)
71 		return (0);
72 
73 	/* Disable interrupts. */
74 	rtwn_write_4(sc, R92C_HIMR, 0);
75 
76 	/* Ack interrupts. */
77 	rtwn_write_4(sc, R92C_HISR, status);
78 
79 	if (status & R92C_IMR_BDOK)
80 		*rings |= (1 << RTWN_PCI_BEACON_QUEUE);
81 	if (status & R92C_IMR_HIGHDOK)
82 		*rings |= (1 << RTWN_PCI_HIGH_QUEUE);
83 	if (status & R92C_IMR_MGNTDOK)
84 		*rings |= (1 << RTWN_PCI_MGNT_QUEUE);
85 	if (status & R92C_IMR_BKDOK)
86 		*rings |= (1 << RTWN_PCI_BK_QUEUE);
87 	if (status & R92C_IMR_BEDOK)
88 		*rings |= (1 << RTWN_PCI_BE_QUEUE);
89 	if (status & R92C_IMR_VIDOK)
90 		*rings |= (1 << RTWN_PCI_VI_QUEUE);
91 	if (status & R92C_IMR_VODOK)
92 		*rings |= (1 << RTWN_PCI_VO_QUEUE);
93 
94 	ret = 0;
95 	if (status & R92C_IMR_RXFOVW)
96 		ret |= RTWN_PCI_INTR_RX_OVERFLOW;
97 	if (status & R92C_IMR_RDU)
98 		ret |= RTWN_PCI_INTR_RX_DESC_UNAVAIL;
99 	if (status & R92C_IMR_ROK)
100 		ret |= RTWN_PCI_INTR_RX_DONE;
101 	if (status & R92C_IMR_TXFOVW)
102 		ret |= RTWN_PCI_INTR_TX_OVERFLOW;
103 	if (status & R92C_IMR_PSTIMEOUT)
104 		ret |= RTWN_PCI_INTR_PS_TIMEOUT;
105 
106 	return (ret);
107 }
108 
109 #define R92C_INT_ENABLE (R92C_IMR_ROK | R92C_IMR_VODOK | R92C_IMR_VIDOK | \
110 			R92C_IMR_BEDOK | R92C_IMR_BKDOK | R92C_IMR_MGNTDOK | \
111 			R92C_IMR_HIGHDOK | R92C_IMR_BDOK | R92C_IMR_RDU | \
112 			R92C_IMR_RXFOVW)
113 void
114 r92ce_enable_intr(struct rtwn_pci_softc *pc)
115 {
116 	struct rtwn_softc *sc = &pc->pc_sc;
117 
118 	/* Enable interrupts. */
119 	rtwn_write_4(sc, R92C_HIMR, R92C_INT_ENABLE);
120 }
121 
122 void
123 r92ce_start_xfers(struct rtwn_softc *sc)
124 {
125 	/* Clear pending interrupts. */
126 	rtwn_write_4(sc, R92C_HISR, 0xffffffff);
127 
128 	/* Enable interrupts. */
129 	rtwn_write_4(sc, R92C_HIMR, R92C_INT_ENABLE);
130 }
131 #undef R92C_INT_ENABLE
132