1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef __BCM_OSAL_ECORE_PACKAGE 31 #define __BCM_OSAL_ECORE_PACKAGE 32 33 #include "qlnx_os.h" 34 #include "ecore_status.h" 35 #include <sys/bitstring.h> 36 37 #if __FreeBSD_version >= 1200000 38 #include <linux/bitmap.h> 39 #else 40 #if __FreeBSD_version >= 1100090 41 #include <compat/linuxkpi/common/include/linux/bitops.h> 42 #else 43 #include <ofed/include/linux/bitops.h> 44 #endif 45 #endif 46 47 #define OSAL_NUM_CPUS() mp_ncpus 48 /* 49 * prototypes of freebsd specific functions required by ecore 50 */ 51 extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id); 52 extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg, 53 uint8_t *reg_value); 54 extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg, 55 uint16_t *reg_value); 56 extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg, 57 uint32_t *reg_value); 58 extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg, 59 uint8_t reg_value); 60 extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg, 61 uint16_t reg_value); 62 extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg, 63 uint32_t reg_value); 64 extern int qlnx_pci_find_capability(void *ecore_dev, int cap); 65 66 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr); 67 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value); 68 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value); 69 70 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr); 71 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 72 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value); 73 74 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 75 76 extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys, 77 uint32_t size); 78 extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr, 79 bus_addr_t phys, uint32_t size); 80 81 extern void qlnx_link_update(void *p_hwfn); 82 extern void qlnx_barrier(void *p_hwfn); 83 84 extern void *qlnx_zalloc(uint32_t size); 85 86 extern void qlnx_get_protocol_stats(void *cdev, int proto_type, 87 void *proto_stats); 88 89 extern void qlnx_sp_isr(void *arg); 90 91 92 #ifdef ECORE_PACKAGE 93 94 /* Memory Types */ 95 #define u8 uint8_t 96 #define u16 uint16_t 97 #define u32 uint32_t 98 #define u64 uint64_t 99 #define s16 uint16_t 100 #define s32 uint32_t 101 102 #ifndef QLNX_RDMA 103 104 typedef uint16_t __le16; 105 typedef uint32_t __le32; 106 typedef uint16_t __be16; 107 typedef uint32_t __be32; 108 109 static __inline unsigned long 110 roundup_pow_of_two(unsigned long x) 111 { 112 return (1UL << flsl(x - 1)); 113 } 114 115 static __inline int 116 is_power_of_2(unsigned long n) 117 { 118 return (n == roundup_pow_of_two(n)); 119 } 120 121 static __inline unsigned long 122 rounddown_pow_of_two(unsigned long x) 123 { 124 return (1UL << (flsl(x) - 1)); 125 } 126 127 #define max_t(type, val1, val2) \ 128 ((type)(val1) > (type)(val2) ? (type)(val1) : (val2)) 129 #define min_t(type, val1, val2) \ 130 ((type)(val1) < (type)(val2) ? (type)(val1) : (val2)) 131 132 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 133 #define nothing do {} while(0) 134 #define BUILD_BUG_ON(cond) nothing 135 136 #endif /* #ifndef QLNX_RDMA */ 137 138 #define OSAL_UNUSED 139 140 #define OSAL_CPU_TO_BE64(val) htobe64(val) 141 #define OSAL_BE64_TO_CPU(val) be64toh(val) 142 143 #define OSAL_CPU_TO_BE32(val) htobe32(val) 144 #define OSAL_BE32_TO_CPU(val) be32toh(val) 145 146 #define OSAL_CPU_TO_LE32(val) htole32(val) 147 #define OSAL_LE32_TO_CPU(val) le32toh(val) 148 149 #define OSAL_CPU_TO_BE16(val) htobe16(val) 150 #define OSAL_BE16_TO_CPU(val) be16toh(val) 151 152 #define OSAL_CPU_TO_LE16(val) htole16(val) 153 #define OSAL_LE16_TO_CPU(val) le16toh(val) 154 155 static __inline uint32_t 156 qlnx_get_cache_line_size(void) 157 { 158 return (CACHE_LINE_SIZE); 159 } 160 161 #define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size() 162 163 #define OSAL_BE32 uint32_t 164 #define dma_addr_t bus_addr_t 165 #define osal_size_t size_t 166 167 typedef struct mtx osal_spinlock_t; 168 typedef struct mtx osal_mutex_t; 169 170 typedef void * osal_dpc_t; 171 172 typedef struct _osal_list_entry_t 173 { 174 struct _osal_list_entry_t *next, *prev; 175 } osal_list_entry_t; 176 177 typedef struct osal_list_t 178 { 179 osal_list_entry_t *head, *tail; 180 unsigned long cnt; 181 } osal_list_t; 182 183 /* OSAL functions */ 184 185 #define OSAL_UDELAY(time) DELAY(time) 186 #define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time) 187 188 #define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size) 189 #define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size) 190 #define OSAL_VALLOC(dev, size) qlnx_zalloc(size) 191 #define OSAL_VZALLOC(dev, size) qlnx_zalloc(size) 192 193 #define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF) 194 #define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF) 195 196 #define OSAL_MEM_ZERO(mem, size) bzero(mem, size) 197 198 #define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size) 199 200 #define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \ 201 qlnx_dma_alloc_coherent(dev, phys, size) 202 203 #define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \ 204 qlnx_dma_free_coherent(dev, virt, phys, size) 205 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0) 206 207 #define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val) 208 #define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val) 209 #define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value) 210 #define DIRECT_REG_WR64(p_hwfn, addr, value) \ 211 qlnx_direct_reg_wr64(p_hwfn, addr, value) 212 #define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr) 213 #define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr) 214 #define DOORBELL(hwfn, addr, value) \ 215 qlnx_dbell_wr32(hwfn, addr, value) 216 217 #define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex) 218 #define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex) 219 #define OSAL_SPIN_LOCK_INIT(lock) {\ 220 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \ 221 } 222 223 #define OSAL_SPIN_UNLOCK(lock) {\ 224 mtx_unlock(lock); \ 225 } 226 #define OSAL_SPIN_LOCK(lock) {\ 227 mtx_lock(lock); \ 228 } 229 230 #define OSAL_MUTEX_ALLOC(p_hwfn, mutex) 231 #define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex) 232 #define OSAL_MUTEX_INIT(lock) {\ 233 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\ 234 } 235 236 #define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock) 237 #define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock) 238 239 #define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT) 240 #define OSAL_DPC_INIT(dpc, hwfn) nothing 241 #define OSAL_SCHEDULE_RECOVERY_HANDLER(x) nothing 242 #define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing 243 #define OSAL_DPC_SYNC(hwfn) nothing 244 245 static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type) 246 { 247 return; 248 } 249 250 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn) 251 { 252 return 1; 253 } 254 255 #define OSAL_LIST_INIT(list) \ 256 do { \ 257 (list)->head = NULL; \ 258 (list)->tail = NULL; \ 259 (list)->cnt = 0; \ 260 } while (0) 261 262 #define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \ 263 do { \ 264 (entry)->prev = (entry_prev); \ 265 (entry)->next = (entry_prev)->next; \ 266 (entry)->next->prev = (entry); \ 267 (entry_prev)->next = (entry); \ 268 (list)->cnt++; \ 269 } while (0); 270 271 #define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \ 272 do { \ 273 ((new_list)->tail)->next = ((list)->head); \ 274 ((list)->head)->prev = ((new_list)->tail); \ 275 (list)->head = (new_list)->head; \ 276 (list)->cnt = (list)->cnt + (new_list)->cnt; \ 277 OSAL_LIST_INIT(new_list); \ 278 } while (0); 279 280 #define OSAL_LIST_PUSH_HEAD(entry, list) \ 281 do { \ 282 (entry)->prev = (osal_list_entry_t *)0; \ 283 (entry)->next = (list)->head; \ 284 if ((list)->tail == (osal_list_entry_t *)0) { \ 285 (list)->tail = (entry); \ 286 } else { \ 287 (list)->head->prev = (entry); \ 288 } \ 289 (list)->head = (entry); \ 290 (list)->cnt++; \ 291 } while (0) 292 293 #define OSAL_LIST_PUSH_TAIL(entry, list) \ 294 do { \ 295 (entry)->next = (osal_list_entry_t *)0; \ 296 (entry)->prev = (list)->tail; \ 297 if ((list)->tail) { \ 298 (list)->tail->next = (entry); \ 299 } else { \ 300 (list)->head = (entry); \ 301 } \ 302 (list)->tail = (entry); \ 303 (list)->cnt++; \ 304 } while (0) 305 306 #define OSAL_LIST_FIRST_ENTRY(list, type, field) \ 307 (type *)((list)->head) 308 309 #define OSAL_LIST_REMOVE_ENTRY(entry, list) \ 310 do { \ 311 if ((list)->head == (entry)) { \ 312 if ((list)->head) { \ 313 (list)->head = (list)->head->next; \ 314 if ((list)->head) { \ 315 (list)->head->prev = (osal_list_entry_t *)0; \ 316 } else { \ 317 (list)->tail = (osal_list_entry_t *)0; \ 318 } \ 319 (list)->cnt--; \ 320 } \ 321 } else if ((list)->tail == (entry)) { \ 322 if ((list)->tail) { \ 323 (list)->tail = (list)->tail->prev; \ 324 if ((list)->tail) { \ 325 (list)->tail->next = (osal_list_entry_t *)0; \ 326 } else { \ 327 (list)->head = (osal_list_entry_t *)0; \ 328 } \ 329 (list)->cnt--; \ 330 } \ 331 } else { \ 332 (entry)->prev->next = (entry)->next; \ 333 (entry)->next->prev = (entry)->prev; \ 334 (list)->cnt--; \ 335 } \ 336 } while (0) 337 338 339 #define OSAL_LIST_IS_EMPTY(list) \ 340 ((list)->cnt == 0) 341 342 #define OSAL_LIST_NEXT(entry, field, type) \ 343 (type *)((&((entry)->field))->next) 344 345 #define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \ 346 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \ 347 entry; \ 348 entry = OSAL_LIST_NEXT(entry, field, type)) 349 350 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \ 351 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \ 352 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \ 353 entry != NULL; \ 354 entry = (type *)tmp_entry, \ 355 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL) 356 357 358 #define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id) 359 360 #define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \ 361 qlnx_pci_read_config_byte(dev, reg, value); 362 #define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \ 363 qlnx_pci_read_config_word(dev, reg, value); 364 #define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \ 365 qlnx_pci_read_config_dword(dev, reg, value); 366 367 #define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \ 368 qlnx_pci_write_config_byte(dev, reg, value); 369 #define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \ 370 qlnx_pci_write_config_word(dev, reg, value); 371 #define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \ 372 qlnx_pci_write_config_dword(dev, reg, value); 373 374 #define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap); 375 376 #define OSAL_MMIOWB(dev) qlnx_barrier(dev) 377 #define OSAL_BARRIER(dev) qlnx_barrier(dev) 378 379 #define OSAL_SMP_MB(dev) mb() 380 #define OSAL_SMP_RMB(dev) rmb() 381 #define OSAL_SMP_WMB(dev) wmb() 382 #define OSAL_RMB(dev) rmb() 383 #define OSAL_WMB(dev) wmb() 384 #define OSAL_DMA_SYNC(dev, addr, length, is_post) 385 386 #define OSAL_FIND_FIRST_BIT find_first_bit 387 #define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit) 388 #define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit) 389 #define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit) 390 #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \ 391 find_first_zero_bit(bitmap, length) 392 393 #define OSAL_LINK_UPDATE(hwfn) qlnx_link_update(hwfn) 394 #define OSAL_VF_FLR_UPDATE(hwfn) 395 396 #define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) 397 #define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) 398 399 #define OSAL_NUM_ACTIVE_CPU() mp_ncpus 400 401 #ifndef DIV_ROUND_UP 402 #define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what)) 403 #endif 404 405 #define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what)) 406 407 #define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val)) 408 409 static __inline uint32_t 410 qlnx_log2(uint32_t x) 411 { 412 uint32_t log = 0; 413 414 while (x >>= 1) log++; 415 416 return (log); 417 } 418 419 #define OSAL_LOG2(val) qlnx_log2(val) 420 #define OFFSETOF(str, field) offsetof(str, field) 421 #define PRINT device_printf 422 #define PRINT_ERR device_printf 423 #define OSAL_ASSERT(is_assert) nothing 424 #define OSAL_BEFORE_PF_START(cdev, my_id) {}; 425 #define OSAL_AFTER_PF_STOP(cdev, my_id) {}; 426 427 #define INLINE __inline 428 #define OSAL_INLINE __inline 429 #define OSAL_UNLIKELY 430 #define OSAL_NULL NULL 431 432 433 #define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2) 434 #define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2) 435 436 #define __iomem 437 #define OSAL_IOMEM 438 439 #define int_ptr_t void * 440 #define osal_int_ptr_t void * 441 #define OSAL_BUILD_BUG_ON(cond) nothing 442 #define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 443 #define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 444 445 #define OSAL_PAGE_SIZE PAGE_SIZE 446 447 #define OSAL_STRCPY(dst, src) strcpy(dst, src) 448 #define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes) 449 #define OSAL_STRLEN(src) strlen(src) 450 #define OSAL_SPRINTF sprintf 451 #define OSAL_SNPRINTF snprintf 452 #define OSAL_MEMSET memset 453 #define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 454 #define osal_uintptr_t u64 455 456 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0) 457 #define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \ 458 qlnx_get_protocol_stats(p_hwfn, type, stats); 459 #define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);} 460 #define OSAL_WARN(cond, fmt, args...) \ 461 if (cond) printf("%s: WARNING: " fmt, __func__, ## args); 462 463 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits) 464 #define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id) 465 466 static inline int 467 qlnx_test_and_change_bit(long bit, volatile unsigned long *var) 468 { 469 long val; 470 471 var += BIT_WORD(bit); 472 bit %= BITS_PER_LONG; 473 bit = (1UL << bit); 474 475 val = *var; 476 477 #if __FreeBSD_version >= 1100000 478 if (val & bit) 479 return (test_and_clear_bit(bit, var)); 480 481 return (test_and_set_bit(bit, var)); 482 #else 483 if (val & bit) 484 return (test_and_clear_bit(bit, (long *)var)); 485 486 return (test_and_set_bit(bit, (long *)var)); 487 488 #endif 489 } 490 491 #if __FreeBSD_version < 1100000 492 static inline unsigned 493 bitmap_weight(unsigned long *bitmap, unsigned nbits) 494 { 495 unsigned bit; 496 unsigned retval = 0; 497 498 for_each_set_bit(bit, bitmap, nbits) 499 retval++; 500 return (retval); 501 } 502 503 #endif 504 505 506 #define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit 507 #define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit 508 #define OSAL_MEMCMP memcmp 509 #define OSAL_SPIN_LOCK_IRQSAVE(x,y) {y=0; mtx_lock(x);} 510 #define OSAL_SPIN_UNLOCK_IRQSAVE(x,y) {y= 0; mtx_unlock(x);} 511 512 static inline u32 513 OSAL_CRC32(u32 crc, u8 *ptr, u32 length) 514 { 515 int i; 516 517 while (length--) { 518 crc ^= *ptr++; 519 for (i = 0; i < 8; i++) 520 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0); 521 } 522 return crc; 523 } 524 525 static inline void 526 OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial) 527 { 528 return; 529 } 530 531 static inline u8 532 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value) 533 { 534 return ECORE_NOTIMPL; 535 } 536 537 #define OSAL_HW_INFO_CHANGE(p_hwfn, offset) 538 #define OSAL_MFW_TLV_REQ(p_hwfn) 539 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) {}; 540 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0) 541 542 #endif /* #ifdef ECORE_PACKAGE */ 543 544 #endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */ 545