1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef __BCM_OSAL_ECORE_PACKAGE 31 #define __BCM_OSAL_ECORE_PACKAGE 32 33 #include "qlnx_os.h" 34 #include "ecore_status.h" 35 #include <sys/bitstring.h> 36 37 #include <linux/types.h> 38 39 #if __FreeBSD_version >= 1200032 40 #include <linux/bitmap.h> 41 #else 42 #if __FreeBSD_version >= 1100090 43 #include <compat/linuxkpi/common/include/linux/bitops.h> 44 #else 45 #include <ofed/include/linux/bitops.h> 46 #endif 47 #endif 48 49 #define OSAL_NUM_CPUS() mp_ncpus 50 /* 51 * prototypes of freebsd specific functions required by ecore 52 */ 53 extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id); 54 extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg, 55 uint8_t *reg_value); 56 extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg, 57 uint16_t *reg_value); 58 extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg, 59 uint32_t *reg_value); 60 extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg, 61 uint8_t reg_value); 62 extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg, 63 uint16_t reg_value); 64 extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg, 65 uint32_t reg_value); 66 extern int qlnx_pci_find_capability(void *ecore_dev, int cap); 67 extern int qlnx_pci_find_ext_capability(void *ecore_dev, int ext_cap); 68 69 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr); 70 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value); 71 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value); 72 73 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr); 74 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 75 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value); 76 77 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 78 extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value); 79 80 extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys, 81 uint32_t size); 82 extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr, 83 bus_addr_t phys, uint32_t size); 84 85 extern void qlnx_link_update(void *p_hwfn); 86 extern void qlnx_barrier(void *p_hwfn); 87 88 extern void *qlnx_zalloc(uint32_t size); 89 90 extern void qlnx_get_protocol_stats(void *cdev, int proto_type, 91 void *proto_stats); 92 93 extern void qlnx_sp_isr(void *arg); 94 95 extern void qlnx_osal_vf_fill_acquire_resc_req(void *p_hwfn, void *p_resc_req, 96 void *p_sw_info); 97 extern void qlnx_osal_iov_vf_cleanup(void *p_hwfn, uint8_t relative_vf_id); 98 extern int qlnx_iov_chk_ucast(void *p_hwfn, int vfid, void *params); 99 extern int qlnx_iov_update_vport(void *p_hwfn, uint8_t vfid, void *params, 100 uint16_t *tlvs); 101 extern int qlnx_pf_vf_msg(void *p_hwfn, uint16_t relative_vf_id); 102 extern void qlnx_vf_flr_update(void *p_hwfn); 103 104 #define nothing do {} while(0) 105 #ifdef ECORE_PACKAGE 106 107 /* Memory Types */ 108 #define u8 uint8_t 109 #define u16 uint16_t 110 #define u32 uint32_t 111 #define u64 uint64_t 112 #define s16 uint16_t 113 #define s32 uint32_t 114 115 #ifndef QLNX_RDMA 116 117 static __inline unsigned long 118 roundup_pow_of_two(unsigned long x) 119 { 120 return (1UL << flsl(x - 1)); 121 } 122 123 static __inline int 124 is_power_of_2(unsigned long n) 125 { 126 return (n == roundup_pow_of_two(n)); 127 } 128 129 static __inline unsigned long 130 rounddown_pow_of_two(unsigned long x) 131 { 132 return (1UL << (flsl(x) - 1)); 133 } 134 135 #define max_t(type, val1, val2) \ 136 ((type)(val1) > (type)(val2) ? (type)(val1) : (val2)) 137 #define min_t(type, val1, val2) \ 138 ((type)(val1) < (type)(val2) ? (type)(val1) : (val2)) 139 140 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 141 #define BUILD_BUG_ON(cond) nothing 142 143 #endif /* #ifndef QLNX_RDMA */ 144 145 #define OSAL_UNUSED 146 147 #define OSAL_CPU_TO_BE64(val) htobe64(val) 148 #define OSAL_BE64_TO_CPU(val) be64toh(val) 149 150 #define OSAL_CPU_TO_BE32(val) htobe32(val) 151 #define OSAL_BE32_TO_CPU(val) be32toh(val) 152 153 #define OSAL_CPU_TO_LE32(val) htole32(val) 154 #define OSAL_LE32_TO_CPU(val) le32toh(val) 155 156 #define OSAL_CPU_TO_BE16(val) htobe16(val) 157 #define OSAL_BE16_TO_CPU(val) be16toh(val) 158 159 #define OSAL_CPU_TO_LE16(val) htole16(val) 160 #define OSAL_LE16_TO_CPU(val) le16toh(val) 161 162 static __inline uint32_t 163 qlnx_get_cache_line_size(void) 164 { 165 return (CACHE_LINE_SIZE); 166 } 167 168 #define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size() 169 170 #define OSAL_BE32 uint32_t 171 #define dma_addr_t bus_addr_t 172 #define osal_size_t size_t 173 174 typedef struct mtx osal_spinlock_t; 175 typedef struct mtx osal_mutex_t; 176 177 typedef void * osal_dpc_t; 178 179 typedef struct _osal_list_entry_t 180 { 181 struct _osal_list_entry_t *next, *prev; 182 } osal_list_entry_t; 183 184 typedef struct osal_list_t 185 { 186 osal_list_entry_t *head, *tail; 187 unsigned long cnt; 188 } osal_list_t; 189 190 /* OSAL functions */ 191 192 #define OSAL_UDELAY(time) DELAY(time) 193 #define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time) 194 195 #define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size) 196 #define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size) 197 #define OSAL_VALLOC(dev, size) qlnx_zalloc(size) 198 #define OSAL_VZALLOC(dev, size) qlnx_zalloc(size) 199 200 #define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF) 201 #define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF) 202 203 #define OSAL_MEM_ZERO(mem, size) bzero(mem, size) 204 205 #define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size) 206 207 #define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \ 208 qlnx_dma_alloc_coherent(dev, phys, size) 209 210 #define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \ 211 qlnx_dma_free_coherent(dev, virt, phys, size) 212 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0) 213 214 #define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val) 215 #define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val) 216 #define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value) 217 #define DIRECT_REG_WR64(p_hwfn, addr, value) \ 218 qlnx_direct_reg_wr64(p_hwfn, addr, value) 219 #define DIRECT_REG_WR_DB(p_hwfn, addr, value) qlnx_dbell_wr32_db(p_hwfn, addr, value) 220 #define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr) 221 #define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr) 222 #define DOORBELL(hwfn, addr, value) \ 223 qlnx_dbell_wr32(hwfn, addr, value) 224 225 #define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex) 226 #define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex) 227 #define OSAL_SPIN_LOCK_INIT(lock) {\ 228 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \ 229 } 230 231 #define OSAL_SPIN_UNLOCK(lock) {\ 232 mtx_unlock(lock); \ 233 } 234 #define OSAL_SPIN_LOCK(lock) {\ 235 mtx_lock(lock); \ 236 } 237 238 #define OSAL_MUTEX_ALLOC(p_hwfn, mutex) 239 #define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex) 240 #define OSAL_MUTEX_INIT(lock) {\ 241 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\ 242 } 243 244 #define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock) 245 #define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock) 246 247 #define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT) 248 #define OSAL_DPC_INIT(dpc, hwfn) nothing 249 extern void qlnx_schedule_recovery(void *p_hwfn); 250 #define OSAL_SCHEDULE_RECOVERY_HANDLER(x) do {qlnx_schedule_recovery(x);} while(0) 251 #define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing 252 #define OSAL_DPC_SYNC(hwfn) nothing 253 254 static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type) 255 { 256 return; 257 } 258 259 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn) 260 { 261 return 1; 262 } 263 264 #define OSAL_LIST_INIT(list) \ 265 do { \ 266 (list)->head = NULL; \ 267 (list)->tail = NULL; \ 268 (list)->cnt = 0; \ 269 } while (0) 270 271 #define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \ 272 do { \ 273 (entry)->prev = (entry_prev); \ 274 (entry)->next = (entry_prev)->next; \ 275 (entry)->next->prev = (entry); \ 276 (entry_prev)->next = (entry); \ 277 (list)->cnt++; \ 278 } while (0); 279 280 #define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \ 281 do { \ 282 ((new_list)->tail)->next = ((list)->head); \ 283 ((list)->head)->prev = ((new_list)->tail); \ 284 (list)->head = (new_list)->head; \ 285 (list)->cnt = (list)->cnt + (new_list)->cnt; \ 286 OSAL_LIST_INIT(new_list); \ 287 } while (0); 288 289 #define OSAL_LIST_PUSH_HEAD(entry, list) \ 290 do { \ 291 (entry)->prev = (osal_list_entry_t *)0; \ 292 (entry)->next = (list)->head; \ 293 if ((list)->tail == (osal_list_entry_t *)0) { \ 294 (list)->tail = (entry); \ 295 } else { \ 296 (list)->head->prev = (entry); \ 297 } \ 298 (list)->head = (entry); \ 299 (list)->cnt++; \ 300 } while (0) 301 302 #define OSAL_LIST_PUSH_TAIL(entry, list) \ 303 do { \ 304 (entry)->next = (osal_list_entry_t *)0; \ 305 (entry)->prev = (list)->tail; \ 306 if ((list)->tail) { \ 307 (list)->tail->next = (entry); \ 308 } else { \ 309 (list)->head = (entry); \ 310 } \ 311 (list)->tail = (entry); \ 312 (list)->cnt++; \ 313 } while (0) 314 315 #define OSAL_LIST_FIRST_ENTRY(list, type, field) \ 316 (type *)((list)->head) 317 318 #define OSAL_LIST_REMOVE_ENTRY(entry, list) \ 319 do { \ 320 if ((list)->head == (entry)) { \ 321 if ((list)->head) { \ 322 (list)->head = (list)->head->next; \ 323 if ((list)->head) { \ 324 (list)->head->prev = (osal_list_entry_t *)0; \ 325 } else { \ 326 (list)->tail = (osal_list_entry_t *)0; \ 327 } \ 328 (list)->cnt--; \ 329 } \ 330 } else if ((list)->tail == (entry)) { \ 331 if ((list)->tail) { \ 332 (list)->tail = (list)->tail->prev; \ 333 if ((list)->tail) { \ 334 (list)->tail->next = (osal_list_entry_t *)0; \ 335 } else { \ 336 (list)->head = (osal_list_entry_t *)0; \ 337 } \ 338 (list)->cnt--; \ 339 } \ 340 } else { \ 341 (entry)->prev->next = (entry)->next; \ 342 (entry)->next->prev = (entry)->prev; \ 343 (list)->cnt--; \ 344 } \ 345 } while (0) 346 347 #define OSAL_LIST_IS_EMPTY(list) \ 348 ((list)->cnt == 0) 349 350 #define OSAL_LIST_NEXT(entry, field, type) \ 351 (type *)((&((entry)->field))->next) 352 353 #define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \ 354 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \ 355 entry; \ 356 entry = OSAL_LIST_NEXT(entry, field, type)) 357 358 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \ 359 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \ 360 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \ 361 entry != NULL; \ 362 entry = (type *)tmp_entry, \ 363 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL) 364 365 #define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id) 366 367 #define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \ 368 qlnx_pci_read_config_byte(dev, reg, value); 369 #define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \ 370 qlnx_pci_read_config_word(dev, reg, value); 371 #define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \ 372 qlnx_pci_read_config_dword(dev, reg, value); 373 374 #define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \ 375 qlnx_pci_write_config_byte(dev, reg, value); 376 #define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \ 377 qlnx_pci_write_config_word(dev, reg, value); 378 #define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \ 379 qlnx_pci_write_config_dword(dev, reg, value); 380 381 #define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap) 382 #define OSAL_PCI_FIND_EXT_CAPABILITY(dev, ext_cap) \ 383 qlnx_pci_find_ext_capability(dev, ext_cap) 384 385 #define OSAL_MMIOWB(dev) qlnx_barrier(dev) 386 #define OSAL_BARRIER(dev) qlnx_barrier(dev) 387 388 #define OSAL_SMP_MB(dev) mb() 389 #define OSAL_SMP_RMB(dev) rmb() 390 #define OSAL_SMP_WMB(dev) wmb() 391 #define OSAL_RMB(dev) rmb() 392 #define OSAL_WMB(dev) wmb() 393 #define OSAL_DMA_SYNC(dev, addr, length, is_post) 394 395 #define OSAL_FIND_FIRST_BIT find_first_bit 396 #define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit) 397 #define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit) 398 #define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit) 399 #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \ 400 find_first_zero_bit(bitmap, length) 401 402 #define OSAL_LINK_UPDATE(hwfn, ptt) qlnx_link_update(hwfn) 403 404 #define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) 405 #define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) 406 407 #define OSAL_NUM_ACTIVE_CPU() mp_ncpus 408 409 #ifndef DIV_ROUND_UP 410 #define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what)) 411 #endif 412 413 #define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what)) 414 415 #define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val)) 416 417 static __inline uint32_t 418 qlnx_log2(uint32_t x) 419 { 420 uint32_t log = 0; 421 422 while (x >>= 1) log++; 423 424 return (log); 425 } 426 427 #define OSAL_LOG2(val) qlnx_log2(val) 428 #define OFFSETOF(str, field) offsetof(str, field) 429 #define PRINT device_printf 430 #define PRINT_ERR device_printf 431 #define OSAL_ASSERT(is_assert) nothing 432 #define OSAL_BEFORE_PF_START(cdev, my_id) {}; 433 #define OSAL_AFTER_PF_STOP(cdev, my_id) {}; 434 435 #define INLINE __inline 436 #define OSAL_INLINE __inline 437 #define OSAL_UNLIKELY 438 #define OSAL_NULL NULL 439 440 #define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2) 441 #define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2) 442 443 #define __iomem 444 #define OSAL_IOMEM 445 446 #define int_ptr_t void * 447 #define osal_int_ptr_t void * 448 #define OSAL_BUILD_BUG_ON(cond) nothing 449 #define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 450 #define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 451 452 #define OSAL_PAGE_SIZE PAGE_SIZE 453 454 #define OSAL_STRCPY(dst, src) strcpy(dst, src) 455 #define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes) 456 #define OSAL_STRLEN(src) strlen(src) 457 #define OSAL_SPRINTF sprintf 458 #define OSAL_SNPRINTF snprintf 459 #define OSAL_MEMSET memset 460 #define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 461 #define osal_uintptr_t u64 462 463 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0) 464 #define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \ 465 qlnx_get_protocol_stats(p_hwfn, type, stats); 466 #define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);} 467 #define OSAL_WARN(cond, fmt, args...) \ 468 if (cond) printf("%s: WARNING: " fmt, __func__, ## args); 469 470 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits) 471 #define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id) 472 473 static inline int 474 qlnx_test_and_change_bit(long bit, volatile unsigned long *var) 475 { 476 long val; 477 478 var += BIT_WORD(bit); 479 bit %= BITS_PER_LONG; 480 bit = (1UL << bit); 481 482 val = *var; 483 484 #if __FreeBSD_version >= 1100000 485 if (val & bit) 486 return (test_and_clear_bit(bit, var)); 487 488 return (test_and_set_bit(bit, var)); 489 #else 490 if (val & bit) 491 return (test_and_clear_bit(bit, (long *)var)); 492 493 return (test_and_set_bit(bit, (long *)var)); 494 495 #endif 496 } 497 498 #if __FreeBSD_version < 1100000 499 static inline unsigned 500 bitmap_weight(unsigned long *bitmap, unsigned nbits) 501 { 502 unsigned bit; 503 unsigned retval = 0; 504 505 for_each_set_bit(bit, bitmap, nbits) 506 retval++; 507 return (retval); 508 } 509 510 #endif 511 512 #define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit 513 #define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit 514 #define OSAL_MEMCMP memcmp 515 #define OSAL_SPIN_LOCK_IRQSAVE(x,y) {y=0; mtx_lock(x);} 516 #define OSAL_SPIN_UNLOCK_IRQSAVE(x,y) {y= 0; mtx_unlock(x);} 517 518 static inline u32 519 OSAL_CRC32(u32 crc, u8 *ptr, u32 length) 520 { 521 int i; 522 523 while (length--) { 524 crc ^= *ptr++; 525 for (i = 0; i < 8; i++) 526 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0); 527 } 528 return crc; 529 } 530 531 static inline void 532 OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial) 533 { 534 return; 535 } 536 537 static inline u8 538 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value) 539 { 540 return ECORE_NOTIMPL; 541 } 542 543 #define OSAL_HW_INFO_CHANGE(p_hwfn, offset) 544 #define OSAL_MFW_TLV_REQ(p_hwfn) 545 #define OSAL_LLDP_RX_TLVS(p_hwfn, buffer, len) 546 #define OSAL_MFW_CMD_PREEMPT(p_hwfn) 547 #define OSAL_TRANSCEIVER_UPDATE(p_hwfn) 548 #define OSAL_MFW_FILL_TLV_DATA(p_hwfn, group, data) (0) 549 550 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0) 551 552 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) \ 553 qlnx_osal_vf_fill_acquire_resc_req(p_hwfn, req, vf_sw_info) 554 555 #define OSAL_IOV_PF_RESP_TYPE(p_hwfn, relative_vf_id, status) 556 #define OSAL_IOV_VF_CLEANUP(p_hwfn, relative_vf_id) \ 557 qlnx_osal_iov_vf_cleanup(p_hwfn, relative_vf_id) 558 559 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, relative_vf_id) ECORE_SUCCESS 560 #define OSAL_IOV_GET_OS_TYPE() VFPF_ACQUIRE_OS_FREEBSD 561 #define OSAL_IOV_PRE_START_VPORT(p_hwfn, relative_vf_id, params) ECORE_SUCCESS 562 #define OSAL_IOV_POST_START_VPORT(p_hwfn, relative_vf_id, vport_id, opaque_fid) 563 #define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, x, y, z) ECORE_SUCCESS 564 #define OSAL_IOV_CHK_UCAST(p_hwfn, vfid, params) \ 565 qlnx_iov_chk_ucast(p_hwfn, vfid, params); 566 #define OSAL_PF_VF_MALICIOUS(p_hwfn, relative_vf_id) 567 #define OSAL_IOV_VF_MSG_TYPE(p_hwfn, relative_vf_id, type) 568 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs) \ 569 qlnx_iov_update_vport(p_hwfn, vfid, params, tlvs) 570 #define OSAL_PF_VF_MSG(p_hwfn, relative_vf_id) \ 571 qlnx_pf_vf_msg(p_hwfn, relative_vf_id) 572 573 #define OSAL_VF_FLR_UPDATE(p_hwfn) qlnx_vf_flr_update(p_hwfn) 574 #define OSAL_IOV_VF_VPORT_STOP(p_hwfn, vf) 575 576 #endif /* #ifdef ECORE_PACKAGE */ 577 578 #endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */ 579