xref: /freebsd/sys/dev/qcom_clk/qcom_clk_rcg2.h (revision 2b8331622f0b212cf3bb4fc4914a501e5321d506)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #ifndef	__QCOM_CLK_RCG2_H__
31 #define	__QCOM_CLK_RCG2_H__
32 
33 #include "qcom_clk_freqtbl.h"
34 
35 /* Flags */
36 /* Set the rate on the parent clock, not just ours */
37 #define	QCOM_CLK_RCG2_FLAGS_SET_RATE_PARENT		0x1
38 /* Must not stop this clock/gate! */
39 #define	QCOM_CLK_RCG2_FLAGS_CRITICAL			0x2
40 
41 /* prediv to hw mapping */
42 #define	QCOM_CLK_FREQTBL_PREDIV_RCG2(prediv)		(2*(prediv)-1)
43 
44 struct qcom_clk_rcg2_def {
45 	struct clknode_init_def clkdef;
46 	uint32_t cmd_rcgr;		/* rcg2 register start */
47 	uint32_t hid_width;		/* pre-divisor width */
48 	uint32_t mnd_width;		/* mn:d divisor width */
49 	int32_t safe_src_idx;		/* safe parent when disabling a shared
50 					 * rcg2 */
51 	uint32_t cfg_offset;		/* cfg offset after cmd_rcgr */
52 	int32_t safe_pre_parent_idx;	/* safe parent before switching
53 					 * parent mux */
54 	uint32_t flags;
55 	const struct qcom_clk_freq_tbl *freq_tbl;
56 };
57 
58 extern	int qcom_clk_rcg2_register(struct clkdom *clkdom,
59 	    struct qcom_clk_rcg2_def *clkdef);
60 
61 #endif	/* __QCOM_CLK_RCG2_H__ */
62