1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2005 John Baldwin <jhb@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 /* 30 * Simple driver for PCI VGA display devices. Drivers such as agp(4) and 31 * drm(4) should attach as children of this device. 32 * 33 * XXX: The vgapci name is a hack until we somehow merge the isa vga driver 34 * in or rename it. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/rman.h> 42 #include <sys/sysctl.h> 43 #include <sys/systm.h> 44 45 #if defined(__amd64__) || defined(__i386__) 46 #include <vm/vm.h> 47 #include <vm/pmap.h> 48 #endif 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 #include <compat/x86bios/x86bios.h> /* To re-POST the card. */ 54 55 struct vga_resource { 56 struct resource *vr_res; 57 int vr_refs; 58 }; 59 60 struct vga_pci_softc { 61 device_t vga_msi_child; /* Child driver using MSI. */ 62 struct vga_resource vga_bars[PCIR_MAX_BAR_0 + 1]; 63 struct vga_resource vga_bios; 64 }; 65 66 SYSCTL_DECL(_hw_pci); 67 68 static struct vga_resource *lookup_res(struct vga_pci_softc *sc, int rid); 69 static struct resource *vga_pci_alloc_resource(device_t dev, device_t child, 70 int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, 71 u_int flags); 72 static int vga_pci_release_resource(device_t dev, device_t child, int type, 73 int rid, struct resource *r); 74 75 int vga_pci_default_unit = -1; 76 SYSCTL_INT(_hw_pci, OID_AUTO, default_vgapci_unit, CTLFLAG_RDTUN, 77 &vga_pci_default_unit, -1, "Default VGA-compatible display"); 78 79 int 80 vga_pci_is_boot_display(device_t dev) 81 { 82 int unit; 83 device_t pcib; 84 uint16_t config; 85 86 /* Check that the given device is a video card */ 87 if ((pci_get_class(dev) != PCIC_DISPLAY && 88 (pci_get_class(dev) != PCIC_OLD || 89 pci_get_subclass(dev) != PCIS_OLD_VGA))) 90 return (0); 91 92 unit = device_get_unit(dev); 93 94 if (vga_pci_default_unit >= 0) { 95 /* 96 * The boot display device was determined by a previous 97 * call to this function, or the user forced it using 98 * the hw.pci.default_vgapci_unit tunable. 99 */ 100 return (vga_pci_default_unit == unit); 101 } 102 103 /* 104 * The primary video card used as a boot display must have the 105 * "I/O" and "Memory Address Space Decoding" bits set in its 106 * Command register. 107 * 108 * Furthermore, if the card is attached to a bridge, instead of 109 * the root PCI bus, the bridge must have the "VGA Enable" bit 110 * set in its Control register. 111 */ 112 113 pcib = device_get_parent(device_get_parent(dev)); 114 if (device_get_devclass(device_get_parent(pcib)) == 115 devclass_find("pci")) { 116 /* 117 * The parent bridge is a PCI-to-PCI bridge: check the 118 * value of the "VGA Enable" bit. 119 */ 120 config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2); 121 if ((config & PCIB_BCR_VGA_ENABLE) == 0) 122 return (0); 123 } 124 125 config = pci_read_config(dev, PCIR_COMMAND, 2); 126 if ((config & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) == 0) 127 return (0); 128 129 /* 130 * Disable interrupts until a chipset driver is loaded for 131 * this PCI device. Else unhandled display adapter interrupts 132 * might freeze the CPU. 133 */ 134 pci_write_config(dev, PCIR_COMMAND, config | PCIM_CMD_INTxDIS, 2); 135 136 /* This video card is the boot display: record its unit number. */ 137 vga_pci_default_unit = unit; 138 device_set_flags(dev, 1); 139 140 return (1); 141 } 142 143 static void 144 vga_pci_reset(device_t dev) 145 { 146 int ps; 147 /* 148 * FLR is unsupported on GPUs so attempt a power-management reset by cycling 149 * the device in/out of D3 state. 150 * PCI spec says we can only go into D3 state from D0 state. 151 * Transition from D[12] into D0 before going to D3 state. 152 */ 153 ps = pci_get_powerstate(dev); 154 if (ps != PCI_POWERSTATE_D0 && ps != PCI_POWERSTATE_D3) 155 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 156 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D3) 157 pci_set_powerstate(dev, PCI_POWERSTATE_D3); 158 pci_set_powerstate(dev, ps); 159 } 160 161 void * 162 vga_pci_map_bios(device_t dev, size_t *size) 163 { 164 struct vga_resource *vr; 165 struct resource *res; 166 device_t pcib; 167 uint32_t rom_addr; 168 uint16_t config; 169 volatile unsigned char *bios; 170 int i, rid, found; 171 172 #if defined(__amd64__) || defined(__i386__) 173 if (vga_pci_is_boot_display(dev)) { 174 /* 175 * On x86, the System BIOS copy the default display 176 * device's Video BIOS at a fixed location in system 177 * memory (0xC0000, 128 kBytes long) at boot time. 178 * 179 * We use this copy for the default boot device, because 180 * the original ROM may not be valid after boot. 181 */ 182 183 *size = VGA_PCI_BIOS_SHADOW_SIZE; 184 return (pmap_mapbios(VGA_PCI_BIOS_SHADOW_ADDR, *size)); 185 } 186 #endif 187 188 pcib = device_get_parent(device_get_parent(dev)); 189 if (device_get_devclass(device_get_parent(pcib)) == 190 devclass_find("pci")) { 191 /* 192 * The parent bridge is a PCI-to-PCI bridge: check the 193 * value of the "VGA Enable" bit. 194 */ 195 config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2); 196 if ((config & PCIB_BCR_VGA_ENABLE) == 0) { 197 config |= PCIB_BCR_VGA_ENABLE; 198 pci_write_config(pcib, PCIR_BRIDGECTL_1, config, 2); 199 } 200 } 201 202 switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) { 203 case PCIM_HDRTYPE_BRIDGE: 204 rid = PCIR_BIOS_1; 205 break; 206 case PCIM_HDRTYPE_CARDBUS: 207 rid = 0; 208 break; 209 default: 210 rid = PCIR_BIOS; 211 break; 212 } 213 if (rid == 0) 214 return (NULL); 215 res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, &rid, 0, 216 ~0, 1, RF_ACTIVE); 217 218 if (res == NULL) { 219 device_printf(dev, "vga_pci_alloc_resource failed\n"); 220 return (NULL); 221 } 222 bios = rman_get_virtual(res); 223 *size = rman_get_size(res); 224 for (found = i = 0; i < hz; i++) { 225 found = (bios[0] == 0x55 && bios[1] == 0xaa); 226 if (found) 227 break; 228 pause("vgabios", 1); 229 } 230 if (found) 231 return (__DEVOLATILE(void *, bios)); 232 if (bootverbose) 233 device_printf(dev, "initial ROM mapping failed -- resetting\n"); 234 235 /* 236 * Enable ROM decode 237 */ 238 vga_pci_reset(dev); 239 rom_addr = pci_read_config(dev, rid, 4); 240 rom_addr &= 0x7ff; 241 rom_addr |= rman_get_start(res) | 0x1; 242 pci_write_config(dev, rid, rom_addr, 4); 243 vr = lookup_res(device_get_softc(dev), rid); 244 vga_pci_release_resource(dev, NULL, SYS_RES_MEMORY, rid, 245 vr->vr_res); 246 247 /* 248 * re-allocate 249 */ 250 res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, &rid, 0, 251 ~0, 1, RF_ACTIVE); 252 if (res == NULL) { 253 device_printf(dev, "vga_pci_alloc_resource failed\n"); 254 return (NULL); 255 } 256 bios = rman_get_virtual(res); 257 *size = rman_get_size(res); 258 for (found = i = 0; i < 3*hz; i++) { 259 found = (bios[0] == 0x55 && bios[1] == 0xaa); 260 if (found) 261 break; 262 pause("vgabios", 1); 263 } 264 if (found) 265 return (__DEVOLATILE(void *, bios)); 266 device_printf(dev, "ROM mapping failed\n"); 267 vr = lookup_res(device_get_softc(dev), rid); 268 vga_pci_release_resource(dev, NULL, SYS_RES_MEMORY, rid, 269 vr->vr_res); 270 return (NULL); 271 } 272 273 void 274 vga_pci_unmap_bios(device_t dev, void *bios) 275 { 276 struct vga_resource *vr; 277 int rid; 278 279 if (bios == NULL) { 280 return; 281 } 282 283 #if defined(__amd64__) || defined(__i386__) 284 if (vga_pci_is_boot_display(dev)) { 285 /* We mapped the BIOS shadow copy located at 0xC0000. */ 286 pmap_unmapdev(bios, VGA_PCI_BIOS_SHADOW_SIZE); 287 288 return; 289 } 290 #endif 291 switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) { 292 case PCIM_HDRTYPE_BRIDGE: 293 rid = PCIR_BIOS_1; 294 break; 295 case PCIM_HDRTYPE_CARDBUS: 296 rid = 0; 297 break; 298 default: 299 rid = PCIR_BIOS; 300 break; 301 } 302 if (rid == 0) 303 return; 304 /* 305 * Look up the PCIR_BIOS resource in our softc. It should match 306 * the address we returned previously. 307 */ 308 vr = lookup_res(device_get_softc(dev), rid); 309 KASSERT(vr->vr_res != NULL, ("vga_pci_unmap_bios: bios not mapped")); 310 KASSERT(rman_get_virtual(vr->vr_res) == bios, 311 ("vga_pci_unmap_bios: mismatch")); 312 vga_pci_release_resource(dev, NULL, SYS_RES_MEMORY, rid, 313 vr->vr_res); 314 } 315 316 int 317 vga_pci_repost(device_t dev) 318 { 319 #if defined(__amd64__) || defined(__i386__) 320 x86regs_t regs; 321 322 if (!vga_pci_is_boot_display(dev)) 323 return (EINVAL); 324 325 if (x86bios_get_orm(VGA_PCI_BIOS_SHADOW_ADDR) == NULL) 326 return (ENOTSUP); 327 328 x86bios_init_regs(®s); 329 330 regs.R_AH = pci_get_bus(dev); 331 regs.R_AL = (pci_get_slot(dev) << 3) | (pci_get_function(dev) & 0x07); 332 regs.R_DL = 0x80; 333 334 device_printf(dev, "REPOSTing\n"); 335 x86bios_call(®s, X86BIOS_PHYSTOSEG(VGA_PCI_BIOS_SHADOW_ADDR + 3), 336 X86BIOS_PHYSTOOFF(VGA_PCI_BIOS_SHADOW_ADDR + 3)); 337 338 x86bios_get_intr(0x10); 339 340 return (0); 341 #else 342 return (ENOTSUP); 343 #endif 344 } 345 346 static int 347 vga_pci_probe(device_t dev) 348 { 349 350 switch (pci_get_class(dev)) { 351 case PCIC_DISPLAY: 352 break; 353 case PCIC_OLD: 354 if (pci_get_subclass(dev) != PCIS_OLD_VGA) 355 return (ENXIO); 356 break; 357 default: 358 return (ENXIO); 359 } 360 361 /* Probe default display. */ 362 vga_pci_is_boot_display(dev); 363 364 device_set_desc(dev, "VGA-compatible display"); 365 return (BUS_PROBE_GENERIC); 366 } 367 368 static int 369 vga_pci_attach(device_t dev) 370 { 371 372 bus_generic_probe(dev); 373 374 /* Always create a drmn child for now to make it easier on drm. */ 375 device_add_child(dev, "drmn", -1); 376 bus_generic_attach(dev); 377 378 if (vga_pci_is_boot_display(dev)) 379 device_printf(dev, "Boot video device\n"); 380 381 return (0); 382 } 383 384 static int 385 vga_pci_suspend(device_t dev) 386 { 387 388 return (bus_generic_suspend(dev)); 389 } 390 391 static int 392 vga_pci_detach(device_t dev) 393 { 394 int error; 395 396 error = bus_generic_detach(dev); 397 if (error == 0) 398 error = device_delete_children(dev); 399 return (error); 400 } 401 402 static int 403 vga_pci_resume(device_t dev) 404 { 405 406 return (bus_generic_resume(dev)); 407 } 408 409 /* Bus interface. */ 410 411 static int 412 vga_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 413 { 414 415 return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result)); 416 } 417 418 static int 419 vga_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 420 { 421 422 return (EINVAL); 423 } 424 425 static int 426 vga_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 427 int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg, 428 void **cookiep) 429 { 430 return (BUS_SETUP_INTR(device_get_parent(dev), dev, irq, flags, 431 filter, intr, arg, cookiep)); 432 } 433 434 static int 435 vga_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 436 void *cookie) 437 { 438 return (BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie)); 439 } 440 441 static struct vga_resource * 442 lookup_res(struct vga_pci_softc *sc, int rid) 443 { 444 int bar; 445 446 if (rid == PCIR_BIOS) 447 return (&sc->vga_bios); 448 bar = PCI_RID2BAR(rid); 449 if (bar >= 0 && bar <= PCIR_MAX_BAR_0) 450 return (&sc->vga_bars[bar]); 451 return (NULL); 452 } 453 454 static struct resource * 455 vga_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 456 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 457 { 458 struct vga_resource *vr; 459 460 switch (type) { 461 case SYS_RES_MEMORY: 462 case SYS_RES_IOPORT: 463 /* 464 * For BARs, we cache the resource so that we only allocate it 465 * from the PCI bus once. 466 */ 467 vr = lookup_res(device_get_softc(dev), *rid); 468 if (vr == NULL) 469 return (NULL); 470 if (vr->vr_res == NULL) 471 vr->vr_res = bus_alloc_resource(dev, type, rid, start, 472 end, count, flags); 473 if (vr->vr_res != NULL) 474 vr->vr_refs++; 475 return (vr->vr_res); 476 } 477 return (bus_alloc_resource(dev, type, rid, start, end, count, flags)); 478 } 479 480 static int 481 vga_pci_release_resource(device_t dev, device_t child, int type, int rid, 482 struct resource *r) 483 { 484 struct vga_resource *vr; 485 int error; 486 487 switch (type) { 488 case SYS_RES_MEMORY: 489 case SYS_RES_IOPORT: 490 /* 491 * For BARs, we release the resource from the PCI bus 492 * when the last child reference goes away. 493 */ 494 vr = lookup_res(device_get_softc(dev), rid); 495 if (vr == NULL) 496 return (EINVAL); 497 if (vr->vr_res == NULL) 498 return (EINVAL); 499 KASSERT(vr->vr_res == r, ("vga_pci resource mismatch")); 500 if (vr->vr_refs > 1) { 501 vr->vr_refs--; 502 return (0); 503 } 504 KASSERT(vr->vr_refs > 0, 505 ("vga_pci resource reference count underflow")); 506 error = bus_release_resource(dev, type, rid, r); 507 if (error == 0) { 508 vr->vr_res = NULL; 509 vr->vr_refs = 0; 510 } 511 return (error); 512 } 513 514 return (bus_release_resource(dev, type, rid, r)); 515 } 516 517 /* PCI interface. */ 518 519 static uint32_t 520 vga_pci_read_config(device_t dev, device_t child, int reg, int width) 521 { 522 523 return (pci_read_config(dev, reg, width)); 524 } 525 526 static void 527 vga_pci_write_config(device_t dev, device_t child, int reg, 528 uint32_t val, int width) 529 { 530 531 pci_write_config(dev, reg, val, width); 532 } 533 534 static int 535 vga_pci_enable_busmaster(device_t dev, device_t child) 536 { 537 538 return (pci_enable_busmaster(dev)); 539 } 540 541 static int 542 vga_pci_disable_busmaster(device_t dev, device_t child) 543 { 544 545 return (pci_disable_busmaster(dev)); 546 } 547 548 static int 549 vga_pci_enable_io(device_t dev, device_t child, int space) 550 { 551 552 device_printf(dev, "child %s requested pci_enable_io\n", 553 device_get_nameunit(child)); 554 return (pci_enable_io(dev, space)); 555 } 556 557 static int 558 vga_pci_disable_io(device_t dev, device_t child, int space) 559 { 560 561 device_printf(dev, "child %s requested pci_disable_io\n", 562 device_get_nameunit(child)); 563 return (pci_disable_io(dev, space)); 564 } 565 566 static int 567 vga_pci_get_vpd_ident(device_t dev, device_t child, const char **identptr) 568 { 569 570 return (pci_get_vpd_ident(dev, identptr)); 571 } 572 573 static int 574 vga_pci_get_vpd_readonly(device_t dev, device_t child, const char *kw, 575 const char **vptr) 576 { 577 578 return (pci_get_vpd_readonly(dev, kw, vptr)); 579 } 580 581 static int 582 vga_pci_set_powerstate(device_t dev, device_t child, int state) 583 { 584 585 device_printf(dev, "child %s requested pci_set_powerstate\n", 586 device_get_nameunit(child)); 587 return (pci_set_powerstate(dev, state)); 588 } 589 590 static int 591 vga_pci_get_powerstate(device_t dev, device_t child) 592 { 593 594 device_printf(dev, "child %s requested pci_get_powerstate\n", 595 device_get_nameunit(child)); 596 return (pci_get_powerstate(dev)); 597 } 598 599 static int 600 vga_pci_assign_interrupt(device_t dev, device_t child) 601 { 602 603 device_printf(dev, "child %s requested pci_assign_interrupt\n", 604 device_get_nameunit(child)); 605 return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev)); 606 } 607 608 static int 609 vga_pci_find_cap(device_t dev, device_t child, int capability, 610 int *capreg) 611 { 612 613 return (pci_find_cap(dev, capability, capreg)); 614 } 615 616 static int 617 vga_pci_find_next_cap(device_t dev, device_t child, int capability, 618 int start, int *capreg) 619 { 620 621 return (pci_find_next_cap(dev, capability, start, capreg)); 622 } 623 624 static int 625 vga_pci_find_extcap(device_t dev, device_t child, int capability, 626 int *capreg) 627 { 628 629 return (pci_find_extcap(dev, capability, capreg)); 630 } 631 632 static int 633 vga_pci_find_next_extcap(device_t dev, device_t child, int capability, 634 int start, int *capreg) 635 { 636 637 return (pci_find_next_extcap(dev, capability, start, capreg)); 638 } 639 640 static int 641 vga_pci_find_htcap(device_t dev, device_t child, int capability, 642 int *capreg) 643 { 644 645 return (pci_find_htcap(dev, capability, capreg)); 646 } 647 648 static int 649 vga_pci_find_next_htcap(device_t dev, device_t child, int capability, 650 int start, int *capreg) 651 { 652 653 return (pci_find_next_htcap(dev, capability, start, capreg)); 654 } 655 656 static int 657 vga_pci_alloc_msi(device_t dev, device_t child, int *count) 658 { 659 struct vga_pci_softc *sc; 660 int error; 661 662 sc = device_get_softc(dev); 663 if (sc->vga_msi_child != NULL) 664 return (EBUSY); 665 error = pci_alloc_msi(dev, count); 666 if (error == 0) 667 sc->vga_msi_child = child; 668 return (error); 669 } 670 671 static int 672 vga_pci_alloc_msix(device_t dev, device_t child, int *count) 673 { 674 struct vga_pci_softc *sc; 675 int error; 676 677 sc = device_get_softc(dev); 678 if (sc->vga_msi_child != NULL) 679 return (EBUSY); 680 error = pci_alloc_msix(dev, count); 681 if (error == 0) 682 sc->vga_msi_child = child; 683 return (error); 684 } 685 686 static int 687 vga_pci_remap_msix(device_t dev, device_t child, int count, 688 const u_int *vectors) 689 { 690 struct vga_pci_softc *sc; 691 692 sc = device_get_softc(dev); 693 if (sc->vga_msi_child != child) 694 return (ENXIO); 695 return (pci_remap_msix(dev, count, vectors)); 696 } 697 698 static int 699 vga_pci_release_msi(device_t dev, device_t child) 700 { 701 struct vga_pci_softc *sc; 702 int error; 703 704 sc = device_get_softc(dev); 705 if (sc->vga_msi_child != child) 706 return (ENXIO); 707 error = pci_release_msi(dev); 708 if (error == 0) 709 sc->vga_msi_child = NULL; 710 return (error); 711 } 712 713 static int 714 vga_pci_msi_count(device_t dev, device_t child) 715 { 716 717 return (pci_msi_count(dev)); 718 } 719 720 static int 721 vga_pci_msix_count(device_t dev, device_t child) 722 { 723 724 return (pci_msix_count(dev)); 725 } 726 727 static bus_dma_tag_t 728 vga_pci_get_dma_tag(device_t bus, device_t child) 729 { 730 731 return (bus_get_dma_tag(bus)); 732 } 733 734 static device_method_t vga_pci_methods[] = { 735 /* Device interface */ 736 DEVMETHOD(device_probe, vga_pci_probe), 737 DEVMETHOD(device_attach, vga_pci_attach), 738 DEVMETHOD(device_shutdown, bus_generic_shutdown), 739 DEVMETHOD(device_suspend, vga_pci_suspend), 740 DEVMETHOD(device_detach, vga_pci_detach), 741 DEVMETHOD(device_resume, vga_pci_resume), 742 743 /* Bus interface */ 744 DEVMETHOD(bus_read_ivar, vga_pci_read_ivar), 745 DEVMETHOD(bus_write_ivar, vga_pci_write_ivar), 746 DEVMETHOD(bus_setup_intr, vga_pci_setup_intr), 747 DEVMETHOD(bus_teardown_intr, vga_pci_teardown_intr), 748 DEVMETHOD(bus_alloc_resource, vga_pci_alloc_resource), 749 DEVMETHOD(bus_release_resource, vga_pci_release_resource), 750 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 751 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 752 DEVMETHOD(bus_get_dma_tag, vga_pci_get_dma_tag), 753 754 /* PCI interface */ 755 DEVMETHOD(pci_read_config, vga_pci_read_config), 756 DEVMETHOD(pci_write_config, vga_pci_write_config), 757 DEVMETHOD(pci_enable_busmaster, vga_pci_enable_busmaster), 758 DEVMETHOD(pci_disable_busmaster, vga_pci_disable_busmaster), 759 DEVMETHOD(pci_enable_io, vga_pci_enable_io), 760 DEVMETHOD(pci_disable_io, vga_pci_disable_io), 761 DEVMETHOD(pci_get_vpd_ident, vga_pci_get_vpd_ident), 762 DEVMETHOD(pci_get_vpd_readonly, vga_pci_get_vpd_readonly), 763 DEVMETHOD(pci_get_powerstate, vga_pci_get_powerstate), 764 DEVMETHOD(pci_set_powerstate, vga_pci_set_powerstate), 765 DEVMETHOD(pci_assign_interrupt, vga_pci_assign_interrupt), 766 DEVMETHOD(pci_find_cap, vga_pci_find_cap), 767 DEVMETHOD(pci_find_next_cap, vga_pci_find_next_cap), 768 DEVMETHOD(pci_find_extcap, vga_pci_find_extcap), 769 DEVMETHOD(pci_find_next_extcap, vga_pci_find_next_extcap), 770 DEVMETHOD(pci_find_htcap, vga_pci_find_htcap), 771 DEVMETHOD(pci_find_next_htcap, vga_pci_find_next_htcap), 772 DEVMETHOD(pci_alloc_msi, vga_pci_alloc_msi), 773 DEVMETHOD(pci_alloc_msix, vga_pci_alloc_msix), 774 DEVMETHOD(pci_remap_msix, vga_pci_remap_msix), 775 DEVMETHOD(pci_release_msi, vga_pci_release_msi), 776 DEVMETHOD(pci_msi_count, vga_pci_msi_count), 777 DEVMETHOD(pci_msix_count, vga_pci_msix_count), 778 { 0, 0 } 779 }; 780 781 static driver_t vga_pci_driver = { 782 "vgapci", 783 vga_pci_methods, 784 sizeof(struct vga_pci_softc), 785 }; 786 787 DRIVER_MODULE(vgapci, pci, vga_pci_driver, 0, 0); 788 MODULE_DEPEND(vgapci, x86bios, 1, 1, 1); 789