xref: /freebsd/sys/dev/pci/hostb_pci.c (revision 3982006ed5587cfd83cc1955186e0aa4b92b3fcd)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice unmodified, this list of conditions, and the following
12  *    disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 
37 #include <dev/pci/pcivar.h>
38 #include <dev/pci/pcireg.h>
39 
40 /*
41  * Provide a device to "eat" the host->pci bridge devices that show up
42  * on PCI buses and stop them showing up twice on the probes.  This also
43  * stops them showing up as 'none' in pciconf -l.  If the host bridge
44  * provides an AGP capability then we create a child agp device for the
45  * agp GART driver to attach to.
46  */
47 static int
48 pci_hostb_probe(device_t dev)
49 {
50 	u_int32_t id;
51 
52 	id = pci_get_devid(dev);
53 
54 	switch (id) {
55 
56 	/* VIA VT82C596 Power Management Function */
57 	case 0x30501106:
58 		return (ENXIO);
59 
60 	default:
61 		break;
62 	}
63 
64 	if (pci_get_class(dev) == PCIC_BRIDGE &&
65 	    pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
66 		device_set_desc(dev, "Host to PCI bridge");
67 		device_quiet(dev);
68 		return (-10000);
69 	}
70 	return (ENXIO);
71 }
72 
73 static int
74 pci_hostb_attach(device_t dev)
75 {
76 
77 	bus_generic_probe(dev);
78 
79 	/*
80 	 * If AGP capabilities are present on this device, then create
81 	 * an AGP child.
82 	 */
83 	if (pci_find_cap(dev, PCIY_AGP, NULL) == 0)
84 		device_add_child(dev, "agp", -1);
85 	bus_generic_attach(dev);
86 	return (0);
87 }
88 
89 /* Bus interface. */
90 
91 static int
92 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
93 {
94 
95 	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
96 }
97 
98 static int
99 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
100 {
101 
102 	return (EINVAL);
103 }
104 
105 static struct resource *
106 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid,
107     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
108 {
109 
110 	return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
111 }
112 
113 static int
114 pci_hostb_release_resource(device_t dev, device_t child, int type, int rid,
115     struct resource *r)
116 {
117 
118 	return (bus_release_resource(dev, type, rid, r));
119 }
120 
121 /* PCI interface. */
122 
123 static uint32_t
124 pci_hostb_read_config(device_t dev, device_t child, int reg, int width)
125 {
126 
127 	return (pci_read_config(dev, reg, width));
128 }
129 
130 static void
131 pci_hostb_write_config(device_t dev, device_t child, int reg,
132     uint32_t val, int width)
133 {
134 
135 	pci_write_config(dev, reg, val, width);
136 }
137 
138 static int
139 pci_hostb_enable_busmaster(device_t dev, device_t child)
140 {
141 
142 	device_printf(dev, "child %s requested pci_enable_busmaster\n",
143 	    device_get_nameunit(child));
144 	return (pci_enable_busmaster(dev));
145 }
146 
147 static int
148 pci_hostb_disable_busmaster(device_t dev, device_t child)
149 {
150 
151 	device_printf(dev, "child %s requested pci_disable_busmaster\n",
152 	    device_get_nameunit(child));
153 	return (pci_disable_busmaster(dev));
154 }
155 
156 static int
157 pci_hostb_enable_io(device_t dev, device_t child, int space)
158 {
159 
160 	device_printf(dev, "child %s requested pci_enable_io\n",
161 	    device_get_nameunit(child));
162 	return (pci_enable_io(dev, space));
163 }
164 
165 static int
166 pci_hostb_disable_io(device_t dev, device_t child, int space)
167 {
168 
169 	device_printf(dev, "child %s requested pci_disable_io\n",
170 	    device_get_nameunit(child));
171 	return (pci_disable_io(dev, space));
172 }
173 
174 static int
175 pci_hostb_set_powerstate(device_t dev, device_t child, int state)
176 {
177 
178 	device_printf(dev, "child %s requested pci_set_powerstate\n",
179 	    device_get_nameunit(child));
180 	return (pci_set_powerstate(dev, state));
181 }
182 
183 static int
184 pci_hostb_get_powerstate(device_t dev, device_t child)
185 {
186 
187 	device_printf(dev, "child %s requested pci_get_powerstate\n",
188 	    device_get_nameunit(child));
189 	return (pci_get_powerstate(dev));
190 }
191 
192 static int
193 pci_hostb_assign_interrupt(device_t dev, device_t child)
194 {
195 
196 	device_printf(dev, "child %s requested pci_assign_interrupt\n",
197 	    device_get_nameunit(child));
198 	return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
199 }
200 
201 static int
202 pci_hostb_find_cap(device_t dev, device_t child, int capability,
203     int *capreg)
204 {
205 
206 	return (pci_find_cap(dev, capability, capreg));
207 }
208 
209 static int
210 pci_hostb_find_next_cap(device_t dev, device_t child, int capability,
211     int start, int *capreg)
212 {
213 
214 	return (pci_find_next_cap(dev, capability, start, capreg));
215 }
216 
217 static int
218 pci_hostb_find_extcap(device_t dev, device_t child, int capability,
219     int *capreg)
220 {
221 
222 	return (pci_find_extcap(dev, capability, capreg));
223 }
224 
225 static int
226 pci_hostb_find_next_extcap(device_t dev, device_t child, int capability,
227     int start, int *capreg)
228 {
229 
230 	return (pci_find_next_extcap(dev, capability, start, capreg));
231 }
232 
233 static int
234 pci_hostb_find_htcap(device_t dev, device_t child, int capability,
235     int *capreg)
236 {
237 
238 	return (pci_find_htcap(dev, capability, capreg));
239 }
240 
241 static int
242 pci_hostb_find_next_htcap(device_t dev, device_t child, int capability,
243     int start, int *capreg)
244 {
245 
246 	return (pci_find_next_htcap(dev, capability, start, capreg));
247 }
248 
249 static device_method_t pci_hostb_methods[] = {
250 	/* Device interface */
251 	DEVMETHOD(device_probe,		pci_hostb_probe),
252 	DEVMETHOD(device_attach,	pci_hostb_attach),
253 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
254 	DEVMETHOD(device_suspend,	bus_generic_suspend),
255 	DEVMETHOD(device_resume,	bus_generic_resume),
256 
257 	/* Bus interface */
258 	DEVMETHOD(bus_read_ivar,	pci_hostb_read_ivar),
259 	DEVMETHOD(bus_write_ivar,	pci_hostb_write_ivar),
260 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
261 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
262 
263 	DEVMETHOD(bus_alloc_resource,	pci_hostb_alloc_resource),
264 	DEVMETHOD(bus_release_resource,	pci_hostb_release_resource),
265 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
266 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
267 
268 	/* PCI interface */
269 	DEVMETHOD(pci_read_config,	pci_hostb_read_config),
270 	DEVMETHOD(pci_write_config,	pci_hostb_write_config),
271 	DEVMETHOD(pci_enable_busmaster,	pci_hostb_enable_busmaster),
272 	DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster),
273 	DEVMETHOD(pci_enable_io,	pci_hostb_enable_io),
274 	DEVMETHOD(pci_disable_io,	pci_hostb_disable_io),
275 	DEVMETHOD(pci_get_powerstate,	pci_hostb_get_powerstate),
276 	DEVMETHOD(pci_set_powerstate,	pci_hostb_set_powerstate),
277 	DEVMETHOD(pci_assign_interrupt,	pci_hostb_assign_interrupt),
278 	DEVMETHOD(pci_find_cap,		pci_hostb_find_cap),
279 	DEVMETHOD(pci_find_next_cap,	pci_hostb_find_next_cap),
280 	DEVMETHOD(pci_find_extcap,	pci_hostb_find_extcap),
281 	DEVMETHOD(pci_find_next_extcap,	pci_hostb_find_next_extcap),
282 	DEVMETHOD(pci_find_htcap,	pci_hostb_find_htcap),
283 	DEVMETHOD(pci_find_next_htcap,	pci_hostb_find_next_htcap),
284 
285 	{ 0, 0 }
286 };
287 
288 static driver_t pci_hostb_driver = {
289 	"hostb",
290 	pci_hostb_methods,
291 	1,
292 };
293 
294 static devclass_t pci_hostb_devclass;
295 
296 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, 0, 0);
297