1 /*- 2 * Copyright (C) 2009 Nathan Whitehorn 3 * Copyright (C) 2015 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Portions of this software were developed by Andrew Turner 7 * under sponsorship from the FreeBSD Foundation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/malloc.h> 39 #include <sys/bus.h> 40 #include <sys/cpu.h> 41 #include <machine/bus.h> 42 43 #include <dev/ofw/openfirm.h> 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/ofw_bus_subr.h> 46 #include <dev/ofw/ofw_cpu.h> 47 48 #ifdef EXT_RESOURCES 49 #include <dev/extres/clk/clk.h> 50 #endif 51 52 static int ofw_cpulist_probe(device_t); 53 static int ofw_cpulist_attach(device_t); 54 static const struct ofw_bus_devinfo *ofw_cpulist_get_devinfo(device_t dev, 55 device_t child); 56 57 static MALLOC_DEFINE(M_OFWCPU, "ofwcpu", "OFW CPU device information"); 58 59 struct ofw_cpulist_softc { 60 pcell_t sc_addr_cells; 61 }; 62 63 static device_method_t ofw_cpulist_methods[] = { 64 /* Device interface */ 65 DEVMETHOD(device_probe, ofw_cpulist_probe), 66 DEVMETHOD(device_attach, ofw_cpulist_attach), 67 68 /* Bus interface */ 69 DEVMETHOD(bus_add_child, bus_generic_add_child), 70 DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo), 71 72 /* ofw_bus interface */ 73 DEVMETHOD(ofw_bus_get_devinfo, ofw_cpulist_get_devinfo), 74 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 75 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 76 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 77 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 78 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t ofw_cpulist_driver = { 84 "cpulist", 85 ofw_cpulist_methods, 86 sizeof(struct ofw_cpulist_softc) 87 }; 88 89 static devclass_t ofw_cpulist_devclass; 90 91 DRIVER_MODULE(ofw_cpulist, ofwbus, ofw_cpulist_driver, ofw_cpulist_devclass, 92 0, 0); 93 94 static int 95 ofw_cpulist_probe(device_t dev) 96 { 97 const char *name; 98 99 name = ofw_bus_get_name(dev); 100 101 if (name == NULL || strcmp(name, "cpus") != 0) 102 return (ENXIO); 103 104 device_set_desc(dev, "Open Firmware CPU Group"); 105 106 return (0); 107 } 108 109 static int 110 ofw_cpulist_attach(device_t dev) 111 { 112 struct ofw_cpulist_softc *sc; 113 phandle_t root, child; 114 device_t cdev; 115 struct ofw_bus_devinfo *dinfo; 116 117 sc = device_get_softc(dev); 118 root = ofw_bus_get_node(dev); 119 120 sc->sc_addr_cells = 1; 121 OF_getencprop(root, "#address-cells", &sc->sc_addr_cells, 122 sizeof(sc->sc_addr_cells)); 123 124 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 125 dinfo = malloc(sizeof(*dinfo), M_OFWCPU, M_WAITOK | M_ZERO); 126 127 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { 128 free(dinfo, M_OFWCPU); 129 continue; 130 } 131 cdev = device_add_child(dev, NULL, -1); 132 if (cdev == NULL) { 133 device_printf(dev, "<%s>: device_add_child failed\n", 134 dinfo->obd_name); 135 ofw_bus_gen_destroy_devinfo(dinfo); 136 free(dinfo, M_OFWCPU); 137 continue; 138 } 139 device_set_ivars(cdev, dinfo); 140 } 141 142 return (bus_generic_attach(dev)); 143 } 144 145 static const struct ofw_bus_devinfo * 146 ofw_cpulist_get_devinfo(device_t dev, device_t child) 147 { 148 return (device_get_ivars(child)); 149 } 150 151 static int ofw_cpu_probe(device_t); 152 static int ofw_cpu_attach(device_t); 153 static int ofw_cpu_read_ivar(device_t dev, device_t child, int index, 154 uintptr_t *result); 155 156 struct ofw_cpu_softc { 157 struct pcpu *sc_cpu_pcpu; 158 uint32_t sc_nominal_mhz; 159 boolean_t sc_reg_valid; 160 pcell_t sc_reg[2]; 161 }; 162 163 static device_method_t ofw_cpu_methods[] = { 164 /* Device interface */ 165 DEVMETHOD(device_probe, ofw_cpu_probe), 166 DEVMETHOD(device_attach, ofw_cpu_attach), 167 168 /* Bus interface */ 169 DEVMETHOD(bus_add_child, bus_generic_add_child), 170 DEVMETHOD(bus_read_ivar, ofw_cpu_read_ivar), 171 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 172 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 173 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 174 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 175 DEVMETHOD(bus_activate_resource,bus_generic_activate_resource), 176 177 DEVMETHOD_END 178 }; 179 180 static driver_t ofw_cpu_driver = { 181 "cpu", 182 ofw_cpu_methods, 183 sizeof(struct ofw_cpu_softc) 184 }; 185 186 static devclass_t ofw_cpu_devclass; 187 188 DRIVER_MODULE(ofw_cpu, cpulist, ofw_cpu_driver, ofw_cpu_devclass, 0, 0); 189 190 static int 191 ofw_cpu_probe(device_t dev) 192 { 193 const char *type = ofw_bus_get_type(dev); 194 195 if (type == NULL || strcmp(type, "cpu") != 0) 196 return (ENXIO); 197 198 device_set_desc(dev, "Open Firmware CPU"); 199 return (0); 200 } 201 202 static int 203 ofw_cpu_attach(device_t dev) 204 { 205 struct ofw_cpulist_softc *psc; 206 struct ofw_cpu_softc *sc; 207 phandle_t node; 208 pcell_t cell; 209 int rv; 210 #ifdef EXT_RESOURCES 211 clk_t cpuclk; 212 uint64_t freq; 213 #endif 214 215 sc = device_get_softc(dev); 216 psc = device_get_softc(device_get_parent(dev)); 217 218 if (nitems(sc->sc_reg) < psc->sc_addr_cells) { 219 if (bootverbose) 220 device_printf(dev, "Too many address cells\n"); 221 return (EINVAL); 222 } 223 224 node = ofw_bus_get_node(dev); 225 226 /* Read and validate the reg property for use later */ 227 sc->sc_reg_valid = false; 228 rv = OF_getencprop(node, "reg", sc->sc_reg, sizeof(sc->sc_reg)); 229 if (rv < 0) 230 device_printf(dev, "missing 'reg' property\n"); 231 else if ((rv % 4) != 0) { 232 if (bootverbose) 233 device_printf(dev, "Malformed reg property\n"); 234 } else if ((rv / 4) != psc->sc_addr_cells) { 235 if (bootverbose) 236 device_printf(dev, "Invalid reg size %u\n", rv); 237 } else 238 sc->sc_reg_valid = true; 239 240 #ifdef __powerpc__ 241 /* 242 * On powerpc, "interrupt-servers" denotes a SMT CPU. Look for any 243 * thread on this CPU, and assign that. 244 */ 245 if (OF_hasprop(node, "ibm,ppc-interrupt-server#s")) { 246 struct cpuref cpuref; 247 cell_t *servers; 248 int i, nservers, rv; 249 250 if ((nservers = OF_getencprop_alloc(node, 251 "ibm,ppc-interrupt-server#s", (void **)&servers)) < 0) 252 return (ENXIO); 253 nservers /= sizeof(cell_t); 254 for (i = 0; i < nservers; i++) { 255 for (rv = platform_smp_first_cpu(&cpuref); rv == 0; 256 rv = platform_smp_next_cpu(&cpuref)) { 257 if (cpuref.cr_hwref == servers[i]) { 258 sc->sc_cpu_pcpu = 259 pcpu_find(cpuref.cr_cpuid); 260 if (sc->sc_cpu_pcpu == NULL) { 261 OF_prop_free(servers); 262 return (ENXIO); 263 } 264 break; 265 } 266 } 267 if (rv != ENOENT) 268 break; 269 } 270 OF_prop_free(servers); 271 if (sc->sc_cpu_pcpu == NULL) { 272 device_printf(dev, "No CPU found for this device.\n"); 273 return (ENXIO); 274 } 275 } else 276 #endif 277 sc->sc_cpu_pcpu = pcpu_find(device_get_unit(dev)); 278 279 if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) < 0) { 280 #ifdef EXT_RESOURCES 281 rv = clk_get_by_ofw_index(dev, 0, 0, &cpuclk); 282 if (rv == 0) { 283 rv = clk_get_freq(cpuclk, &freq); 284 if (rv != 0 && bootverbose) 285 device_printf(dev, 286 "Cannot get freq of property clocks\n"); 287 else 288 sc->sc_nominal_mhz = freq / 1000000; 289 } else 290 #endif 291 { 292 if (bootverbose) 293 device_printf(dev, 294 "missing 'clock-frequency' property\n"); 295 } 296 } else 297 sc->sc_nominal_mhz = cell / 1000000; /* convert to MHz */ 298 299 if (sc->sc_nominal_mhz != 0 && bootverbose) 300 device_printf(dev, "Nominal frequency %dMhz\n", 301 sc->sc_nominal_mhz); 302 bus_generic_probe(dev); 303 return (bus_generic_attach(dev)); 304 } 305 306 static int 307 ofw_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 308 { 309 struct ofw_cpulist_softc *psc; 310 struct ofw_cpu_softc *sc; 311 312 sc = device_get_softc(dev); 313 314 switch (index) { 315 case CPU_IVAR_PCPU: 316 *result = (uintptr_t)sc->sc_cpu_pcpu; 317 return (0); 318 case CPU_IVAR_NOMINAL_MHZ: 319 if (sc->sc_nominal_mhz > 0) { 320 *result = (uintptr_t)sc->sc_nominal_mhz; 321 return (0); 322 } 323 break; 324 case CPU_IVAR_CPUID_SIZE: 325 psc = device_get_softc(device_get_parent(dev)); 326 *result = psc->sc_addr_cells; 327 return (0); 328 case CPU_IVAR_CPUID: 329 if (sc->sc_reg_valid) { 330 *result = (uintptr_t)sc->sc_reg; 331 return (0); 332 } 333 break; 334 } 335 336 return (ENOENT); 337 } 338 339 int 340 ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback, boolean_t only_runnable) 341 { 342 phandle_t node, child; 343 pcell_t addr_cells, reg[2]; 344 char status[16]; 345 char device_type[16]; 346 u_int id, next_id; 347 int count, rv; 348 349 count = 0; 350 id = 0; 351 next_id = 0; 352 353 node = OF_finddevice("/cpus"); 354 if (node == -1) 355 return (-1); 356 357 /* Find the number of cells in the cpu register */ 358 if (OF_getencprop(node, "#address-cells", &addr_cells, 359 sizeof(addr_cells)) < 0) 360 return (-1); 361 362 for (child = OF_child(node); child != 0; child = OF_peer(child), 363 id = next_id) { 364 /* Check if child is a CPU */ 365 memset(device_type, 0, sizeof(device_type)); 366 rv = OF_getprop(child, "device_type", device_type, 367 sizeof(device_type) - 1); 368 if (rv < 0) 369 continue; 370 if (strcmp(device_type, "cpu") != 0) 371 continue; 372 373 /* We're processing CPU, update next_id used in the next iteration */ 374 next_id++; 375 376 /* 377 * If we are filtering by runnable then limit to only 378 * those that have been enabled, or do provide a method 379 * to enable them. 380 */ 381 if (only_runnable) { 382 status[0] = '\0'; 383 OF_getprop(child, "status", status, sizeof(status)); 384 if (status[0] != '\0' && strcmp(status, "okay") != 0 && 385 strcmp(status, "ok") != 0 && 386 !OF_hasprop(child, "enable-method")) 387 continue; 388 } 389 390 /* 391 * Check we have a register to identify the cpu 392 */ 393 rv = OF_getencprop(child, "reg", reg, 394 addr_cells * sizeof(cell_t)); 395 if (rv != addr_cells * sizeof(cell_t)) 396 continue; 397 398 if (callback == NULL || callback(id, child, addr_cells, reg)) 399 count++; 400 } 401 402 return (only_runnable ? count : id); 403 } 404