1 /*- 2 * Copyright (C) 2009 Nathan Whitehorn 3 * Copyright (C) 2015 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Portions of this software were developed by Andrew Turner 7 * under sponsorship from the FreeBSD Foundation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/malloc.h> 39 #include <sys/bus.h> 40 #include <sys/cpu.h> 41 #include <machine/bus.h> 42 43 #include <dev/ofw/openfirm.h> 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/ofw_bus_subr.h> 46 #include <dev/ofw/ofw_cpu.h> 47 48 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__) 49 #include <dev/extres/clk/clk.h> 50 #endif 51 52 static int ofw_cpulist_probe(device_t); 53 static int ofw_cpulist_attach(device_t); 54 static const struct ofw_bus_devinfo *ofw_cpulist_get_devinfo(device_t dev, 55 device_t child); 56 57 static MALLOC_DEFINE(M_OFWCPU, "ofwcpu", "OFW CPU device information"); 58 59 struct ofw_cpulist_softc { 60 pcell_t sc_addr_cells; 61 }; 62 63 static device_method_t ofw_cpulist_methods[] = { 64 /* Device interface */ 65 DEVMETHOD(device_probe, ofw_cpulist_probe), 66 DEVMETHOD(device_attach, ofw_cpulist_attach), 67 68 /* Bus interface */ 69 DEVMETHOD(bus_add_child, bus_generic_add_child), 70 DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo), 71 72 /* ofw_bus interface */ 73 DEVMETHOD(ofw_bus_get_devinfo, ofw_cpulist_get_devinfo), 74 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 75 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 76 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 77 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 78 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t ofw_cpulist_driver = { 84 "cpulist", 85 ofw_cpulist_methods, 86 sizeof(struct ofw_cpulist_softc) 87 }; 88 89 DRIVER_MODULE(ofw_cpulist, ofwbus, ofw_cpulist_driver, 0, 0); 90 91 static int 92 ofw_cpulist_probe(device_t dev) 93 { 94 const char *name; 95 96 name = ofw_bus_get_name(dev); 97 98 if (name == NULL || strcmp(name, "cpus") != 0) 99 return (ENXIO); 100 101 device_set_desc(dev, "Open Firmware CPU Group"); 102 103 return (0); 104 } 105 106 static int 107 ofw_cpulist_attach(device_t dev) 108 { 109 struct ofw_cpulist_softc *sc; 110 phandle_t root, child; 111 device_t cdev; 112 struct ofw_bus_devinfo *dinfo; 113 114 sc = device_get_softc(dev); 115 root = ofw_bus_get_node(dev); 116 117 sc->sc_addr_cells = 1; 118 OF_getencprop(root, "#address-cells", &sc->sc_addr_cells, 119 sizeof(sc->sc_addr_cells)); 120 121 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 122 dinfo = malloc(sizeof(*dinfo), M_OFWCPU, M_WAITOK | M_ZERO); 123 124 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { 125 free(dinfo, M_OFWCPU); 126 continue; 127 } 128 cdev = device_add_child(dev, NULL, -1); 129 if (cdev == NULL) { 130 device_printf(dev, "<%s>: device_add_child failed\n", 131 dinfo->obd_name); 132 ofw_bus_gen_destroy_devinfo(dinfo); 133 free(dinfo, M_OFWCPU); 134 continue; 135 } 136 device_set_ivars(cdev, dinfo); 137 } 138 139 return (bus_generic_attach(dev)); 140 } 141 142 static const struct ofw_bus_devinfo * 143 ofw_cpulist_get_devinfo(device_t dev, device_t child) 144 { 145 return (device_get_ivars(child)); 146 } 147 148 static int ofw_cpu_probe(device_t); 149 static int ofw_cpu_attach(device_t); 150 static int ofw_cpu_read_ivar(device_t dev, device_t child, int index, 151 uintptr_t *result); 152 153 struct ofw_cpu_softc { 154 struct pcpu *sc_cpu_pcpu; 155 uint32_t sc_nominal_mhz; 156 boolean_t sc_reg_valid; 157 pcell_t sc_reg[2]; 158 }; 159 160 static device_method_t ofw_cpu_methods[] = { 161 /* Device interface */ 162 DEVMETHOD(device_probe, ofw_cpu_probe), 163 DEVMETHOD(device_attach, ofw_cpu_attach), 164 165 /* Bus interface */ 166 DEVMETHOD(bus_add_child, bus_generic_add_child), 167 DEVMETHOD(bus_read_ivar, ofw_cpu_read_ivar), 168 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 169 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 170 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 171 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 172 DEVMETHOD(bus_activate_resource,bus_generic_activate_resource), 173 174 DEVMETHOD_END 175 }; 176 177 static driver_t ofw_cpu_driver = { 178 "cpu", 179 ofw_cpu_methods, 180 sizeof(struct ofw_cpu_softc) 181 }; 182 183 DRIVER_MODULE(ofw_cpu, cpulist, ofw_cpu_driver, 0, 0); 184 185 static int 186 ofw_cpu_probe(device_t dev) 187 { 188 const char *type = ofw_bus_get_type(dev); 189 190 if (type == NULL || strcmp(type, "cpu") != 0) 191 return (ENXIO); 192 193 device_set_desc(dev, "Open Firmware CPU"); 194 return (0); 195 } 196 197 static int 198 ofw_cpu_attach(device_t dev) 199 { 200 struct ofw_cpulist_softc *psc; 201 struct ofw_cpu_softc *sc; 202 phandle_t node; 203 pcell_t cell; 204 int rv; 205 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__) 206 clk_t cpuclk; 207 uint64_t freq; 208 #endif 209 210 sc = device_get_softc(dev); 211 psc = device_get_softc(device_get_parent(dev)); 212 213 if (nitems(sc->sc_reg) < psc->sc_addr_cells) { 214 if (bootverbose) 215 device_printf(dev, "Too many address cells\n"); 216 return (EINVAL); 217 } 218 219 node = ofw_bus_get_node(dev); 220 221 /* Read and validate the reg property for use later */ 222 sc->sc_reg_valid = false; 223 rv = OF_getencprop(node, "reg", sc->sc_reg, sizeof(sc->sc_reg)); 224 if (rv < 0) 225 device_printf(dev, "missing 'reg' property\n"); 226 else if ((rv % 4) != 0) { 227 if (bootverbose) 228 device_printf(dev, "Malformed reg property\n"); 229 } else if ((rv / 4) != psc->sc_addr_cells) { 230 if (bootverbose) 231 device_printf(dev, "Invalid reg size %u\n", rv); 232 } else 233 sc->sc_reg_valid = true; 234 235 #ifdef __powerpc__ 236 /* 237 * On powerpc, "interrupt-servers" denotes a SMT CPU. Look for any 238 * thread on this CPU, and assign that. 239 */ 240 if (OF_hasprop(node, "ibm,ppc-interrupt-server#s")) { 241 struct cpuref cpuref; 242 cell_t *servers; 243 int i, nservers, rv; 244 245 if ((nservers = OF_getencprop_alloc(node, 246 "ibm,ppc-interrupt-server#s", (void **)&servers)) < 0) 247 return (ENXIO); 248 nservers /= sizeof(cell_t); 249 for (i = 0; i < nservers; i++) { 250 for (rv = platform_smp_first_cpu(&cpuref); rv == 0; 251 rv = platform_smp_next_cpu(&cpuref)) { 252 if (cpuref.cr_hwref == servers[i]) { 253 sc->sc_cpu_pcpu = 254 pcpu_find(cpuref.cr_cpuid); 255 if (sc->sc_cpu_pcpu == NULL) { 256 OF_prop_free(servers); 257 return (ENXIO); 258 } 259 break; 260 } 261 } 262 if (rv != ENOENT) 263 break; 264 } 265 OF_prop_free(servers); 266 if (sc->sc_cpu_pcpu == NULL) { 267 device_printf(dev, "No CPU found for this device.\n"); 268 return (ENXIO); 269 } 270 } else 271 #endif 272 sc->sc_cpu_pcpu = pcpu_find(device_get_unit(dev)); 273 274 if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) < 0) { 275 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__) 276 rv = clk_get_by_ofw_index(dev, 0, 0, &cpuclk); 277 if (rv == 0) { 278 rv = clk_get_freq(cpuclk, &freq); 279 if (rv != 0 && bootverbose) 280 device_printf(dev, 281 "Cannot get freq of property clocks\n"); 282 else 283 sc->sc_nominal_mhz = freq / 1000000; 284 } else 285 #endif 286 { 287 if (bootverbose) 288 device_printf(dev, 289 "missing 'clock-frequency' property\n"); 290 } 291 } else 292 sc->sc_nominal_mhz = cell / 1000000; /* convert to MHz */ 293 294 if (sc->sc_nominal_mhz != 0 && bootverbose) 295 device_printf(dev, "Nominal frequency %dMhz\n", 296 sc->sc_nominal_mhz); 297 bus_generic_probe(dev); 298 return (bus_generic_attach(dev)); 299 } 300 301 static int 302 ofw_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 303 { 304 struct ofw_cpulist_softc *psc; 305 struct ofw_cpu_softc *sc; 306 307 sc = device_get_softc(dev); 308 309 switch (index) { 310 case CPU_IVAR_PCPU: 311 *result = (uintptr_t)sc->sc_cpu_pcpu; 312 return (0); 313 case CPU_IVAR_NOMINAL_MHZ: 314 if (sc->sc_nominal_mhz > 0) { 315 *result = (uintptr_t)sc->sc_nominal_mhz; 316 return (0); 317 } 318 break; 319 case CPU_IVAR_CPUID_SIZE: 320 psc = device_get_softc(device_get_parent(dev)); 321 *result = psc->sc_addr_cells; 322 return (0); 323 case CPU_IVAR_CPUID: 324 if (sc->sc_reg_valid) { 325 *result = (uintptr_t)sc->sc_reg; 326 return (0); 327 } 328 break; 329 } 330 331 return (ENOENT); 332 } 333 334 int 335 ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback, boolean_t only_runnable) 336 { 337 phandle_t node, child; 338 pcell_t addr_cells, reg[2]; 339 char status[16]; 340 char device_type[16]; 341 u_int id, next_id; 342 int count, rv; 343 344 count = 0; 345 id = 0; 346 next_id = 0; 347 348 node = OF_finddevice("/cpus"); 349 if (node == -1) 350 return (-1); 351 352 /* Find the number of cells in the cpu register */ 353 if (OF_getencprop(node, "#address-cells", &addr_cells, 354 sizeof(addr_cells)) < 0) 355 return (-1); 356 357 for (child = OF_child(node); child != 0; child = OF_peer(child), 358 id = next_id) { 359 /* Check if child is a CPU */ 360 memset(device_type, 0, sizeof(device_type)); 361 rv = OF_getprop(child, "device_type", device_type, 362 sizeof(device_type) - 1); 363 if (rv < 0) 364 continue; 365 if (strcmp(device_type, "cpu") != 0) 366 continue; 367 368 /* We're processing CPU, update next_id used in the next iteration */ 369 next_id++; 370 371 /* 372 * If we are filtering by runnable then limit to only 373 * those that have been enabled, or do provide a method 374 * to enable them. 375 */ 376 if (only_runnable) { 377 status[0] = '\0'; 378 OF_getprop(child, "status", status, sizeof(status)); 379 if (status[0] != '\0' && strcmp(status, "okay") != 0 && 380 strcmp(status, "ok") != 0 && 381 !OF_hasprop(child, "enable-method")) 382 continue; 383 } 384 385 /* 386 * Check we have a register to identify the cpu 387 */ 388 rv = OF_getencprop(child, "reg", reg, 389 addr_cells * sizeof(cell_t)); 390 if (rv != addr_cells * sizeof(cell_t)) 391 continue; 392 393 if (callback == NULL || callback(id, child, addr_cells, reg)) 394 count++; 395 } 396 397 return (only_runnable ? count : id); 398 } 399