xref: /freebsd/sys/dev/neta/if_mvnetavar.h (revision 0957b409a90fd597c1e9124cbaf3edd2b488f4ac)
1 /*
2  * Copyright (c) 2017 Stormshield.
3  * Copyright (c) 2017 Semihalf.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  *
29  */
30 
31 #ifndef _IF_MVNETAVAR_H_
32 #define	_IF_MVNETAVAR_H_
33 #include <net/if.h>
34 
35 #define	MVNETA_HWHEADER_SIZE	2	/* Marvell Header */
36 #define	MVNETA_ETHER_SIZE	22	/* Maximum ether size */
37 #define	MVNETA_MAX_CSUM_MTU	1600	/* Port1,2 hw limit */
38 
39 /*
40  * Limit support for frame up to hw csum limit
41  * until jumbo frame support is added.
42  */
43 #define	MVNETA_MAX_FRAME		(MVNETA_MAX_CSUM_MTU + MVNETA_ETHER_SIZE)
44 
45 /*
46  * Default limit of queue length
47  *
48  * queue 0 is lowest priority and queue 7 is highest priority.
49  * IP packet is received on queue 7 by default.
50  */
51 #define	MVNETA_TX_RING_CNT	512
52 #define	MVNETA_RX_RING_CNT	256
53 
54 #define	MVNETA_BUFRING_SIZE	1024
55 
56 #define	MVNETA_PACKET_OFFSET	64
57 #define	MVNETA_PACKET_SIZE	MCLBYTES
58 
59 #define	MVNETA_RXTH_COUNT	128
60 #define	MVNETA_RX_REFILL_COUNT	8
61 #define	MVNETA_TX_RECLAIM_COUNT	32
62 
63 /*
64  * Device Register access
65  */
66 #define	MVNETA_READ(sc, reg) \
67 	bus_read_4((sc)->res[0], (reg))
68 #define	MVNETA_WRITE(sc, reg, val) \
69 	bus_write_4((sc)->res[0], (reg), (val))
70 
71 #define	MVNETA_READ_REGION(sc, reg, val, c) \
72 	bus_read_region_4((sc)->res[0], (reg), (val), (c))
73 #define	MVNETA_WRITE_REGION(sc, reg, val, c) \
74 	bus_write_region_4((sc)->res[0], (reg), (val), (c))
75 
76 #define	MVNETA_READ_MIB_4(sc, reg) \
77 	bus_read_4((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
78 #define	MVNETA_READ_MIB_8(sc, reg) \
79 	bus_read_8((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
80 
81 #define	MVNETA_IS_LINKUP(sc) \
82 	(MVNETA_READ((sc), MVNETA_PSR) & MVNETA_PSR_LINKUP)
83 
84 #define	MVNETA_IS_QUEUE_SET(queues, q) \
85 	((((queues) >> (q)) & 0x1))
86 
87 /*
88  * EEE: Lower Power Idle config
89  * Default timer is duration of MTU sized frame transmission.
90  * The timer can be negotiated by LLDP protocol, but we have no
91  * support.
92  */
93 #define	MVNETA_LPI_TS		(ETHERMTU * 8 / 1000) /* [us] */
94 #define	MVNETA_LPI_TW		(ETHERMTU * 8 / 1000) /* [us] */
95 #define	MVNETA_LPI_LI		(ETHERMTU * 8 / 1000) /* [us] */
96 
97 /*
98  * DMA Descriptor
99  *
100  * the ethernet device has 8 rx/tx DMA queues. each of queue has its own
101  * decriptor list. descriptors are simply index by counter inside the device.
102  */
103 #define	MVNETA_TX_SEGLIMIT	32
104 
105 #define	MVNETA_QUEUE_IDLE	1
106 #define	MVNETA_QUEUE_WORKING	2
107 #define	MVNETA_QUEUE_DISABLED	3
108 
109 struct mvneta_buf {
110 	struct mbuf *	m;	/* pointer to related mbuf */
111 	bus_dmamap_t	dmap;
112 };
113 
114 struct mvneta_rx_ring {
115 	int				queue_status;
116 	/* Real descriptors array. shared by RxDMA */
117 	struct mvneta_rx_desc		*desc;
118 	bus_dmamap_t			desc_map;
119 	bus_addr_t			desc_pa;
120 
121 	/* Virtual address of the RX buffer */
122 	void 				*rxbuf_virt_addr[MVNETA_RX_RING_CNT];
123 
124 	/* Managment entries for each of descritors */
125 	struct mvneta_buf		rxbuf[MVNETA_RX_RING_CNT];
126 
127 	/* locks */
128 	struct mtx			ring_mtx;
129 
130 	/* Index */
131 	int				dma;
132 	int				cpu;
133 
134 	/* Limit */
135 	int				queue_th_received;
136 	int				queue_th_time; /* [Tclk] */
137 
138 	/* LRO */
139 	struct lro_ctrl			lro;
140 	boolean_t			lro_enabled;
141 	/* Is this queue out of mbuf */
142 	boolean_t			needs_refill;
143 } __aligned(CACHE_LINE_SIZE);
144 
145 struct mvneta_tx_ring {
146 	/* Index of this queue */
147 	int				qidx;
148 	/* IFNET pointer */
149 	struct ifnet			*ifp;
150 	/* Ring buffer for IFNET */
151 	struct buf_ring			*br;
152 	/* Real descriptors array. shared by TxDMA */
153 	struct mvneta_tx_desc		*desc;
154 	bus_dmamap_t			desc_map;
155 	bus_addr_t			desc_pa;
156 
157 	/* Managment entries for each of descritors */
158 	struct mvneta_buf		txbuf[MVNETA_TX_RING_CNT];
159 
160 	/* locks */
161 	struct mtx			ring_mtx;
162 
163 	/* Index */
164 	int				used;
165 	int				dma;
166 	int				cpu;
167 
168 	/* watchdog */
169 #define	MVNETA_WATCHDOG_TXCOMP	(hz / 10) /* 100ms */
170 #define	MVNETA_WATCHDOG	(10 * hz) /* 10s */
171 	int				watchdog_time;
172 	int				queue_status;
173 	boolean_t			queue_hung;
174 
175 	/* Task */
176 	struct task			task;
177 	struct taskqueue		*taskq;
178 
179 	/* Stats */
180 	uint32_t			drv_error;
181 } __aligned(CACHE_LINE_SIZE);
182 
183 static __inline int
184 tx_counter_adv(int ctr, int n)
185 {
186 
187 	ctr += n;
188 	while (__predict_false(ctr >= MVNETA_TX_RING_CNT))
189 		ctr -= MVNETA_TX_RING_CNT;
190 
191 	return (ctr);
192 }
193 
194 static __inline int
195 rx_counter_adv(int ctr, int n)
196 {
197 
198 	ctr += n;
199 	while (__predict_false(ctr >= MVNETA_RX_RING_CNT))
200 		ctr -= MVNETA_RX_RING_CNT;
201 
202 	return (ctr);
203 }
204 
205 /*
206  * Timeout control
207  */
208 #define	MVNETA_PHY_TIMEOUT	10000	/* msec */
209 #define	RX_DISABLE_TIMEOUT	0x1000000 /* times */
210 #define	TX_DISABLE_TIMEOUT	0x1000000 /* times */
211 #define	TX_FIFO_EMPTY_TIMEOUT	0x1000000 /* times */
212 
213 /*
214  * Debug
215  */
216 #define	KASSERT_SC_MTX(sc) \
217     KASSERT(mtx_owned(&(sc)->mtx), ("SC mutex not owned"))
218 #define	KASSERT_BM_MTX(sc) \
219     KASSERT(mtx_owned(&(sc)->bm.bm_mtx), ("BM mutex not owned"))
220 #define	KASSERT_RX_MTX(sc, q) \
221     KASSERT(mtx_owned(&(sc)->rx_ring[(q)].ring_mtx),\
222         ("RX mutex not owned"))
223 #define	KASSERT_TX_MTX(sc, q) \
224     KASSERT(mtx_owned(&(sc)->tx_ring[(q)].ring_mtx),\
225         ("TX mutex not owned"))
226 
227 /*
228  * sysctl(9) parameters
229  */
230 struct mvneta_sysctl_queue {
231 	struct mvneta_softc	*sc;
232 	int			rxtx;
233 	int			queue;
234 };
235 #define	MVNETA_SYSCTL_RX		0
236 #define	MVNETA_SYSCTL_TX		1
237 
238 struct mvneta_sysctl_mib {
239 	struct mvneta_softc	*sc;
240 	int			index;
241 	uint64_t		counter;
242 };
243 
244 enum mvneta_phy_mode {
245 	MVNETA_PHY_QSGMII,
246 	MVNETA_PHY_SGMII,
247 	MVNETA_PHY_RGMII,
248 	MVNETA_PHY_RGMII_ID
249 };
250 
251 /*
252  * Ethernet Device main context
253  */
254 DECLARE_CLASS(mvneta_driver);
255 
256 struct mvneta_softc {
257 	device_t	dev;
258 	uint32_t	version;
259 	/*
260 	 * mtx must be held by interface functions to/from
261 	 * other frameworks. interrupt hander, sysctl hander,
262 	 * ioctl hander, and so on.
263 	 */
264 	struct mtx	mtx;
265 	struct resource *res[2];
266 	void            *ih_cookie[1];
267 
268 	struct ifnet	*ifp;
269 	uint32_t        mvneta_if_flags;
270 	uint32_t        mvneta_media;
271 
272 	int			phy_attached;
273 	enum mvneta_phy_mode	phy_mode;
274 	int			phy_addr;
275 	int			phy_speed;	/* PHY speed */
276 	boolean_t		phy_fdx;	/* Full duplex mode */
277 	boolean_t		autoneg;	/* Autonegotiation status */
278 	boolean_t		use_inband_status;	/* In-band link status */
279 
280 	/*
281 	 * Link State control
282 	 */
283 	boolean_t	linkup;
284         device_t        miibus;
285 	struct mii_data *mii;
286 	uint8_t		enaddr[ETHER_ADDR_LEN];
287 	struct ifmedia	mvneta_ifmedia;
288 
289 	bus_dma_tag_t	rx_dtag;
290 	bus_dma_tag_t	rxbuf_dtag;
291 	bus_dma_tag_t	tx_dtag;
292 	bus_dma_tag_t	txmbuf_dtag;
293 	struct mvneta_rx_ring		rx_ring[MVNETA_RX_QNUM_MAX];
294 	struct mvneta_tx_ring		tx_ring[MVNETA_TX_QNUM_MAX];
295 
296 	/*
297 	 * Maintance clock
298 	 */
299 	struct callout		tick_ch;
300 
301 	int cf_lpi;
302 	int cf_fc;
303 	int debug;
304 
305 	/*
306 	 * Sysctl interfaces
307 	 */
308 	struct mvneta_sysctl_queue sysctl_rx_queue[MVNETA_RX_QNUM_MAX];
309 	struct mvneta_sysctl_queue sysctl_tx_queue[MVNETA_TX_QNUM_MAX];
310 
311 	/*
312 	 * MIB counter
313 	 */
314 	struct mvneta_sysctl_mib sysctl_mib[MVNETA_PORTMIB_NOCOUNTER];
315 	uint64_t counter_pdfc;
316 	uint64_t counter_pofc;
317 	uint32_t counter_watchdog;		/* manual reset when clearing mib */
318 	uint32_t counter_watchdog_mib;	/* reset after each mib update */
319 };
320 #define	MVNETA_RX_RING(sc, q) \
321     (&(sc)->rx_ring[(q)])
322 #define	MVNETA_TX_RING(sc, q) \
323     (&(sc)->tx_ring[(q)])
324 
325 int mvneta_attach(device_t);
326 
327 #ifdef FDT
328 int mvneta_fdt_mac_address(struct mvneta_softc *, uint8_t *);
329 #endif
330 
331 #endif /* _IF_MVNETAVAR_H_ */
332