1 /*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-3-Clause 6 * 7 * Copyright (c) 2000, 2001 by Greg Ansley 8 * Partially derived from Matt Jacob's ISP driver. 9 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 10 * Feral Software 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice immediately at the beginning of the file, without modification, 18 * this list of conditions, and the following disclaimer. 19 * 2. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /*- 35 * Copyright (c) 2002, 2006 by Matthew Jacob 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions are 40 * met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 44 * substantially similar to the "NO WARRANTY" disclaimer below 45 * ("Disclaimer") and any redistribution must be conditioned upon including 46 * a substantially similar Disclaimer requirement for further binary 47 * redistribution. 48 * 3. Neither the names of the above listed copyright holders nor the names 49 * of any contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 53 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 56 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 62 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 * 64 * Support from Chris Ellsworth in order to make SAS adapters work 65 * is gratefully acknowledged. 66 * 67 * Support from LSI-Logic has also gone a great deal toward making this a 68 * workable subsystem and is gratefully acknowledged. 69 */ 70 /* 71 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 72 * Copyright (c) 2005, WHEEL Sp. z o.o. 73 * Copyright (c) 2004, 2005 Justin T. Gibbs 74 * All rights reserved. 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 79 * 1. Redistributions of source code must retain the above copyright 80 * notice, this list of conditions and the following disclaimer. 81 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 82 * substantially similar to the "NO WARRANTY" disclaimer below 83 * ("Disclaimer") and any redistribution must be conditioned upon including 84 * a substantially similar Disclaimer requirement for further binary 85 * redistribution. 86 * 3. Neither the names of the above listed copyright holders nor the names 87 * of any contributors may be used to endorse or promote products derived 88 * from this software without specific prior written permission. 89 * 90 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 91 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 92 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 93 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 94 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 95 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 96 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 97 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 98 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 99 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 100 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 101 */ 102 103 #include <sys/cdefs.h> 104 __FBSDID("$FreeBSD$"); 105 106 #include <dev/mpt/mpt.h> 107 #include <dev/mpt/mpt_cam.h> 108 #include <dev/mpt/mpt_raid.h> 109 110 /* 111 * XXX it seems no other MPT driver knows about the following chips. 112 */ 113 114 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB 115 #define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620 116 #endif 117 118 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 119 #define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625 120 #endif 121 122 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 123 #define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623 124 #endif 125 126 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 127 #define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627 128 #endif 129 130 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 131 #define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629 132 #endif 133 134 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 135 #define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055 136 #endif 137 138 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 139 #define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059 140 #endif 141 142 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 143 #define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C 144 #endif 145 146 static int mpt_pci_probe(device_t); 147 static int mpt_pci_attach(device_t); 148 static void mpt_free_bus_resources(struct mpt_softc *mpt); 149 static int mpt_pci_detach(device_t); 150 static int mpt_pci_shutdown(device_t); 151 static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 152 static void mpt_dma_mem_free(struct mpt_softc *mpt); 153 #if 0 154 static void mpt_read_config_regs(struct mpt_softc *mpt); 155 static void mpt_set_config_regs(struct mpt_softc *mpt); 156 #endif 157 static void mpt_pci_intr(void *); 158 159 static device_method_t mpt_methods[] = { 160 /* Device interface */ 161 DEVMETHOD(device_probe, mpt_pci_probe), 162 DEVMETHOD(device_attach, mpt_pci_attach), 163 DEVMETHOD(device_detach, mpt_pci_detach), 164 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 165 DEVMETHOD_END 166 }; 167 168 static driver_t mpt_driver = { 169 "mpt", mpt_methods, sizeof(struct mpt_softc) 170 }; 171 172 static devclass_t mpt_devclass; 173 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL); 174 MODULE_DEPEND(mpt, pci, 1, 1, 1); 175 MODULE_VERSION(mpt, 1); 176 177 static int 178 mpt_pci_probe(device_t dev) 179 { 180 const char *desc; 181 int rval; 182 183 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC) 184 return (ENXIO); 185 186 rval = BUS_PROBE_DEFAULT; 187 switch (pci_get_device(dev)) { 188 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 189 desc = "LSILogic FC909 FC Adapter"; 190 break; 191 case MPI_MANUFACTPAGE_DEVICEID_FC909: 192 desc = "LSILogic FC909A FC Adapter"; 193 break; 194 case MPI_MANUFACTPAGE_DEVICEID_FC919: 195 desc = "LSILogic FC919 FC Adapter"; 196 break; 197 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 198 desc = "LSILogic FC919 LAN Adapter"; 199 break; 200 case MPI_MANUFACTPAGE_DEVICEID_FC929: 201 desc = "Dual LSILogic FC929 FC Adapter"; 202 break; 203 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 204 desc = "Dual LSILogic FC929 LAN Adapter"; 205 break; 206 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 207 desc = "LSILogic FC919 FC PCI-X Adapter"; 208 break; 209 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 210 desc = "LSILogic FC919 LAN PCI-X Adapter"; 211 break; 212 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 213 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 214 break; 215 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 216 desc = "Dual LSILogic FC929X LAN PCI-X Adapter"; 217 break; 218 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 219 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 220 break; 221 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 222 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 223 break; 224 case MPI_MANUFACTPAGE_DEVID_53C1030: 225 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 226 desc = "LSILogic 1030 Ultra4 Adapter"; 227 break; 228 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 229 /* 230 * Allow mfi(4) to claim this device in case it's in MegaRAID 231 * mode. 232 */ 233 rval = BUS_PROBE_LOW_PRIORITY; 234 /* FALLTHROUGH */ 235 case MPI_MANUFACTPAGE_DEVID_SAS1064: 236 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 237 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 238 case MPI_MANUFACTPAGE_DEVID_SAS1066: 239 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 240 case MPI_MANUFACTPAGE_DEVID_SAS1068: 241 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 242 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 243 case MPI_MANUFACTPAGE_DEVID_SAS1078: 244 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 245 desc = "LSILogic SAS/SATA Adapter"; 246 break; 247 default: 248 return (ENXIO); 249 } 250 251 device_set_desc(dev, desc); 252 return (rval); 253 } 254 255 static void 256 mpt_set_options(struct mpt_softc *mpt) 257 { 258 int tval; 259 260 tval = 0; 261 if (resource_int_value(device_get_name(mpt->dev), 262 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 263 mpt->verbose = tval; 264 } 265 tval = -1; 266 if (resource_int_value(device_get_name(mpt->dev), 267 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 268 tval <= 3) { 269 mpt->cfg_role = tval; 270 mpt->do_cfg_role = 1; 271 } 272 tval = 0; 273 mpt->msi_enable = 0; 274 if (mpt->is_sas) 275 mpt->msi_enable = 1; 276 if (resource_int_value(device_get_name(mpt->dev), 277 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) { 278 mpt->msi_enable = tval; 279 } 280 } 281 282 #if 0 283 static void 284 mpt_link_peer(struct mpt_softc *mpt) 285 { 286 struct mpt_softc *mpt2; 287 288 if (mpt->unit == 0) { 289 return; 290 } 291 /* 292 * XXX: depends on probe order 293 */ 294 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 295 296 if (mpt2 == NULL) { 297 return; 298 } 299 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 300 return; 301 } 302 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 303 return; 304 } 305 mpt->mpt2 = mpt2; 306 mpt2->mpt2 = mpt; 307 if (mpt->verbose >= MPT_PRT_DEBUG) { 308 mpt_prt(mpt, "linking with peer (mpt%d)\n", 309 device_get_unit(mpt2->dev)); 310 } 311 } 312 313 static void 314 mpt_unlink_peer(struct mpt_softc *mpt) 315 { 316 317 if (mpt->mpt2) { 318 mpt->mpt2->mpt2 = NULL; 319 } 320 } 321 #endif 322 323 static int 324 mpt_pci_attach(device_t dev) 325 { 326 struct mpt_softc *mpt; 327 int iqd; 328 uint32_t val; 329 int mpt_io_bar, mpt_mem_bar; 330 331 mpt = (struct mpt_softc*)device_get_softc(dev); 332 333 switch (pci_get_device(dev)) { 334 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 335 case MPI_MANUFACTPAGE_DEVICEID_FC909: 336 case MPI_MANUFACTPAGE_DEVICEID_FC919: 337 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 338 case MPI_MANUFACTPAGE_DEVICEID_FC929: 339 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 340 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 341 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 342 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 343 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 344 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 345 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 346 mpt->is_fc = 1; 347 break; 348 case MPI_MANUFACTPAGE_DEVID_SAS1078: 349 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 350 mpt->is_1078 = 1; 351 /* FALLTHROUGH */ 352 case MPI_MANUFACTPAGE_DEVID_SAS1064: 353 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 354 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 355 case MPI_MANUFACTPAGE_DEVID_SAS1066: 356 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 357 case MPI_MANUFACTPAGE_DEVID_SAS1068: 358 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 359 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 360 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 361 mpt->is_sas = 1; 362 break; 363 default: 364 mpt->is_spi = 1; 365 break; 366 } 367 mpt->dev = dev; 368 mpt->unit = device_get_unit(dev); 369 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 370 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 371 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 372 mpt->verbose = MPT_PRT_NONE; 373 mpt->role = MPT_ROLE_NONE; 374 mpt->mpt_ini_id = MPT_INI_ID_NONE; 375 mpt_set_options(mpt); 376 if (mpt->verbose == MPT_PRT_NONE) { 377 mpt->verbose = MPT_PRT_WARN; 378 /* Print INFO level (if any) if bootverbose is set */ 379 mpt->verbose += (bootverbose != 0)? 1 : 0; 380 } 381 382 /* 383 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 384 */ 385 val = pci_read_config(dev, PCIR_COMMAND, 2); 386 val |= PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 387 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 388 pci_write_config(dev, PCIR_COMMAND, val, 2); 389 390 /* 391 * Make sure we've disabled the ROM. 392 */ 393 val = pci_read_config(dev, PCIR_BIOS, 4); 394 val &= ~PCIM_BIOS_ENABLE; 395 pci_write_config(dev, PCIR_BIOS, val, 4); 396 397 #if 0 398 /* 399 * Is this part a dual? 400 * If so, link with our partner (around yet) 401 */ 402 switch (pci_get_device(dev)) { 403 case MPI_MANUFACTPAGE_DEVICEID_FC929: 404 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 405 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 406 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 407 case MPI_MANUFACTPAGE_DEVID_53C1030: 408 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 409 mpt_link_peer(mpt); 410 break; 411 default: 412 break; 413 } 414 #endif 415 416 /* 417 * Figure out which are the I/O and MEM Bars 418 */ 419 val = pci_read_config(dev, PCIR_BAR(0), 4); 420 if (PCI_BAR_IO(val)) { 421 /* BAR0 is IO, BAR1 is memory */ 422 mpt_io_bar = 0; 423 mpt_mem_bar = 1; 424 } else { 425 /* BAR0 is memory, BAR1 is IO */ 426 mpt_mem_bar = 0; 427 mpt_io_bar = 1; 428 } 429 430 /* 431 * Set up register access. PIO mode is required for 432 * certain reset operations (but must be disabled for 433 * some cards otherwise). 434 */ 435 mpt_io_bar = PCIR_BAR(mpt_io_bar); 436 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 437 &mpt_io_bar, RF_ACTIVE); 438 if (mpt->pci_pio_reg == NULL) { 439 if (bootverbose) { 440 device_printf(dev, 441 "unable to map registers in PIO mode\n"); 442 } 443 } else { 444 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 445 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 446 } 447 448 mpt_mem_bar = PCIR_BAR(mpt_mem_bar); 449 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 450 &mpt_mem_bar, RF_ACTIVE); 451 if (mpt->pci_reg == NULL) { 452 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) { 453 device_printf(dev, 454 "Unable to memory map registers.\n"); 455 } 456 if (mpt->is_sas || mpt->pci_pio_reg == NULL) { 457 device_printf(dev, "Giving Up.\n"); 458 goto bad; 459 } 460 if (bootverbose) { 461 device_printf(dev, "Falling back to PIO mode.\n"); 462 } 463 mpt->pci_st = mpt->pci_pio_st; 464 mpt->pci_sh = mpt->pci_pio_sh; 465 } else { 466 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 467 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 468 } 469 470 /* Get a handle to the interrupt */ 471 iqd = 0; 472 if (mpt->msi_enable) { 473 /* 474 * First try to alloc an MSI-X message. If that 475 * fails, then try to alloc an MSI message instead. 476 */ 477 val = 1; 478 if (pci_alloc_msix(dev, &val) == 0) 479 iqd = 1; 480 val = 1; 481 if (iqd == 0 && pci_alloc_msi(dev, &val) == 0) 482 iqd = 1; 483 } 484 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 485 RF_ACTIVE | (iqd != 0 ? 0 : RF_SHAREABLE)); 486 if (mpt->pci_irq == NULL) { 487 device_printf(dev, "could not allocate interrupt\n"); 488 goto bad; 489 } 490 491 MPT_LOCK_SETUP(mpt); 492 493 /* Disable interrupts at the part */ 494 mpt_disable_ints(mpt); 495 496 /* Register the interrupt handler */ 497 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr, 498 mpt, &mpt->ih)) { 499 device_printf(dev, "could not setup interrupt\n"); 500 goto bad; 501 } 502 503 /* Allocate dma memory */ 504 if (mpt_dma_mem_alloc(mpt)) { 505 mpt_prt(mpt, "Could not allocate DMA memory\n"); 506 goto bad; 507 } 508 509 #if 0 510 /* 511 * Save the PCI config register values 512 * 513 * Hard resets are known to screw up the BAR for diagnostic 514 * memory accesses (Mem1). 515 * 516 * Using Mem1 is known to make the chip stop responding to 517 * configuration space transfers, so we need to save it now 518 */ 519 520 mpt_read_config_regs(mpt); 521 #endif 522 523 /* 524 * Disable PIO until we need it 525 */ 526 if (mpt->is_sas) { 527 pci_disable_io(dev, SYS_RES_IOPORT); 528 } 529 530 /* Initialize the hardware */ 531 if (mpt->disabled == 0) { 532 if (mpt_attach(mpt) != 0) { 533 goto bad; 534 } 535 } else { 536 mpt_prt(mpt, "device disabled at user request\n"); 537 goto bad; 538 } 539 540 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 541 dev, SHUTDOWN_PRI_LAST); 542 543 if (mpt->eh == NULL) { 544 mpt_prt(mpt, "shutdown event registration failed\n"); 545 mpt_disable_ints(mpt); 546 (void) mpt_detach(mpt); 547 mpt_reset(mpt, /*reinit*/FALSE); 548 mpt_raid_free_mem(mpt); 549 goto bad; 550 } 551 return (0); 552 553 bad: 554 mpt_dma_mem_free(mpt); 555 mpt_free_bus_resources(mpt); 556 #if 0 557 mpt_unlink_peer(mpt); 558 #endif 559 560 MPT_LOCK_DESTROY(mpt); 561 562 /* 563 * but return zero to preserve unit numbering 564 */ 565 return (0); 566 } 567 568 /* 569 * Free bus resources 570 */ 571 static void 572 mpt_free_bus_resources(struct mpt_softc *mpt) 573 { 574 575 if (mpt->ih) { 576 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 577 mpt->ih = NULL; 578 } 579 580 if (mpt->pci_irq) { 581 bus_release_resource(mpt->dev, SYS_RES_IRQ, 582 rman_get_rid(mpt->pci_irq), mpt->pci_irq); 583 pci_release_msi(mpt->dev); 584 mpt->pci_irq = NULL; 585 } 586 587 if (mpt->pci_pio_reg) { 588 bus_release_resource(mpt->dev, SYS_RES_IOPORT, 589 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg); 590 mpt->pci_pio_reg = NULL; 591 } 592 593 if (mpt->pci_reg) { 594 bus_release_resource(mpt->dev, SYS_RES_MEMORY, 595 rman_get_rid(mpt->pci_reg), mpt->pci_reg); 596 mpt->pci_reg = NULL; 597 } 598 } 599 600 /* 601 * Disconnect ourselves from the system. 602 */ 603 static int 604 mpt_pci_detach(device_t dev) 605 { 606 struct mpt_softc *mpt; 607 608 mpt = (struct mpt_softc*)device_get_softc(dev); 609 610 if (mpt) { 611 mpt_disable_ints(mpt); 612 mpt_detach(mpt); 613 mpt_reset(mpt, /*reinit*/FALSE); 614 mpt_raid_free_mem(mpt); 615 mpt_dma_mem_free(mpt); 616 mpt_free_bus_resources(mpt); 617 #if 0 618 mpt_unlink_peer(mpt); 619 #endif 620 if (mpt->eh != NULL) { 621 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh); 622 } 623 MPT_LOCK_DESTROY(mpt); 624 } 625 return(0); 626 } 627 628 /* 629 * Disable the hardware 630 */ 631 static int 632 mpt_pci_shutdown(device_t dev) 633 { 634 struct mpt_softc *mpt; 635 636 mpt = (struct mpt_softc *)device_get_softc(dev); 637 if (mpt) 638 return (mpt_shutdown(mpt)); 639 return(0); 640 } 641 642 static int 643 mpt_dma_mem_alloc(struct mpt_softc *mpt) 644 { 645 size_t len; 646 struct mpt_map_info mi; 647 648 /* Check if we alreay have allocated the reply memory */ 649 if (mpt->reply_phys != 0) { 650 return 0; 651 } 652 653 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 654 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 655 656 /* 657 * Create a parent dma tag for this device. 658 * 659 * Align at byte boundaries, 660 * Limit to 32-bit addressing for request/reply queues. 661 */ 662 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 663 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 664 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 665 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 666 /*nsegments*/BUS_SPACE_UNRESTRICTED, 667 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, 668 &mpt->parent_dmat) != 0) { 669 mpt_prt(mpt, "cannot create parent dma tag\n"); 670 return (1); 671 } 672 673 /* Create a child tag for reply buffers */ 674 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 675 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 676 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 677 &mpt->reply_dmat) != 0) { 678 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 679 return (1); 680 } 681 682 /* Allocate some DMA accessible memory for replies */ 683 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 684 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 685 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 686 (u_long) (2 * PAGE_SIZE)); 687 return (1); 688 } 689 690 mi.mpt = mpt; 691 mi.error = 0; 692 693 /* Load and lock it into "bus space" */ 694 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 695 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 696 697 if (mi.error) { 698 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 699 mi.error); 700 return (1); 701 } 702 mpt->reply_phys = mi.phys; 703 704 return (0); 705 } 706 707 /* Deallocate memory that was allocated by mpt_dma_mem_alloc 708 */ 709 static void 710 mpt_dma_mem_free(struct mpt_softc *mpt) 711 { 712 713 /* Make sure we aren't double destroying */ 714 if (mpt->reply_dmat == 0) { 715 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 716 return; 717 } 718 719 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 720 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 721 bus_dma_tag_destroy(mpt->reply_dmat); 722 bus_dma_tag_destroy(mpt->parent_dmat); 723 mpt->reply_dmat = NULL; 724 free(mpt->request_pool, M_DEVBUF); 725 mpt->request_pool = NULL; 726 } 727 728 #if 0 729 /* Reads modifiable (via PCI transactions) config registers */ 730 static void 731 mpt_read_config_regs(struct mpt_softc *mpt) 732 { 733 734 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 735 mpt->pci_cfg.LatencyTimer_LineSize = 736 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 737 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 738 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 739 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 740 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 741 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 742 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 743 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 744 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 745 } 746 747 /* Sets modifiable config registers */ 748 static void 749 mpt_set_config_regs(struct mpt_softc *mpt) 750 { 751 uint32_t val; 752 753 #define MPT_CHECK(reg, offset, size) \ 754 val = pci_read_config(mpt->dev, offset, size); \ 755 if (mpt->pci_cfg.reg != val) { \ 756 mpt_prt(mpt, \ 757 "Restoring " #reg " to 0x%X from 0x%X\n", \ 758 mpt->pci_cfg.reg, val); \ 759 } 760 761 if (mpt->verbose >= MPT_PRT_DEBUG) { 762 MPT_CHECK(Command, PCIR_COMMAND, 2); 763 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 764 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 765 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 766 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 767 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 768 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 769 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 770 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 771 MPT_CHECK(PMCSR, 0x44, 4); 772 } 773 #undef MPT_CHECK 774 775 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 776 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 777 mpt->pci_cfg.LatencyTimer_LineSize, 2); 778 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 779 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 780 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 781 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 782 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 783 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 784 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 785 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 786 } 787 #endif 788 789 static void 790 mpt_pci_intr(void *arg) 791 { 792 struct mpt_softc *mpt; 793 794 mpt = (struct mpt_softc *)arg; 795 MPT_LOCK(mpt); 796 mpt_intr(mpt); 797 MPT_UNLOCK(mpt); 798 } 799