1 /* 2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef MLX4_CQ_H 34 #define MLX4_CQ_H 35 36 #include <linux/types.h> 37 38 #include <dev/mlx4/device.h> 39 #include <dev/mlx4/doorbell.h> 40 41 struct mlx4_cqe { 42 __be32 vlan_my_qpn; 43 __be32 immed_rss_invalid; 44 __be32 g_mlpath_rqpn; 45 __be16 sl_vid; 46 union { 47 struct { 48 __be16 rlid; 49 __be16 status; 50 u8 ipv6_ext_mask; 51 u8 badfcs_enc; 52 }; 53 u8 smac[ETH_ALEN]; 54 }; 55 __be32 byte_cnt; 56 __be16 wqe_index; 57 __be16 checksum; 58 u8 reserved[3]; 59 u8 owner_sr_opcode; 60 }; 61 62 struct mlx4_err_cqe { 63 __be32 my_qpn; 64 u32 reserved1[5]; 65 __be16 wqe_index; 66 u8 vendor_err_syndrome; 67 u8 syndrome; 68 u8 reserved2[3]; 69 u8 owner_sr_opcode; 70 }; 71 72 struct mlx4_ts_cqe { 73 __be32 vlan_my_qpn; 74 __be32 immed_rss_invalid; 75 __be32 g_mlpath_rqpn; 76 __be32 timestamp_hi; 77 __be16 status; 78 u8 ipv6_ext_mask; 79 u8 badfcs_enc; 80 __be32 byte_cnt; 81 __be16 wqe_index; 82 __be16 checksum; 83 u8 reserved; 84 __be16 timestamp_lo; 85 u8 owner_sr_opcode; 86 } __packed; 87 88 enum { 89 MLX4_CQE_L2_TUNNEL_IPOK = 1U << 31, 90 MLX4_CQE_CVLAN_PRESENT_MASK = 1 << 29, 91 MLX4_CQE_SVLAN_PRESENT_MASK = 1 << 30, 92 MLX4_CQE_L2_TUNNEL = 1 << 27, 93 MLX4_CQE_L2_TUNNEL_CSUM = 1 << 26, 94 MLX4_CQE_L2_TUNNEL_IPV4 = 1 << 25, 95 96 MLX4_CQE_QPN_MASK = 0xffffff, 97 MLX4_CQE_VID_MASK = 0xfff, 98 }; 99 100 enum { 101 MLX4_CQE_OWNER_MASK = 0x80, 102 MLX4_CQE_IS_SEND_MASK = 0x40, 103 MLX4_CQE_OPCODE_MASK = 0x1f 104 }; 105 106 enum { 107 MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR = 0x01, 108 MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR = 0x02, 109 MLX4_CQE_SYNDROME_LOCAL_PROT_ERR = 0x04, 110 MLX4_CQE_SYNDROME_WR_FLUSH_ERR = 0x05, 111 MLX4_CQE_SYNDROME_MW_BIND_ERR = 0x06, 112 MLX4_CQE_SYNDROME_BAD_RESP_ERR = 0x10, 113 MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR = 0x11, 114 MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR = 0x12, 115 MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR = 0x13, 116 MLX4_CQE_SYNDROME_REMOTE_OP_ERR = 0x14, 117 MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR = 0x15, 118 MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR = 0x16, 119 MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR = 0x22, 120 }; 121 122 enum { 123 MLX4_CQE_STATUS_IPV4 = 1 << 6, 124 MLX4_CQE_STATUS_IPV4F = 1 << 7, 125 MLX4_CQE_STATUS_IPV6 = 1 << 8, 126 MLX4_CQE_STATUS_IPV4OPT = 1 << 9, 127 MLX4_CQE_STATUS_TCP = 1 << 10, 128 MLX4_CQE_STATUS_UDP = 1 << 11, 129 MLX4_CQE_STATUS_IPOK = 1 << 12, 130 }; 131 132 enum { 133 MLX4_CQE_LLC = 1, 134 MLX4_CQE_SNAP = 1 << 1, 135 MLX4_CQE_BAD_FCS = 1 << 4, 136 }; 137 138 static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd, 139 u8 __iomem *uar_page, 140 spinlock_t *doorbell_lock) 141 { 142 __be32 doorbell[2]; 143 u32 sn; 144 u32 ci; 145 146 sn = cq->arm_sn & 3; 147 ci = cq->cons_index & 0xffffff; 148 149 *cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci); 150 151 /* 152 * Make sure that the doorbell record in host memory is 153 * written before ringing the doorbell via PCI MMIO. 154 */ 155 wmb(); 156 157 doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn); 158 doorbell[1] = cpu_to_be32(ci); 159 160 mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock); 161 } 162 163 static inline void mlx4_cq_set_ci(struct mlx4_cq *cq) 164 { 165 *cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff); 166 } 167 168 enum { 169 MLX4_CQ_DB_REQ_NOT_SOL = 1 << 24, 170 MLX4_CQ_DB_REQ_NOT = 2 << 24 171 }; 172 173 int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq, 174 u16 count, u16 period); 175 int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq, 176 int entries, struct mlx4_mtt *mtt); 177 178 #endif /* MLX4_CQ_H */ 179