xref: /freebsd/sys/dev/mii/nsphy.c (revision d91f8db5f1822c43cd256f19aae1d059e4b25a26)
1 /*	$NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $	*/
2 
3 /*-
4  * SPDX-License-Identifier: BSD-2-Clause
5  *
6  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
7  * All rights reserved.
8  *
9  * This code is derived from software contributed to The NetBSD Foundation
10  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
11  * NASA Ames Research Center.
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32  * POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 /*-
36  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
37  *
38  * Redistribution and use in source and binary forms, with or without
39  * modification, are permitted provided that the following conditions
40  * are met:
41  * 1. Redistributions of source code must retain the above copyright
42  *    notice, this list of conditions and the following disclaimer.
43  * 2. Redistributions in binary form must reproduce the above copyright
44  *    notice, this list of conditions and the following disclaimer in the
45  *    documentation and/or other materials provided with the distribution.
46  *
47  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57  */
58 
59 #include <sys/cdefs.h>
60 __FBSDID("$FreeBSD$");
61 
62 /*
63  * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
64  * Data Sheet available from www.national.com
65  */
66 
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/kernel.h>
70 #include <sys/socket.h>
71 #include <sys/errno.h>
72 #include <sys/module.h>
73 #include <sys/bus.h>
74 
75 #include <net/if.h>
76 #include <net/if_var.h>
77 #include <net/if_media.h>
78 
79 #include <dev/mii/mii.h>
80 #include <dev/mii/miivar.h>
81 #include "miidevs.h"
82 
83 #include <dev/mii/nsphyreg.h>
84 
85 #include "miibus_if.h"
86 
87 static int nsphy_probe(device_t);
88 static int nsphy_attach(device_t);
89 
90 static device_method_t nsphy_methods[] = {
91 	/* device interface */
92 	DEVMETHOD(device_probe,		nsphy_probe),
93 	DEVMETHOD(device_attach,	nsphy_attach),
94 	DEVMETHOD(device_detach,	mii_phy_detach),
95 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
96 	DEVMETHOD_END
97 };
98 
99 static driver_t nsphy_driver = {
100 	"nsphy",
101 	nsphy_methods,
102 	sizeof(struct mii_softc)
103 };
104 
105 DRIVER_MODULE(nsphy, miibus, nsphy_driver, 0, 0);
106 
107 static int	nsphy_service(struct mii_softc *, struct mii_data *, int);
108 static void	nsphy_status(struct mii_softc *);
109 static void	nsphy_reset(struct mii_softc *);
110 
111 static const struct mii_phydesc nsphys[] = {
112 	MII_PHY_DESC(xxNATSEMI, DP83840),
113 	MII_PHY_END
114 };
115 
116 static const struct mii_phy_funcs nsphy_funcs = {
117 	nsphy_service,
118 	nsphy_status,
119 	nsphy_reset
120 };
121 
122 static int
123 nsphy_probe(device_t dev)
124 {
125 
126 	return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT));
127 }
128 
129 static int
130 nsphy_attach(device_t dev)
131 {
132 
133 	mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &nsphy_funcs, 1);
134 	return (0);
135 }
136 
137 static int
138 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
139 {
140 	int reg;
141 
142 	switch (cmd) {
143 	case MII_POLLSTAT:
144 		break;
145 
146 	case MII_MEDIACHG:
147 		reg = PHY_READ(sc, MII_NSPHY_PCR);
148 
149 		/*
150 		 * Set up the PCR to use LED4 to indicate full-duplex
151 		 * in both 10baseT and 100baseTX modes.
152 		 */
153 		reg |= PCR_LED4MODE;
154 
155 		/*
156 		 * Make sure Carrier Integrity Monitor function is
157 		 * disabled (normal for Node operation, but sometimes
158 		 * it's not set?!)
159 		 */
160 		reg |= PCR_CIMDIS;
161 
162 		/*
163 		 * Make sure "force link good" is set to normal mode.
164 		 * It's only intended for debugging.
165 		 */
166 		reg |= PCR_FLINK100;
167 
168 		/*
169 		 * Mystery bits which are supposedly `reserved',
170 		 * but we seem to need to set them when the PHY
171 		 * is connected to some interfaces:
172 		 *
173 		 * 0x0400 is needed for fxp
174 		 *        (Intel EtherExpress Pro 10+/100B, 82557 chip)
175 		 *        (nsphy with a DP83840 chip)
176 		 * 0x0100 may be needed for some other card
177 		 */
178 		reg |= 0x0100 | 0x0400;
179 
180 		if (mii_phy_mac_match(sc, "fxp"))
181 			PHY_WRITE(sc, MII_NSPHY_PCR, reg);
182 
183 		mii_phy_setmedia(sc);
184 		break;
185 
186 	case MII_TICK:
187 		if (mii_phy_tick(sc) == EJUSTRETURN)
188 			return (0);
189 		break;
190 	}
191 
192 	/* Update the media status. */
193 	PHY_STATUS(sc);
194 
195 	/* Callback if something changed. */
196 	mii_phy_update(sc, cmd);
197 	return (0);
198 }
199 
200 static void
201 nsphy_status(struct mii_softc *sc)
202 {
203 	struct mii_data *mii = sc->mii_pdata;
204 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
205 	int bmsr, bmcr, par, anlpar;
206 
207 	mii->mii_media_status = IFM_AVALID;
208 	mii->mii_media_active = IFM_ETHER;
209 
210 	bmsr = PHY_READ(sc, MII_BMSR) |
211 	    PHY_READ(sc, MII_BMSR);
212 	if (bmsr & BMSR_LINK)
213 		mii->mii_media_status |= IFM_ACTIVE;
214 
215 	bmcr = PHY_READ(sc, MII_BMCR);
216 	if (bmcr & BMCR_ISO) {
217 		mii->mii_media_active |= IFM_NONE;
218 		mii->mii_media_status = 0;
219 		return;
220 	}
221 
222 	if (bmcr & BMCR_LOOP)
223 		mii->mii_media_active |= IFM_LOOP;
224 
225 	if (bmcr & BMCR_AUTOEN) {
226 		/*
227 		 * The PAR status bits are only valid if autonegotiation
228 		 * has completed (or it's disabled).
229 		 */
230 		if ((bmsr & BMSR_ACOMP) == 0) {
231 			/* Erg, still trying, I guess... */
232 			mii->mii_media_active |= IFM_NONE;
233 			return;
234 		}
235 
236 		/*
237 		 * Argh.  The PAR doesn't seem to indicate duplex mode
238 		 * properly!  Determine media based on link partner's
239 		 * advertised capabilities.
240 		 */
241 		if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
242 			anlpar = PHY_READ(sc, MII_ANAR) &
243 			    PHY_READ(sc, MII_ANLPAR);
244 			if (anlpar & ANLPAR_TX_FD)
245 				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
246 			else if (anlpar & ANLPAR_T4)
247 				mii->mii_media_active |= IFM_100_T4|IFM_HDX;
248 			else if (anlpar & ANLPAR_TX)
249 				mii->mii_media_active |= IFM_100_TX|IFM_HDX;
250 			else if (anlpar & ANLPAR_10_FD)
251 				mii->mii_media_active |= IFM_10_T|IFM_FDX;
252 			else if (anlpar & ANLPAR_10)
253 				mii->mii_media_active |= IFM_10_T|IFM_HDX;
254 			else
255 				mii->mii_media_active |= IFM_NONE;
256 			if ((mii->mii_media_active & IFM_FDX) != 0)
257 				mii->mii_media_active |=
258 				    mii_phy_flowstatus(sc);
259 			return;
260 		}
261 
262 		/*
263 		 * Link partner is not capable of autonegotiation.
264 		 * We will never be in full-duplex mode if this is
265 		 * the case, so reading the PAR is OK.
266 		 */
267 		par = PHY_READ(sc, MII_NSPHY_PAR);
268 		if (par & PAR_10)
269 			mii->mii_media_active |= IFM_10_T;
270 		else
271 			mii->mii_media_active |= IFM_100_TX;
272 		mii->mii_media_active |= IFM_HDX;
273 	} else
274 		mii->mii_media_active = ife->ifm_media;
275 }
276 
277 static void
278 nsphy_reset(struct mii_softc *sc)
279 {
280 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
281 	int reg, i;
282 
283 	if (sc->mii_flags & MIIF_NOISOLATE)
284 		reg = BMCR_RESET;
285 	else
286 		reg = BMCR_RESET | BMCR_ISO;
287 	PHY_WRITE(sc, MII_BMCR, reg);
288 
289 	/*
290 	 * It is best to allow a little time for the reset to settle
291 	 * in before we start polling the BMCR again.  Notably, the
292 	 * DP83840A manuals state that there should be a 500us delay
293 	 * between asserting software reset and attempting MII serial
294 	 * operations.  Be conservative.
295 	 */
296 	DELAY(1000);
297 
298 	/*
299 	 * Wait another 2s for it to complete.
300 	 * This is only a little overkill as under normal circumstances
301 	 * the PHY can take up to 1s to complete reset.
302 	 * This is also a bit odd because after a reset, the BMCR will
303 	 * clear the reset bit and simply reports 0 even though the reset
304 	 * is not yet complete.
305 	 */
306 	for (i = 0; i < 1000; i++) {
307 		reg = PHY_READ(sc, MII_BMCR);
308 		if (reg != 0 && (reg & BMCR_RESET) == 0)
309 			break;
310 		DELAY(2000);
311 	}
312 
313 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
314 		if ((ife == NULL && sc->mii_inst != 0) ||
315 		    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
316 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
317 	}
318 }
319