1 /*- 2 * Principal Author: Parag Patel 3 * Copyright (c) 2001 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Additonal Copyright (c) 2001 by Traakan Software under same licence. 29 * Secondary Author: Matthew Jacob 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 /* 36 * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 37 */ 38 39 /* 40 * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41 * 1000baseSX PHY. 42 * Nathan Binkert <nate@openbsd.org> 43 * Jung-uk Kim <jkim@niksun.com> 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/module.h> 50 #include <sys/socket.h> 51 #include <sys/bus.h> 52 53 54 #include <net/if.h> 55 #include <net/if_media.h> 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 #include "miidevs.h" 60 61 #include <dev/mii/e1000phyreg.h> 62 63 #include "miibus_if.h" 64 65 static int e1000phy_probe(device_t); 66 static int e1000phy_attach(device_t); 67 68 struct e1000phy_softc { 69 struct mii_softc mii_sc; 70 int mii_model; 71 }; 72 73 static device_method_t e1000phy_methods[] = { 74 /* device interface */ 75 DEVMETHOD(device_probe, e1000phy_probe), 76 DEVMETHOD(device_attach, e1000phy_attach), 77 DEVMETHOD(device_detach, mii_phy_detach), 78 DEVMETHOD(device_shutdown, bus_generic_shutdown), 79 { 0, 0 } 80 }; 81 82 static devclass_t e1000phy_devclass; 83 static driver_t e1000phy_driver = { 84 "e1000phy", 85 e1000phy_methods, 86 sizeof(struct e1000phy_softc) 87 }; 88 89 DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 90 91 static int e1000phy_service(struct mii_softc *, struct mii_data *, int); 92 static void e1000phy_status(struct mii_softc *); 93 static void e1000phy_reset(struct mii_softc *); 94 static int e1000phy_mii_phy_auto(struct e1000phy_softc *); 95 96 static const struct mii_phydesc e1000phys[] = { 97 MII_PHY_DESC(MARVELL, E1000), 98 MII_PHY_DESC(MARVELL, E1011), 99 MII_PHY_DESC(MARVELL, E1000_3), 100 MII_PHY_DESC(MARVELL, E1000S), 101 MII_PHY_DESC(MARVELL, E1000_5), 102 MII_PHY_DESC(MARVELL, E1000_6), 103 MII_PHY_DESC(MARVELL, E3082), 104 MII_PHY_DESC(MARVELL, E1112), 105 MII_PHY_DESC(MARVELL, E1149), 106 MII_PHY_DESC(MARVELL, E1111), 107 MII_PHY_DESC(MARVELL, E1116), 108 MII_PHY_DESC(MARVELL, E1118), 109 MII_PHY_DESC(xxMARVELL, E1000), 110 MII_PHY_DESC(xxMARVELL, E1011), 111 MII_PHY_DESC(xxMARVELL, E1000_3), 112 MII_PHY_DESC(xxMARVELL, E1000_5), 113 MII_PHY_DESC(xxMARVELL, E1111), 114 MII_PHY_END 115 }; 116 117 static int 118 e1000phy_probe(device_t dev) 119 { 120 121 return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 122 } 123 124 static int 125 e1000phy_attach(device_t dev) 126 { 127 struct e1000phy_softc *esc; 128 struct mii_softc *sc; 129 struct mii_attach_args *ma; 130 struct mii_data *mii; 131 int fast_ether; 132 133 esc = device_get_softc(dev); 134 sc = &esc->mii_sc; 135 ma = device_get_ivars(dev); 136 sc->mii_dev = device_get_parent(dev); 137 mii = device_get_softc(sc->mii_dev); 138 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 139 140 sc->mii_inst = mii->mii_instance; 141 sc->mii_phy = ma->mii_phyno; 142 sc->mii_service = e1000phy_service; 143 sc->mii_pdata = mii; 144 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 145 mii->mii_instance++; 146 147 fast_ether = 0; 148 esc->mii_model = MII_MODEL(ma->mii_id2); 149 switch (esc->mii_model) { 150 case MII_MODEL_MARVELL_E1011: 151 case MII_MODEL_MARVELL_E1112: 152 if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 153 sc->mii_flags |= MIIF_HAVEFIBER; 154 break; 155 case MII_MODEL_MARVELL_E3082: 156 /* 88E3082 10/100 Fast Ethernet PHY. */ 157 sc->mii_anegticks = MII_ANEGTICKS; 158 fast_ether = 1; 159 break; 160 } 161 162 e1000phy_reset(sc); 163 164 device_printf(dev, " "); 165 166 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 167 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 168 E1000_CR_ISOLATE); 169 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 170 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 171 E1000_CR_SPEED_10); 172 printf("10baseT, "); 173 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 174 E1000_CR_SPEED_10 | E1000_CR_FULL_DUPLEX); 175 printf("10baseT-FDX, "); 176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 177 E1000_CR_SPEED_100); 178 printf("100baseTX, "); 179 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 180 E1000_CR_SPEED_100 | E1000_CR_FULL_DUPLEX); 181 printf("100baseTX-FDX, "); 182 if (fast_ether == 0) { 183 /* 184 * 1000BT-simplex not supported; driver must ignore 185 * this entry, but it must be present in order to 186 * manually set full-duplex. 187 */ 188 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 189 sc->mii_inst), E1000_CR_SPEED_1000); 190 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 191 sc->mii_inst), 192 E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); 193 printf("1000baseTX-FDX, "); 194 } 195 } else { 196 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), 197 E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); 198 printf("1000baseSX-FDX, "); 199 } 200 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 201 printf("auto\n"); 202 #undef ADD 203 204 MIIBUS_MEDIAINIT(sc->mii_dev); 205 return (0); 206 } 207 208 static void 209 e1000phy_reset(struct mii_softc *sc) 210 { 211 struct e1000phy_softc *esc; 212 uint16_t reg; 213 214 esc = (struct e1000phy_softc *)sc; 215 reg = PHY_READ(sc, E1000_SCR); 216 if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 217 reg &= ~E1000_SCR_AUTO_X_MODE; 218 PHY_WRITE(sc, E1000_SCR, reg); 219 if (esc->mii_model == MII_MODEL_MARVELL_E1112) { 220 /* Select 1000BASE-X only mode. */ 221 PHY_WRITE(sc, E1000_EADR, 2); 222 reg = PHY_READ(sc, E1000_SCR); 223 reg &= ~E1000_SCR_MODE_MASK; 224 reg |= E1000_SCR_MODE_1000BX; 225 PHY_WRITE(sc, E1000_SCR, reg); 226 PHY_WRITE(sc, E1000_EADR, 1); 227 } 228 } else { 229 switch (esc->mii_model) { 230 case MII_MODEL_MARVELL_E1111: 231 case MII_MODEL_MARVELL_E1112: 232 case MII_MODEL_MARVELL_E1116: 233 case MII_MODEL_MARVELL_E1118: 234 case MII_MODEL_MARVELL_E1149: 235 /* Disable energy detect mode. */ 236 reg &= ~E1000_SCR_EN_DETECT_MASK; 237 reg |= E1000_SCR_AUTO_X_MODE; 238 if (esc->mii_model == MII_MODEL_MARVELL_E1116) 239 reg &= ~E1000_SCR_POWER_DOWN; 240 break; 241 case MII_MODEL_MARVELL_E3082: 242 reg |= (E1000_SCR_AUTO_X_MODE >> 1); 243 break; 244 default: 245 reg &= ~E1000_SCR_AUTO_X_MODE; 246 break; 247 } 248 /* Enable CRS on TX. */ 249 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 250 /* Auto correction for reversed cable polarity. */ 251 reg &= ~E1000_SCR_POLARITY_REVERSAL; 252 PHY_WRITE(sc, E1000_SCR, reg); 253 254 if (esc->mii_model == MII_MODEL_MARVELL_E1116) { 255 PHY_WRITE(sc, E1000_EADR, 2); 256 reg = PHY_READ(sc, E1000_SCR); 257 reg |= E1000_SCR_RGMII_POWER_UP; 258 PHY_WRITE(sc, E1000_SCR, reg); 259 PHY_WRITE(sc, E1000_EADR, 0); 260 } 261 } 262 263 switch (MII_MODEL(esc->mii_model)) { 264 case MII_MODEL_MARVELL_E3082: 265 case MII_MODEL_MARVELL_E1112: 266 case MII_MODEL_MARVELL_E1116: 267 case MII_MODEL_MARVELL_E1118: 268 case MII_MODEL_MARVELL_E1149: 269 break; 270 default: 271 /* Force TX_CLK to 25MHz clock. */ 272 reg = PHY_READ(sc, E1000_ESCR); 273 reg |= E1000_ESCR_TX_CLK_25; 274 PHY_WRITE(sc, E1000_ESCR, reg); 275 break; 276 } 277 278 /* Reset the PHY so all changes take effect. */ 279 reg = PHY_READ(sc, E1000_CR); 280 reg |= E1000_CR_RESET; 281 PHY_WRITE(sc, E1000_CR, reg); 282 } 283 284 static int 285 e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 286 { 287 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 288 struct e1000phy_softc *esc = (struct e1000phy_softc *)sc; 289 uint16_t speed, gig; 290 int reg; 291 292 switch (cmd) { 293 case MII_POLLSTAT: 294 /* 295 * If we're not polling our PHY instance, just return. 296 */ 297 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 298 return (0); 299 break; 300 301 case MII_MEDIACHG: 302 /* 303 * If the media indicates a different PHY instance, 304 * isolate ourselves. 305 */ 306 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 307 reg = PHY_READ(sc, E1000_CR); 308 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_ISOLATE); 309 return (0); 310 } 311 312 /* 313 * If the interface is not up, don't do anything. 314 */ 315 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 316 break; 317 318 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 319 e1000phy_mii_phy_auto(esc); 320 break; 321 } 322 323 speed = 0; 324 switch (IFM_SUBTYPE(ife->ifm_media)) { 325 case IFM_1000_T: 326 if (esc->mii_model == MII_MODEL_MARVELL_E3082) 327 return (EINVAL); 328 speed = E1000_CR_SPEED_1000; 329 break; 330 case IFM_1000_SX: 331 if (esc->mii_model == MII_MODEL_MARVELL_E3082) 332 return (EINVAL); 333 speed = E1000_CR_SPEED_1000; 334 break; 335 case IFM_100_TX: 336 speed = E1000_CR_SPEED_100; 337 break; 338 case IFM_10_T: 339 speed = E1000_CR_SPEED_10; 340 break; 341 case IFM_NONE: 342 reg = PHY_READ(sc, E1000_CR); 343 PHY_WRITE(sc, E1000_CR, 344 reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); 345 goto done; 346 default: 347 return (EINVAL); 348 } 349 350 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 351 speed |= E1000_CR_FULL_DUPLEX; 352 gig = E1000_1GCR_1000T_FD; 353 } else 354 gig = E1000_1GCR_1000T; 355 356 reg = PHY_READ(sc, E1000_CR); 357 reg &= ~E1000_CR_AUTO_NEG_ENABLE; 358 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 359 360 /* 361 * When setting the link manually, one side must 362 * be the master and the other the slave. However 363 * ifmedia doesn't give us a good way to specify 364 * this, so we fake it by using one of the LINK 365 * flags. If LINK0 is set, we program the PHY to 366 * be a master, otherwise it's a slave. 367 */ 368 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T || 369 (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_SX)) { 370 if ((mii->mii_ifp->if_flags & IFF_LINK0)) 371 PHY_WRITE(sc, E1000_1GCR, gig | 372 E1000_1GCR_MS_ENABLE | E1000_1GCR_MS_VALUE); 373 else 374 PHY_WRITE(sc, E1000_1GCR, gig | 375 E1000_1GCR_MS_ENABLE); 376 } else { 377 if (esc->mii_model != MII_MODEL_MARVELL_E3082) 378 PHY_WRITE(sc, E1000_1GCR, 0); 379 } 380 PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); 381 PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); 382 done: 383 break; 384 case MII_TICK: 385 /* 386 * If we're not currently selected, just return. 387 */ 388 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 389 return (0); 390 391 /* 392 * Is the interface even up? 393 */ 394 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 395 return (0); 396 397 /* 398 * Only used for autonegotiation. 399 */ 400 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 401 sc->mii_ticks = 0; 402 break; 403 } 404 405 /* 406 * check for link. 407 * Read the status register twice; BMSR_LINK is latch-low. 408 */ 409 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 410 if (reg & BMSR_LINK) { 411 sc->mii_ticks = 0; 412 break; 413 } 414 415 /* Announce link loss right after it happens. */ 416 if (sc->mii_ticks++ == 0) 417 break; 418 if (sc->mii_ticks <= sc->mii_anegticks) 419 return (0); 420 421 sc->mii_ticks = 0; 422 e1000phy_reset(sc); 423 e1000phy_mii_phy_auto(esc); 424 break; 425 } 426 427 /* Update the media status. */ 428 e1000phy_status(sc); 429 430 /* Callback if something changed. */ 431 mii_phy_update(sc, cmd); 432 return (0); 433 } 434 435 static void 436 e1000phy_status(struct mii_softc *sc) 437 { 438 struct mii_data *mii = sc->mii_pdata; 439 int bmsr, bmcr, esr, gsr, ssr, isr, ar, lpar; 440 441 mii->mii_media_status = IFM_AVALID; 442 mii->mii_media_active = IFM_ETHER; 443 444 bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 445 esr = PHY_READ(sc, E1000_ESR); 446 bmcr = PHY_READ(sc, E1000_CR); 447 ssr = PHY_READ(sc, E1000_SSR); 448 isr = PHY_READ(sc, E1000_ISR); 449 ar = PHY_READ(sc, E1000_AR); 450 lpar = PHY_READ(sc, E1000_LPAR); 451 452 if (bmsr & E1000_SR_LINK_STATUS) 453 mii->mii_media_status |= IFM_ACTIVE; 454 455 if (bmcr & E1000_CR_LOOPBACK) 456 mii->mii_media_active |= IFM_LOOP; 457 458 if ((((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0) && 459 ((bmsr & E1000_SR_AUTO_NEG_COMPLETE) == 0)) || 460 ((ssr & E1000_SSR_LINK) == 0) || 461 ((ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0)) { 462 /* Erg, still trying, I guess... */ 463 mii->mii_media_active |= IFM_NONE; 464 return; 465 } 466 467 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 468 if (ssr & E1000_SSR_1000MBS) 469 mii->mii_media_active |= IFM_1000_T; 470 else if (ssr & E1000_SSR_100MBS) 471 mii->mii_media_active |= IFM_100_TX; 472 else 473 mii->mii_media_active |= IFM_10_T; 474 } else { 475 if (ssr & E1000_SSR_1000MBS) 476 mii->mii_media_active |= IFM_1000_SX; 477 } 478 479 if (ssr & E1000_SSR_DUPLEX) 480 mii->mii_media_active |= IFM_FDX; 481 else 482 mii->mii_media_active |= IFM_HDX; 483 484 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 485 /* FLAG0==rx-flow-control FLAG1==tx-flow-control */ 486 if ((ar & E1000_AR_PAUSE) && (lpar & E1000_LPAR_PAUSE)) { 487 mii->mii_media_active |= IFM_FLAG0 | IFM_FLAG1; 488 } else if (!(ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 489 (lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 490 mii->mii_media_active |= IFM_FLAG1; 491 } else if ((ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 492 !(lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 493 mii->mii_media_active |= IFM_FLAG0; 494 } 495 } 496 497 /* FLAG2 : local PHY resolved to MASTER */ 498 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) || 499 (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX)) { 500 PHY_READ(sc, E1000_1GSR); 501 gsr = PHY_READ(sc, E1000_1GSR); 502 if ((gsr & E1000_1GSR_MS_CONFIG_RES) != 0) 503 mii->mii_media_active |= IFM_FLAG2; 504 } 505 } 506 507 static int 508 e1000phy_mii_phy_auto(struct e1000phy_softc *esc) 509 { 510 struct mii_softc *sc; 511 512 sc = &esc->mii_sc; 513 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) 514 PHY_WRITE(sc, E1000_AR, E1000_AR_10T | E1000_AR_10T_FD | 515 E1000_AR_100TX | E1000_AR_100TX_FD | 516 E1000_AR_PAUSE | E1000_AR_ASM_DIR); 517 else 518 PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X | 519 E1000_FA_SYM_PAUSE | E1000_FA_ASYM_PAUSE); 520 if (esc->mii_model != MII_MODEL_MARVELL_E3082) 521 PHY_WRITE(sc, E1000_1GCR, 522 E1000_1GCR_1000T_FD | E1000_1GCR_1000T); 523 PHY_WRITE(sc, E1000_CR, 524 E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 525 526 return (EJUSTRETURN); 527 } 528