1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */ 57 58 #include "opt_mfi.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/selinfo.h> 64 #include <sys/module.h> 65 #include <sys/bus.h> 66 #include <sys/conf.h> 67 #include <sys/bio.h> 68 #include <sys/malloc.h> 69 #include <sys/sysctl.h> 70 #include <sys/uio.h> 71 72 #include <machine/bus.h> 73 #include <machine/resource.h> 74 #include <sys/rman.h> 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 79 #include <dev/mfi/mfireg.h> 80 #include <dev/mfi/mfi_ioctl.h> 81 #include <dev/mfi/mfivar.h> 82 83 static int mfi_pci_probe(device_t); 84 static int mfi_pci_attach(device_t); 85 static int mfi_pci_detach(device_t); 86 static int mfi_pci_suspend(device_t); 87 static int mfi_pci_resume(device_t); 88 static void mfi_pci_free(struct mfi_softc *); 89 90 static device_method_t mfi_methods[] = { 91 DEVMETHOD(device_probe, mfi_pci_probe), 92 DEVMETHOD(device_attach, mfi_pci_attach), 93 DEVMETHOD(device_detach, mfi_pci_detach), 94 DEVMETHOD(device_suspend, mfi_pci_suspend), 95 DEVMETHOD(device_resume, mfi_pci_resume), 96 97 DEVMETHOD_END 98 }; 99 100 static driver_t mfi_pci_driver = { 101 "mfi", 102 mfi_methods, 103 sizeof(struct mfi_softc) 104 }; 105 106 static devclass_t mfi_devclass; 107 DRIVER_MODULE(mfi, pci, mfi_pci_driver, mfi_devclass, 0, 0); 108 MODULE_VERSION(mfi, 1); 109 110 static int mfi_msi = 1; 111 SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0, 112 "Enable use of MSI interrupts"); 113 114 static int mfi_mrsas_enable; 115 SYSCTL_INT(_hw_mfi, OID_AUTO, mrsas_enable, CTLFLAG_RDTUN, &mfi_mrsas_enable, 116 0, "Allow mrasas to take newer cards"); 117 118 struct mfi_ident { 119 uint16_t vendor; 120 uint16_t device; 121 uint16_t subvendor; 122 uint16_t subdevice; 123 int flags; 124 const char *desc; 125 } mfi_identifiers[] = { 126 {0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H810 Adapter"}, 127 {0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Embedded"}, 128 {0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Adapter"}, 129 {0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (blades)"}, 130 {0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (monolithics)"}, 131 {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Adapter"}, 132 {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (blades)"}, 133 {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (monolithics)"}, 134 {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25DB080"}, 135 {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25NB008"}, 136 {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "ThunderBolt"}, 137 {0x1000, 0x005d, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_INVADER, "Invader"}, 138 {0x1000, 0x005f, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_FURY, "Fury"}, 139 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"}, 140 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 141 {0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"}, 142 {0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"}, 143 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 144 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"}, 145 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"}, 146 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"}, 147 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"}, 148 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"}, 149 {0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, "Dell PERC H800 Proto Adapter"}, 150 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"}, 151 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"}, 152 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 153 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 154 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */ 155 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */ 156 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"}, 157 {0, 0, 0, 0, 0, NULL} 158 }; 159 160 static struct mfi_ident * 161 mfi_find_ident(device_t dev) 162 { 163 struct mfi_ident *m; 164 165 for (m = mfi_identifiers; m->vendor != 0; m++) { 166 if ((m->vendor == pci_get_vendor(dev)) && 167 (m->device == pci_get_device(dev)) && 168 ((m->subvendor == pci_get_subvendor(dev)) || 169 (m->subvendor == 0xffff)) && 170 ((m->subdevice == pci_get_subdevice(dev)) || 171 (m->subdevice == 0xffff))) 172 return (m); 173 } 174 175 return (NULL); 176 } 177 178 static int 179 mfi_pci_probe(device_t dev) 180 { 181 struct mfi_ident *id; 182 183 if ((id = mfi_find_ident(dev)) != NULL) { 184 device_set_desc(dev, id->desc); 185 186 /* give priority to mrsas if tunable set */ 187 if ((id->flags & MFI_FLAGS_MRSAS) && mfi_mrsas_enable) 188 return (BUS_PROBE_LOW_PRIORITY); 189 else 190 return (BUS_PROBE_DEFAULT); 191 } 192 return (ENXIO); 193 } 194 195 static int 196 mfi_pci_attach(device_t dev) 197 { 198 struct mfi_softc *sc; 199 struct mfi_ident *m; 200 int count, error; 201 202 sc = device_get_softc(dev); 203 bzero(sc, sizeof(*sc)); 204 sc->mfi_dev = dev; 205 m = mfi_find_ident(dev); 206 sc->mfi_flags = m->flags; 207 208 /* Ensure busmastering is enabled */ 209 pci_enable_busmaster(dev); 210 211 /* Allocate PCI registers */ 212 if ((sc->mfi_flags & MFI_FLAGS_1064R) || 213 (sc->mfi_flags & MFI_FLAGS_1078)) { 214 /* 1068/1078: Memory mapped BAR is at offset 0x10 */ 215 sc->mfi_regs_rid = PCIR_BAR(0); 216 } 217 else if ((sc->mfi_flags & MFI_FLAGS_GEN2) || 218 (sc->mfi_flags & MFI_FLAGS_SKINNY) || 219 (sc->mfi_flags & MFI_FLAGS_TBOLT)) { 220 /* Gen2/Skinny: Memory mapped BAR is at offset 0x14 */ 221 sc->mfi_regs_rid = PCIR_BAR(1); 222 } 223 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev, 224 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) { 225 device_printf(dev, "Cannot allocate PCI registers\n"); 226 return (ENXIO); 227 } 228 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource); 229 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource); 230 231 error = ENOMEM; 232 233 /* Allocate parent DMA tag */ 234 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* PCI parent */ 235 1, 0, /* algnmnt, boundary */ 236 BUS_SPACE_MAXADDR, /* lowaddr */ 237 BUS_SPACE_MAXADDR, /* highaddr */ 238 NULL, NULL, /* filter, filterarg */ 239 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 240 BUS_SPACE_UNRESTRICTED, /* nsegments */ 241 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 242 0, /* flags */ 243 NULL, NULL, /* lockfunc, lockarg */ 244 &sc->mfi_parent_dmat)) { 245 device_printf(dev, "Cannot allocate parent DMA tag\n"); 246 goto out; 247 } 248 249 /* Allocate IRQ resource. */ 250 sc->mfi_irq_rid = 0; 251 count = 1; 252 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) { 253 device_printf(sc->mfi_dev, "Using MSI\n"); 254 sc->mfi_irq_rid = 1; 255 } 256 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ, 257 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 258 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n"); 259 error = EINVAL; 260 goto out; 261 } 262 263 error = mfi_attach(sc); 264 out: 265 if (error) { 266 mfi_free(sc); 267 mfi_pci_free(sc); 268 } 269 270 return (error); 271 } 272 273 static int 274 mfi_pci_detach(device_t dev) 275 { 276 struct mfi_softc *sc; 277 int error, devcount, i; 278 device_t *devlist; 279 280 sc = device_get_softc(dev); 281 282 sx_xlock(&sc->mfi_config_lock); 283 mtx_lock(&sc->mfi_io_lock); 284 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) { 285 mtx_unlock(&sc->mfi_io_lock); 286 sx_xunlock(&sc->mfi_config_lock); 287 return (EBUSY); 288 } 289 sc->mfi_detaching = 1; 290 mtx_unlock(&sc->mfi_io_lock); 291 292 if ((error = device_get_children(sc->mfi_dev, &devlist, &devcount)) != 0) { 293 sx_xunlock(&sc->mfi_config_lock); 294 return error; 295 } 296 for (i = 0; i < devcount; i++) 297 device_delete_child(sc->mfi_dev, devlist[i]); 298 free(devlist, M_TEMP); 299 sx_xunlock(&sc->mfi_config_lock); 300 301 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh); 302 303 mfi_shutdown(sc); 304 mfi_free(sc); 305 mfi_pci_free(sc); 306 return (0); 307 } 308 309 static void 310 mfi_pci_free(struct mfi_softc *sc) 311 { 312 313 if (sc->mfi_regs_resource != NULL) { 314 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY, 315 sc->mfi_regs_rid, sc->mfi_regs_resource); 316 } 317 if (sc->mfi_irq_rid != 0) 318 pci_release_msi(sc->mfi_dev); 319 320 return; 321 } 322 323 static int 324 mfi_pci_suspend(device_t dev) 325 { 326 327 return (EINVAL); 328 } 329 330 static int 331 mfi_pci_resume(device_t dev) 332 { 333 334 return (EINVAL); 335 } 336