xref: /freebsd/sys/dev/liquidio/base/lio_common.h (revision 0957b409a90fd597c1e9124cbaf3edd2b488f4ac)
1 /*
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2017 Cavium, Inc.. All rights reserved.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Cavium, Inc. nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 /*$FreeBSD$*/
34 
35 /*   \file  lio_common.h
36  *   \brief Common: Structures and macros used in PCI-NIC package by core and
37  *   host driver.
38  */
39 
40 #ifndef __LIO_COMMON_H__
41 #define __LIO_COMMON_H__
42 
43 #include "lio_config.h"
44 
45 #define LIO_STR_HELPER(x)	#x
46 #define LIO_STR(x)	LIO_STR_HELPER(x)
47 #define LIO_BASE_MAJOR_VERSION	1
48 #define LIO_BASE_MINOR_VERSION	6
49 #define LIO_BASE_MICRO_VERSION	1
50 #define LIO_BASE_VERSION	LIO_STR(LIO_BASE_MAJOR_VERSION) "."	\
51 				LIO_STR(LIO_BASE_MINOR_VERSION)
52 #define LIO_VERSION		LIO_STR(LIO_BASE_MAJOR_VERSION) "."	\
53 				LIO_STR(LIO_BASE_MINOR_VERSION)		\
54 				"." LIO_STR(LIO_BASE_MICRO_VERSION)
55 
56 struct lio_version {
57 	uint16_t	major;
58 	uint16_t	minor;
59 	uint16_t	micro;
60 	uint16_t	reserved;
61 };
62 
63 /* Tag types used by Octeon cores in its work. */
64 enum lio_tag_type {
65 	LIO_ORDERED_TAG		= 0,
66 	LIO_ATOMIC_TAG		= 1,
67 	LIO_NULL_TAG		= 2,
68 	LIO_NULL_NULL_TAG	= 3
69 };
70 
71 /* pre-defined host->NIC tag values */
72 #define LIO_CONTROL	(0x11111110)
73 #define LIO_DATA(i)	(0x11111111 + (i))
74 
75 /*
76  * Opcodes used by host driver/apps to perform operations on the core.
77  * These are used to identify the major subsystem that the operation
78  * is for.
79  */
80 #define LIO_OPCODE_NIC	1	/* used for NIC operations */
81 
82 /*
83  * Subcodes are used by host driver/apps to identify the sub-operation
84  * for the core. They only need to by unique for a given subsystem.
85  */
86 #define LIO_OPCODE_SUBCODE(op, sub)	((((op) & 0x0f) << 8) | ((sub) & 0x7f))
87 
88 /* OPCODE_CORE subcodes. For future use. */
89 
90 /* OPCODE_NIC subcodes */
91 
92 /* This subcode is sent by core PCI driver to indicate cores are ready. */
93 #define LIO_OPCODE_NIC_CORE_DRV_ACTIVE	0x01
94 #define LIO_OPCODE_NIC_NW_DATA		0x02	/* network packet data */
95 #define LIO_OPCODE_NIC_CMD		0x03
96 #define LIO_OPCODE_NIC_INFO		0x04
97 #define LIO_OPCODE_NIC_PORT_STATS	0x05
98 #define LIO_OPCODE_NIC_INTRMOD_CFG	0x08
99 #define LIO_OPCODE_NIC_IF_CFG		0x09
100 #define LIO_OPCODE_NIC_INTRMOD_PARAMS	0x0B
101 
102 /* Application codes advertised by the core driver initialization packet. */
103 #define LIO_DRV_APP_START	0x0
104 #define LIO_DRV_APP_COUNT	0x2
105 #define LIO_DRV_NIC_APP		(LIO_DRV_APP_START + 0x1)
106 #define LIO_DRV_INVALID_APP	(LIO_DRV_APP_START + 0x2)
107 #define LIO_DRV_APP_END		(LIO_DRV_INVALID_APP - 1)
108 
109 #define BYTES_PER_DHLEN_UNIT	8
110 
111 #define SCR2_BIT_FW_LOADED	63
112 #define SCR2_BIT_FW_RELOADED	62
113 
114 static inline uint32_t
115 lio_incr_index(uint32_t index, uint32_t count, uint32_t max)
116 {
117 	if ((index + count) >= max)
118 		index = index + count - max;
119 	else
120 		index += count;
121 
122 	return (index);
123 }
124 
125 #define LIO_BOARD_NAME		32
126 #define LIO_SERIAL_NUM_LEN	64
127 
128 /*
129  * Structure used by core driver to send indication that the Octeon
130  * application is ready.
131  */
132 struct lio_core_setup {
133 	uint64_t	corefreq;
134 
135 	char		boardname[LIO_BOARD_NAME];
136 
137 	char		board_serial_number[LIO_SERIAL_NUM_LEN];
138 
139 	uint64_t	board_rev_major;
140 
141 	uint64_t	board_rev_minor;
142 
143 };
144 
145 /*---------------------------  SCATTER GATHER ENTRY  -----------------------*/
146 
147 /*
148  * The Scatter-Gather List Entry. The scatter or gather component used with
149  * a Octeon input instruction has this format.
150  */
151 struct lio_sg_entry {
152 	/* The first 64 bit gives the size of data in each dptr. */
153 	union {
154 		uint16_t	size[4];
155 		uint64_t	size64;
156 	}	u;
157 
158 	/* The 4 dptr pointers for this entry. */
159 	uint64_t	ptr[4];
160 
161 };
162 
163 #define LIO_SG_ENTRY_SIZE    (sizeof(struct lio_sg_entry))
164 
165 /*
166  * \brief Add size to gather list
167  * @param sg_entry scatter/gather entry
168  * @param size size to add
169  * @param pos position to add it.
170  */
171 static inline void
172 lio_add_sg_size(struct lio_sg_entry *sg_entry, uint16_t size, uint32_t pos)
173 {
174 
175 #if BYTE_ORDER == BIG_ENDIAN
176 	sg_entry->u.size[pos] = size;
177 #else	/* BYTE_ORDER != BIG_ENDIAN  */
178 	sg_entry->u.size[3 - pos] = size;
179 #endif	/* BYTE_ORDER == BIG_ENDIAN  */
180 }
181 
182 /*------------------------- End Scatter/Gather ---------------------------*/
183 
184 #define LIO_FRM_HEADER_SIZE	 22	/* VLAN + Ethernet */
185 
186 #define LIO_MAX_FRM_SIZE	(16000 + LIO_FRM_HEADER_SIZE)
187 
188 #define LIO_DEFAULT_FRM_SIZE	(1500 + LIO_FRM_HEADER_SIZE)
189 
190 /* NIC Command types */
191 #define LIO_CMD_CHANGE_MTU	0x1
192 #define LIO_CMD_CHANGE_MACADDR	0x2
193 #define LIO_CMD_CHANGE_DEVFLAGS	0x3
194 #define LIO_CMD_RX_CTL		0x4
195 #define LIO_CMD_SET_MULTI_LIST	0x5
196 
197 /* command for setting the speed, duplex & autoneg */
198 #define LIO_CMD_SET_SETTINGS	0x7
199 #define LIO_CMD_SET_FLOW_CTL	0x8
200 
201 #define LIO_CMD_GPIO_ACCESS	0xA
202 #define LIO_CMD_LRO_ENABLE	0xB
203 #define LIO_CMD_LRO_DISABLE	0xC
204 #define LIO_CMD_SET_RSS		0xD
205 
206 #define LIO_CMD_TNL_RX_CSUM_CTL	0x10
207 #define LIO_CMD_TNL_TX_CSUM_CTL	0x11
208 #define LIO_CMD_VERBOSE_ENABLE	0x14
209 #define LIO_CMD_VERBOSE_DISABLE	0x15
210 
211 #define LIO_CMD_VLAN_FILTER_CTL	0x16
212 #define LIO_CMD_ADD_VLAN_FILTER	0x17
213 #define LIO_CMD_DEL_VLAN_FILTER	0x18
214 #define LIO_CMD_VXLAN_PORT_CONFIG	0x19
215 
216 #define LIO_CMD_ID_ACTIVE	0x1a
217 
218 #define LIO_CMD_SET_FNV	0x1d
219 
220 #define LIO_CMD_PKT_STEERING_CTL	0x1e
221 
222 #define LIO_CMD_QUEUE_COUNT_CTL	0x1f
223 
224 #define LIO_CMD_VXLAN_PORT_ADD	0x0
225 #define LIO_CMD_VXLAN_PORT_DEL	0x1
226 #define LIO_CMD_RXCSUM_ENABLE	0x0
227 #define LIO_CMD_RXCSUM_DISABLE	0x1
228 #define LIO_CMD_TXCSUM_ENABLE	0x0
229 #define LIO_CMD_TXCSUM_DISABLE	0x1
230 #define LIO_CMD_FNV_ENABLE	0x1
231 #define LIO_CMD_FNV_DISABLE	0x0
232 #define LIO_CMD_PKT_STEERING_ENABLE	0x0
233 #define LIO_CMD_PKT_STEERING_DISABLE	0x1
234 
235 /* RX(packets coming from wire) Checksum verification flags */
236 /* TCP/UDP csum */
237 #define LIO_L4SUM_VERIFIED	0x1
238 #define LIO_IPSUM_VERIFIED	0x2
239 
240 /*LROIPV4 and LROIPV6 Flags*/
241 #define LIO_LROIPV4	0x1
242 #define LIO_LROIPV6	0x2
243 
244 /* Interface flags communicated between host driver and core app. */
245 enum lio_ifflags {
246 	LIO_IFFLAG_PROMISC	= 0x01,
247 	LIO_IFFLAG_ALLMULTI	= 0x02,
248 	LIO_IFFLAG_MULTICAST	= 0x04,
249 	LIO_IFFLAG_BROADCAST	= 0x08,
250 	LIO_IFFLAG_UNICAST	= 0x10
251 };
252 
253 /*
254  *   wqe
255  *  ---------------  0
256  * |  wqe  word0-3 |
257  *  ---------------  32
258  * |    PCI IH     |
259  *  ---------------  40
260  * |     RPTR      |
261  *  ---------------  48
262  * |    PCI IRH    |
263  *  ---------------  56
264  * |  OCT_NET_CMD  |
265  *  ---------------  64
266  * | Addtl 8-BData |
267  * |               |
268  *  ---------------
269  */
270 union octeon_cmd {
271 	uint64_t	cmd64;
272 
273 	struct {
274 #if BYTE_ORDER == BIG_ENDIAN
275 		uint64_t	cmd:5;
276 
277 		uint64_t	more:6;	/* How many udd words follow the command */
278 
279 		uint64_t	reserved:29;
280 
281 		uint64_t	param1:16;
282 
283 		uint64_t	param2:8;
284 
285 #else	/* BYTE_ORDER != BIG_ENDIAN */
286 
287 		uint64_t	param2:8;
288 
289 		uint64_t	param1:16;
290 
291 		uint64_t	reserved:29;
292 
293 		uint64_t	more:6;
294 
295 		uint64_t	cmd:5;
296 
297 #endif	/* BYTE_ORDER == BIG_ENDIAN */
298 	}	s;
299 
300 };
301 
302 #define OCTEON_CMD_SIZE	(sizeof(union octeon_cmd))
303 
304 /* pkiih3 + irh + ossp[0] + ossp[1] + rdp + rptr = 40 bytes */
305 #define LIO_SOFTCMDRESP_IH3	(40 + 8)
306 
307 #define LIO_PCICMD_O3		(24 + 8)
308 
309 /* Instruction Header(DPI) - for OCTEON-III models */
310 struct octeon_instr_ih3 {
311 #if BYTE_ORDER == BIG_ENDIAN
312 
313 	/* Reserved3 */
314 	uint64_t	reserved3:1;
315 
316 	/* Gather indicator 1=gather */
317 	uint64_t	gather:1;
318 
319 	/* Data length OR no. of entries in gather list */
320 	uint64_t	dlengsz:14;
321 
322 	/* Front Data size */
323 	uint64_t	fsz:6;
324 
325 	/* Reserved2 */
326 	uint64_t	reserved2:4;
327 
328 	/* PKI port kind - PKIND */
329 	uint64_t	pkind:6;
330 
331 	/* Reserved1 */
332 	uint64_t	reserved1:32;
333 
334 #else	/* BYTE_ORDER != BIG_ENDIAN */
335 
336 	/* Reserved1 */
337 	uint64_t	reserved1:32;
338 
339 	/* PKI port kind - PKIND */
340 	uint64_t	pkind:6;
341 
342 	/* Reserved2 */
343 	uint64_t	reserved2:4;
344 
345 	/* Front Data size */
346 	uint64_t	fsz:6;
347 
348 	/* Data length OR no. of entries in gather list */
349 	uint64_t	dlengsz:14;
350 
351 	/* Gather indicator 1=gather */
352 	uint64_t	gather:1;
353 
354 	/* Reserved3 */
355 	uint64_t	reserved3:1;
356 
357 #endif	/* BYTE_ORDER == BIG_ENDIAN */
358 };
359 
360 /* Optional PKI Instruction Header(PKI IH) - for OCTEON-III models */
361 /* BIG ENDIAN format.   */
362 struct octeon_instr_pki_ih3 {
363 #if BYTE_ORDER == BIG_ENDIAN
364 
365 	/* Wider bit */
366 	uint64_t	w:1;
367 
368 	/* Raw mode indicator 1 = RAW */
369 	uint64_t	raw:1;
370 
371 	/* Use Tag */
372 	uint64_t	utag:1;
373 
374 	/* Use QPG */
375 	uint64_t	uqpg:1;
376 
377 	/* Reserved2 */
378 	uint64_t	reserved2:1;
379 
380 	/* Parse Mode */
381 	uint64_t	pm:3;
382 
383 	/* Skip Length */
384 	uint64_t	sl:8;
385 
386 	/* Use Tag Type */
387 	uint64_t	utt:1;
388 
389 	/* Tag type */
390 	uint64_t	tagtype:2;
391 
392 	/* Reserved1 */
393 	uint64_t	reserved1:2;
394 
395 	/* QPG Value */
396 	uint64_t	qpg:11;
397 
398 	/* Tag Value */
399 	uint64_t	tag:32;
400 
401 #else	/* BYTE_ORDER != BIG_ENDIAN */
402 
403 	/* Tag Value */
404 	uint64_t	tag:32;
405 
406 	/* QPG Value */
407 	uint64_t	qpg:11;
408 
409 	/* Reserved1 */
410 	uint64_t	reserved1:2;
411 
412 	/* Tag type */
413 	uint64_t	tagtype:2;
414 
415 	/* Use Tag Type */
416 	uint64_t	utt:1;
417 
418 	/* Skip Length */
419 	uint64_t	sl:8;
420 
421 	/* Parse Mode */
422 	uint64_t	pm:3;
423 
424 	/* Reserved2 */
425 	uint64_t	reserved2:1;
426 
427 	/* Use QPG */
428 	uint64_t	uqpg:1;
429 
430 	/* Use Tag */
431 	uint64_t	utag:1;
432 
433 	/* Raw mode indicator 1 = RAW */
434 	uint64_t	raw:1;
435 
436 	/* Wider bit */
437 	uint64_t	w:1;
438 #endif	/* BYTE_ORDER == BIG_ENDIAN */
439 
440 };
441 
442 /* Input Request Header */
443 struct octeon_instr_irh {
444 #if BYTE_ORDER == BIG_ENDIAN
445 	uint64_t	opcode:4;
446 	uint64_t	rflag:1;
447 	uint64_t	subcode:7;
448 	uint64_t	vlan:12;
449 	uint64_t	priority:3;
450 	uint64_t	reserved:5;
451 	uint64_t	ossp:32;	/* opcode/subcode specific parameters */
452 
453 #else	/* BYTE_ORDER != BIG_ENDIAN */
454 
455 	uint64_t	ossp:32;	/* opcode/subcode specific parameters */
456 	uint64_t	reserved:5;
457 	uint64_t	priority:3;
458 	uint64_t	vlan:12;
459 	uint64_t	subcode:7;
460 	uint64_t	rflag:1;
461 	uint64_t	opcode:4;
462 #endif	/* BYTE_ORDER == BIG_ENDIAN */
463 };
464 
465 /* Return Data Parameters */
466 struct octeon_instr_rdp {
467 #if BYTE_ORDER == BIG_ENDIAN
468 	uint64_t	reserved:49;
469 	uint64_t	pcie_port:3;
470 	uint64_t	rlen:12;
471 
472 #else	/* BYTE_ORDER != BIG_ENDIAN */
473 
474 	uint64_t	rlen:12;
475 	uint64_t	pcie_port:3;
476 	uint64_t	reserved:49;
477 #endif	/* BYTE_ORDER == BIG_ENDIAN */
478 };
479 
480 /* Receive Header */
481 union octeon_rh {
482 #if BYTE_ORDER == BIG_ENDIAN
483 	uint64_t	rh64;
484 	struct {
485 		uint64_t	opcode:4;
486 		uint64_t	subcode:8;
487 		uint64_t	len:3;		/* additional 64-bit words */
488 		uint64_t	reserved:17;
489 		uint64_t	ossp:32;	/* opcode/subcode specific parameters */
490 	}	r;
491 	struct {
492 		uint64_t	opcode:4;
493 		uint64_t	subcode:8;
494 		uint64_t	len:3;		/* additional 64-bit words */
495 		uint64_t	extra:28;
496 		uint64_t	vlan:12;
497 		uint64_t	priority:3;
498 		uint64_t	csum_verified:3;/* checksum verified. */
499 		uint64_t	has_hwtstamp:1;	/* Has hardware timestamp. 1 = yes. */
500 		uint64_t	encap_on:1;
501 		uint64_t	has_hash:1;	/* Has hash (rth or rss). 1 = yes. */
502 	}	r_dh;
503 	struct {
504 		uint64_t	opcode:4;
505 		uint64_t	subcode:8;
506 		uint64_t	len:3;		/* additional 64-bit words */
507 		uint64_t	reserved:11;
508 		uint64_t	num_gmx_ports:8;
509 		uint64_t	max_nic_ports:10;
510 		uint64_t	app_cap_flags:4;
511 		uint64_t	app_mode:8;
512 		uint64_t	pkind:8;
513 	}	r_core_drv_init;
514 	struct {
515 		uint64_t	opcode:4;
516 		uint64_t	subcode:8;
517 		uint64_t	len:3;		/* additional 64-bit words */
518 		uint64_t	reserved:8;
519 		uint64_t	extra:25;
520 		uint64_t	gmxport:16;
521 	}	r_nic_info;
522 #else	/* BYTE_ORDER != BIG_ENDIAN */
523 	uint64_t	rh64;
524 	struct {
525 		uint64_t	ossp:32;	/* opcode/subcode specific parameters */
526 		uint64_t	reserved:17;
527 		uint64_t	len:3;		/* additional 64-bit words */
528 		uint64_t	subcode:8;
529 		uint64_t	opcode:4;
530 	}	r;
531 	struct {
532 		uint64_t	has_hash:1;	/* Has hash (rth or rss). 1 = yes. */
533 		uint64_t	encap_on:1;
534 		uint64_t	has_hwtstamp:1;	/* 1 = has hwtstamp */
535 		uint64_t	csum_verified:3;	/* checksum verified. */
536 		uint64_t	priority:3;
537 		uint64_t	vlan:12;
538 		uint64_t	extra:28;
539 		uint64_t	len:3;		/* additional 64-bit words */
540 		uint64_t	subcode:8;
541 		uint64_t	opcode:4;
542 	}	r_dh;
543 	struct {
544 		uint64_t	pkind:8;
545 		uint64_t	app_mode:8;
546 		uint64_t	app_cap_flags:4;
547 		uint64_t	max_nic_ports:10;
548 		uint64_t	num_gmx_ports:8;
549 		uint64_t	reserved:11;
550 		uint64_t	len:3;		/* additional 64-bit words */
551 		uint64_t	subcode:8;
552 		uint64_t	opcode:4;
553 	}	r_core_drv_init;
554 	struct {
555 		uint64_t	gmxport:16;
556 		uint64_t	extra:25;
557 		uint64_t	reserved:8;
558 		uint64_t	len:3;		/* additional 64-bit words */
559 		uint64_t	subcode:8;
560 		uint64_t	opcode:4;
561 	}	r_nic_info;
562 #endif	/* BYTE_ORDER == BIG_ENDIAN */
563 };
564 
565 #define OCTEON_RH_SIZE (sizeof(union  octeon_rh))
566 
567 union octeon_packet_params {
568 	uint32_t	pkt_params32;
569 	struct {
570 #if BYTE_ORDER == BIG_ENDIAN
571 		uint32_t	reserved:24;
572 		uint32_t	ip_csum:1;	/* Perform IP header checksum(s) */
573 		/* Perform Outer transport header checksum */
574 		uint32_t	transport_csum:1;
575 		/* Find tunnel, and perform transport csum. */
576 		uint32_t	tnl_csum:1;
577 		uint32_t	tsflag:1;	/* Timestamp this packet */
578 		uint32_t	ipsec_ops:4;	/* IPsec operation */
579 
580 #else	/* BYTE_ORDER != BIG_ENDIAN */
581 
582 		uint32_t	ipsec_ops:4;
583 		uint32_t	tsflag:1;
584 		uint32_t	tnl_csum:1;
585 		uint32_t	transport_csum:1;
586 		uint32_t	ip_csum:1;
587 		uint32_t	reserved:24;
588 #endif	/* BYTE_ORDER == BIG_ENDIAN */
589 	}	s;
590 };
591 
592 /* Status of a RGMII Link on Octeon as seen by core driver. */
593 union octeon_link_status {
594 	uint64_t	link_status64;
595 
596 	struct {
597 #if BYTE_ORDER == BIG_ENDIAN
598 		uint64_t	duplex:8;
599 		uint64_t	mtu:16;
600 		uint64_t	speed:16;
601 		uint64_t	link_up:1;
602 		uint64_t	autoneg:1;
603 		uint64_t	if_mode:5;
604 		uint64_t	pause:1;
605 		uint64_t	flashing:1;
606 		uint64_t	reserved:15;
607 
608 #else	/* BYTE_ORDER != BIG_ENDIAN */
609 
610 		uint64_t	reserved:15;
611 		uint64_t	flashing:1;
612 		uint64_t	pause:1;
613 		uint64_t	if_mode:5;
614 		uint64_t	autoneg:1;
615 		uint64_t	link_up:1;
616 		uint64_t	speed:16;
617 		uint64_t	mtu:16;
618 		uint64_t	duplex:8;
619 #endif	/* BYTE_ORDER == BIG_ENDIAN */
620 	}	s;
621 };
622 
623 /* The txpciq info passed to host from the firmware */
624 
625 union octeon_txpciq {
626 	uint64_t	txpciq64;
627 
628 	struct {
629 #if BYTE_ORDER == BIG_ENDIAN
630 		uint64_t	q_no:8;
631 		uint64_t	port:8;
632 		uint64_t	pkind:6;
633 		uint64_t	use_qpg:1;
634 		uint64_t	qpg:11;
635 		uint64_t	aura_num:10;
636 		uint64_t	reserved:20;
637 
638 #else	/* BYTE_ORDER != BIG_ENDIAN */
639 
640 		uint64_t	reserved:20;
641 		uint64_t	aura_num:10;
642 		uint64_t	qpg:11;
643 		uint64_t	use_qpg:1;
644 		uint64_t	pkind:6;
645 		uint64_t	port:8;
646 		uint64_t	q_no:8;
647 #endif	/* BYTE_ORDER == BIG_ENDIAN */
648 	}	s;
649 };
650 
651 /* The rxpciq info passed to host from the firmware */
652 
653 union octeon_rxpciq {
654 	uint64_t	rxpciq64;
655 
656 	struct {
657 #if BYTE_ORDER == BIG_ENDIAN
658 		uint64_t	q_no:8;
659 		uint64_t	reserved:56;
660 
661 #else	/* BYTE_ORDER != BIG_ENDIAN */
662 
663 		uint64_t	reserved:56;
664 		uint64_t	q_no:8;
665 #endif	/* BYTE_ORDER == BIG_ENDIAN */
666 	}	s;
667 };
668 
669 /* Information for a OCTEON ethernet interface shared between core & host. */
670 struct octeon_link_info {
671 	union octeon_link_status link;
672 	uint64_t	hw_addr;
673 
674 #if BYTE_ORDER == BIG_ENDIAN
675 	uint64_t	gmxport:16;
676 	uint64_t	macaddr_is_admin_asgnd:1;
677 	uint64_t	vlan_is_admin_assigned:1;
678 	uint64_t	rsvd:30;
679 	uint64_t	num_txpciq:8;
680 	uint64_t	num_rxpciq:8;
681 
682 #else	/* BYTE_ORDER != BIG_ENDIAN */
683 
684 	uint64_t	num_rxpciq:8;
685 	uint64_t	num_txpciq:8;
686 	uint64_t	rsvd:30;
687 	uint64_t	vlan_is_admin_assigned:1;
688 	uint64_t	macaddr_is_admin_asgnd:1;
689 	uint64_t	gmxport:16;
690 #endif	/* BYTE_ORDER == BIG_ENDIAN */
691 
692 	union octeon_txpciq txpciq[LIO_MAX_IOQS_PER_NICIF];
693 	union octeon_rxpciq rxpciq[LIO_MAX_IOQS_PER_NICIF];
694 };
695 
696 struct octeon_if_cfg_info {
697 	uint64_t		iqmask;		/* mask for IQs enabled for  the port */
698 	uint64_t		oqmask;		/* mask for OQs enabled for the port */
699 	struct octeon_link_info linfo;	/* initial link information */
700 	char			lio_firmware_version[32];
701 };
702 
703 /* Stats for each NIC port in RX direction. */
704 struct octeon_rx_stats {
705 	/* link-level stats */
706 	uint64_t	total_rcvd;
707 	uint64_t	bytes_rcvd;
708 	uint64_t	total_bcst;
709 	uint64_t	total_mcst;
710 	uint64_t	runts;
711 	uint64_t	ctl_rcvd;
712 	uint64_t	fifo_err;		/* Accounts for over/under-run of buffers */
713 	uint64_t	dmac_drop;
714 	uint64_t	fcs_err;
715 	uint64_t	jabber_err;
716 	uint64_t	l2_err;
717 	uint64_t	frame_err;
718 
719 	/* firmware stats */
720 	uint64_t	fw_total_rcvd;
721 	uint64_t	fw_total_fwd;
722 	uint64_t	fw_total_fwd_bytes;
723 	uint64_t	fw_err_pko;
724 	uint64_t	fw_err_link;
725 	uint64_t	fw_err_drop;
726 	uint64_t	fw_rx_vxlan;
727 	uint64_t	fw_rx_vxlan_err;
728 
729 	/* LRO */
730 	uint64_t	fw_lro_pkts;		/* Number of packets that are LROed */
731 	uint64_t	fw_lro_octs;		/* Number of octets that are LROed */
732 	uint64_t	fw_total_lro;		/* Number of LRO packets formed */
733 	uint64_t	fw_lro_aborts;		/* Number of times lRO of packet aborted */
734 	uint64_t	fw_lro_aborts_port;
735 	uint64_t	fw_lro_aborts_seq;
736 	uint64_t	fw_lro_aborts_tsval;
737 	uint64_t	fw_lro_aborts_timer;
738 	/* intrmod: packet forward rate */
739 	uint64_t	fwd_rate;
740 };
741 
742 /* Stats for each NIC port in RX direction. */
743 struct octeon_tx_stats {
744 	/* link-level stats */
745 	uint64_t	total_pkts_sent;
746 	uint64_t	total_bytes_sent;
747 	uint64_t	mcast_pkts_sent;
748 	uint64_t	bcast_pkts_sent;
749 	uint64_t	ctl_sent;
750 	uint64_t	one_collision_sent;	/* Packets sent after one collision */
751 	uint64_t	multi_collision_sent;	/* Packets sent after multiple collision */
752 	uint64_t	max_collision_fail;	/* Packets not sent due to max collisions */
753 	uint64_t	max_deferral_fail;	/* Packets not sent due to max deferrals */
754 	uint64_t	fifo_err;		/* Accounts for over/under-run of buffers */
755 	uint64_t	runts;
756 	uint64_t	total_collisions;	/* Total number of collisions detected */
757 
758 	/* firmware stats */
759 	uint64_t	fw_total_sent;
760 	uint64_t	fw_total_fwd;
761 	uint64_t	fw_total_fwd_bytes;
762 	uint64_t	fw_err_pko;
763 	uint64_t	fw_err_link;
764 	uint64_t	fw_err_drop;
765 	uint64_t	fw_err_tso;
766 	uint64_t	fw_tso;			/* number of tso requests */
767 	uint64_t	fw_tso_fwd;		/* number of packets segmented in tso */
768 	uint64_t	fw_tx_vxlan;
769 	uint64_t	fw_err_pki;
770 };
771 
772 struct octeon_link_stats {
773 	struct octeon_rx_stats	fromwire;
774 	struct octeon_tx_stats	fromhost;
775 
776 };
777 
778 static inline int
779 lio_opcode_slow_path(union octeon_rh *rh)
780 {
781 	uint16_t	subcode1, subcode2;
782 
783 	subcode1 = LIO_OPCODE_SUBCODE((rh)->r.opcode, (rh)->r.subcode);
784 	subcode2 = LIO_OPCODE_SUBCODE(LIO_OPCODE_NIC, LIO_OPCODE_NIC_NW_DATA);
785 
786 	return (subcode2 != subcode1);
787 }
788 
789 struct octeon_mdio_cmd {
790 	uint64_t	op;
791 	uint64_t	mdio_addr;
792 	uint64_t	value1;
793 	uint64_t	value2;
794 	uint64_t	value3;
795 };
796 
797 struct octeon_intrmod_cfg {
798 	uint64_t	rx_enable;
799 	uint64_t	tx_enable;
800 	uint64_t	check_intrvl;
801 	uint64_t	maxpkt_ratethr;
802 	uint64_t	minpkt_ratethr;
803 	uint64_t	rx_maxcnt_trigger;
804 	uint64_t	rx_mincnt_trigger;
805 	uint64_t	rx_maxtmr_trigger;
806 	uint64_t	rx_mintmr_trigger;
807 	uint64_t	tx_mincnt_trigger;
808 	uint64_t	tx_maxcnt_trigger;
809 	uint64_t	rx_frames;
810 	uint64_t	tx_frames;
811 	uint64_t	rx_usecs;
812 };
813 
814 #define LIO_BASE_QUEUE_NOT_REQUESTED	65535
815 
816 union octeon_if_cfg {
817 	uint64_t	if_cfg64;
818 	struct {
819 #if BYTE_ORDER == BIG_ENDIAN
820 		uint64_t	base_queue:16;
821 		uint64_t	num_iqueues:16;
822 		uint64_t	num_oqueues:16;
823 		uint64_t	gmx_port_id:8;
824 		uint64_t	vf_id:8;
825 
826 #else	/* BYTE_ORDER != BIG_ENDIAN */
827 
828 		uint64_t	vf_id:8;
829 		uint64_t	gmx_port_id:8;
830 		uint64_t	num_oqueues:16;
831 		uint64_t	num_iqueues:16;
832 		uint64_t	base_queue:16;
833 #endif	/* BYTE_ORDER == BIG_ENDIAN */
834 	}	s;
835 };
836 
837 #endif	/* __LIO_COMMON_H__ */
838