xref: /freebsd/sys/dev/ixgbe/ixgbe_sriov.h (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /******************************************************************************
2 
3   Copyright (c) 2001-2020, Intel Corporation
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32 ******************************************************************************/
33 
34 
35 #ifndef _IXGBE_SRIOV_H_
36 #define _IXGBE_SRIOV_H_
37 
38 #ifdef PCI_IOV
39 
40 #include <sys/nv.h>
41 #include <sys/iov_schema.h>
42 #include <dev/pci/pci_iov.h>
43 #include <net/iflib.h>
44 #include "ixgbe_mbx.h"
45 
46 #define IXGBE_VF_CTS            (1 << 0) /* VF is clear to send. */
47 #define IXGBE_VF_CAP_MAC        (1 << 1) /* VF is permitted to change MAC. */
48 #define IXGBE_VF_CAP_VLAN       (1 << 2) /* VF is permitted to join vlans. */
49 #define IXGBE_VF_ACTIVE         (1 << 3) /* VF is active. */
50 #define IXGBE_VF_INDEX(vmdq)    ((vmdq) / 32)
51 #define IXGBE_VF_BIT(vmdq)      (1 << ((vmdq) % 32))
52 
53 #define IXGBE_VT_MSG_MASK	0xFFFF
54 
55 #define IXGBE_VT_MSGINFO(msg)	\
56 	(((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)
57 
58 #define IXGBE_VF_GET_QUEUES_RESP_LEN	5
59 
60 #define IXGBE_API_VER_1_0	0
61 #define IXGBE_API_VER_2_0	1	/* Solaris API.  Not supported. */
62 #define IXGBE_API_VER_1_1	2
63 #define IXGBE_API_VER_UNKNOWN	UINT16_MAX
64 
65 #define IXGBE_NO_VM             0
66 #define IXGBE_32_VM             32
67 #define IXGBE_64_VM             64
68 
69 int  ixgbe_if_iov_vf_add(if_ctx_t, u16, const nvlist_t *);
70 int  ixgbe_if_iov_init(if_ctx_t, u16, const nvlist_t *);
71 void ixgbe_if_iov_uninit(if_ctx_t);
72 void ixgbe_initialize_iov(struct ixgbe_softc *);
73 void ixgbe_recalculate_max_frame(struct ixgbe_softc *);
74 void ixgbe_ping_all_vfs(struct ixgbe_softc *);
75 int  ixgbe_pci_iov_detach(device_t);
76 void ixgbe_define_iov_schemas(device_t, int *);
77 void ixgbe_align_all_queue_indices(struct ixgbe_softc *);
78 int  ixgbe_vf_que_index(int, int, int);
79 u32  ixgbe_get_mtqc(int);
80 u32  ixgbe_get_mrqc(int);
81 
82 /******************************************************************************/
83 #else  /* PCI_IOV */
84 /******************************************************************************/
85 
86 #define ixgbe_add_vf(_a,_b,_c)
87 #define ixgbe_init_iov(_a,_b,_c)
88 #define ixgbe_uninit_iov(_a)
89 #define ixgbe_initialize_iov(_a)
90 #define ixgbe_recalculate_max_frame(_a)
91 #define ixgbe_ping_all_vfs(_a)
92 #define ixgbe_pci_iov_detach(_a) 0
93 #define ixgbe_define_iov_schemas(_a,_b)
94 #define ixgbe_align_all_queue_indices(_a)
95 #define ixgbe_vf_que_index(_a, _b, _c) (_c)
96 #define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
97 #define ixgbe_get_mrqc(_a) 0
98 
99 #endif /* PCI_IOV */
100 
101 void ixgbe_if_init(if_ctx_t ctx);
102 void ixgbe_handle_mbx(void *);
103 
104 #endif
105