1 /****************************************************************************** 2 3 Copyright (c) 2001-2012, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #ifndef _IXGBE_OS_H_ 36 #define _IXGBE_OS_H_ 37 38 #include <sys/types.h> 39 #include <sys/param.h> 40 #include <sys/endian.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/protosw.h> 44 #include <sys/socket.h> 45 #include <sys/malloc.h> 46 #include <sys/kernel.h> 47 #include <sys/bus.h> 48 #include <machine/bus.h> 49 #include <sys/rman.h> 50 #include <machine/resource.h> 51 #include <vm/vm.h> 52 #include <vm/pmap.h> 53 #include <machine/clock.h> 54 #include <dev/pci/pcivar.h> 55 #include <dev/pci/pcireg.h> 56 57 #define ASSERT(x) if(!(x)) panic("IXGBE: x") 58 #define EWARN(H, W, S) printf(W) 59 60 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */ 61 #define usec_delay(x) DELAY(x) 62 #define msec_delay(x) DELAY(1000*(x)) 63 64 #define DBG 0 65 #define MSGOUT(S, A, B) printf(S "\n", A, B) 66 #define DEBUGFUNC(F) DEBUGOUT(F); 67 #if DBG 68 #define DEBUGOUT(S) printf(S "\n") 69 #define DEBUGOUT1(S,A) printf(S "\n",A) 70 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B) 71 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C) 72 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G) 73 #else 74 #define DEBUGOUT(S) 75 #define DEBUGOUT1(S,A) 76 #define DEBUGOUT2(S,A,B) 77 #define DEBUGOUT3(S,A,B,C) 78 #define DEBUGOUT6(S,A,B,C,D,E,F) 79 #define DEBUGOUT7(S,A,B,C,D,E,F,G) 80 #endif 81 82 #define FALSE 0 83 #define false 0 /* shared code requires this */ 84 #define TRUE 1 85 #define true 1 86 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 87 #define PCI_COMMAND_REGISTER PCIR_COMMAND 88 89 /* Bunch of defines for shared code bogosity */ 90 #define UNREFERENCED_PARAMETER(_p) 91 #define UNREFERENCED_1PARAMETER(_p) 92 #define UNREFERENCED_2PARAMETER(_p, _q) 93 #define UNREFERENCED_3PARAMETER(_p, _q, _r) 94 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 95 96 97 #define IXGBE_NTOHL(_i) ntohl(_i) 98 #define IXGBE_NTOHS(_i) ntohs(_i) 99 100 /* XXX these need to be revisited */ 101 #define IXGBE_CPU_TO_LE32 le32toh 102 #define IXGBE_LE32_TO_CPUS le32dec 103 104 typedef uint8_t u8; 105 typedef int8_t s8; 106 typedef uint16_t u16; 107 typedef uint32_t u32; 108 typedef int32_t s32; 109 typedef uint64_t u64; 110 #ifndef __bool_true_false_are_defined 111 typedef boolean_t bool; 112 #endif 113 114 /* shared code requires this */ 115 #define __le16 u16 116 #define __le32 u32 117 #define __le64 u64 118 #define __be16 u16 119 #define __be32 u32 120 #define __be64 u64 121 122 #define le16_to_cpu 123 124 #if __FreeBSD_version < 800000 125 #if defined(__i386__) || defined(__amd64__) 126 #define mb() __asm volatile("mfence" ::: "memory") 127 #define wmb() __asm volatile("sfence" ::: "memory") 128 #define rmb() __asm volatile("lfence" ::: "memory") 129 #else 130 #define mb() 131 #define rmb() 132 #define wmb() 133 #endif 134 #endif 135 136 #if defined(__i386__) || defined(__amd64__) 137 static __inline 138 void prefetch(void *x) 139 { 140 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 141 } 142 #else 143 #define prefetch(x) 144 #endif 145 146 /* 147 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes 148 * non-overlapping regions and 32-byte padding on both src and dst. 149 */ 150 static __inline int 151 ixgbe_bcopy(void *_src, void *_dst, int l) 152 { 153 uint64_t *src = _src; 154 uint64_t *dst = _dst; 155 156 for (; l > 0; l -= 32) { 157 *dst++ = *src++; 158 *dst++ = *src++; 159 *dst++ = *src++; 160 *dst++ = *src++; 161 } 162 return (0); 163 } 164 165 struct ixgbe_osdep 166 { 167 bus_space_tag_t mem_bus_space_tag; 168 bus_space_handle_t mem_bus_space_handle; 169 struct device *dev; 170 }; 171 172 /* These routines are needed by the shared code */ 173 struct ixgbe_hw; 174 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 175 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 176 177 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 178 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 179 180 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 181 182 #define IXGBE_READ_REG(a, reg) (\ 183 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 184 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 185 reg)) 186 187 #define IXGBE_WRITE_REG(a, reg, value) (\ 188 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 189 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 190 reg, value)) 191 192 193 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\ 194 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 195 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 196 (reg + ((offset) << 2)))) 197 198 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\ 199 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 200 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 201 (reg + ((offset) << 2)), value)) 202 203 204 #endif /* _IXGBE_OS_H_ */ 205