1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * BSD LICENSE 5 * 6 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * * Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * * Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in 17 * the documentation and/or other materials provided with the 18 * distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 #include <dev/isci/isci.h> 35 36 #include <sys/sysctl.h> 37 #include <sys/malloc.h> 38 39 #include <cam/cam_periph.h> 40 41 #include <dev/led/led.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 46 #include <dev/isci/scil/scic_logger.h> 47 #include <dev/isci/scil/scic_library.h> 48 #include <dev/isci/scil/scic_sgpio.h> 49 #include <dev/isci/scil/scic_user_callback.h> 50 51 #include <dev/isci/scil/scif_controller.h> 52 #include <dev/isci/scil/scif_library.h> 53 #include <dev/isci/scil/scif_logger.h> 54 #include <dev/isci/scil/scif_user_callback.h> 55 56 MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 57 58 struct isci_softc *g_isci; 59 uint32_t g_isci_debug_level = 0; 60 61 static int isci_probe(device_t); 62 static int isci_attach(device_t); 63 static int isci_detach(device_t); 64 65 int isci_initialize(struct isci_softc *isci); 66 67 void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 68 int nseg, int error); 69 70 static device_method_t isci_pci_methods[] = { 71 /* Device interface */ 72 DEVMETHOD(device_probe, isci_probe), 73 DEVMETHOD(device_attach, isci_attach), 74 DEVMETHOD(device_detach, isci_detach), 75 { 0, 0 } 76 }; 77 78 static driver_t isci_pci_driver = { 79 "isci", 80 isci_pci_methods, 81 sizeof(struct isci_softc), 82 }; 83 84 DRIVER_MODULE(isci, pci, isci_pci_driver, 0, 0); 85 MODULE_DEPEND(isci, cam, 1, 1, 1); 86 87 static struct _pcsid 88 { 89 u_int32_t type; 90 const char *desc; 91 } pci_ids[] = { 92 { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 93 { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 94 { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 95 { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 96 { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 97 { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 98 { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 99 { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 100 { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 101 { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 102 { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 103 { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 104 { 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" }, 105 { 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" }, 106 { 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" }, 107 { 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 108 { 0x00000000, NULL } 109 }; 110 111 static int 112 isci_probe (device_t device) 113 { 114 u_int32_t type = pci_get_devid(device); 115 struct _pcsid *ep = pci_ids; 116 117 while (ep->type && ep->type != type) 118 ++ep; 119 120 if (ep->desc) 121 { 122 device_set_desc(device, ep->desc); 123 return (BUS_PROBE_DEFAULT); 124 } 125 else 126 return (ENXIO); 127 } 128 129 static int 130 isci_allocate_pci_memory(struct isci_softc *isci) 131 { 132 int i; 133 134 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 135 { 136 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 137 138 pci_bar->resource_id = PCIR_BAR(i*2); 139 pci_bar->resource = bus_alloc_resource_any(isci->device, 140 SYS_RES_MEMORY, &pci_bar->resource_id, 141 RF_ACTIVE); 142 143 if(pci_bar->resource == NULL) 144 isci_log_message(0, "ISCI", 145 "unable to allocate pci resource\n"); 146 else { 147 pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 148 pci_bar->bus_handle = 149 rman_get_bushandle(pci_bar->resource); 150 } 151 } 152 153 return (0); 154 } 155 156 static int 157 isci_attach(device_t device) 158 { 159 int error; 160 struct isci_softc *isci = DEVICE2SOFTC(device); 161 162 g_isci = isci; 163 isci->device = device; 164 pci_enable_busmaster(device); 165 166 isci_allocate_pci_memory(isci); 167 168 error = isci_initialize(isci); 169 170 if (error) 171 { 172 isci_detach(device); 173 return (error); 174 } 175 176 isci_interrupt_setup(isci); 177 isci_sysctl_initialize(isci); 178 179 return (0); 180 } 181 182 static int 183 isci_detach(device_t device) 184 { 185 struct isci_softc *isci = DEVICE2SOFTC(device); 186 int i, phy; 187 188 for (i = 0; i < isci->controller_count; i++) { 189 struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 190 SCI_STATUS status; 191 void *unmap_buffer; 192 193 if (controller->scif_controller_handle != NULL) { 194 scic_controller_disable_interrupts( 195 scif_controller_get_scic_handle(controller->scif_controller_handle)); 196 197 mtx_lock(&controller->lock); 198 status = scif_controller_stop(controller->scif_controller_handle, 0); 199 mtx_unlock(&controller->lock); 200 201 while (controller->is_started == TRUE) { 202 /* Now poll for interrupts until the controller stop complete 203 * callback is received. 204 */ 205 mtx_lock(&controller->lock); 206 isci_interrupt_poll_handler(controller); 207 mtx_unlock(&controller->lock); 208 pause("isci", 1); 209 } 210 211 if(controller->sim != NULL) { 212 mtx_lock(&controller->lock); 213 xpt_free_path(controller->path); 214 xpt_bus_deregister(cam_sim_path(controller->sim)); 215 cam_sim_free(controller->sim, TRUE); 216 mtx_unlock(&controller->lock); 217 } 218 } 219 220 if (controller->timer_memory != NULL) 221 free(controller->timer_memory, M_ISCI); 222 223 if (controller->remote_device_memory != NULL) 224 free(controller->remote_device_memory, M_ISCI); 225 226 for (phy = 0; phy < SCI_MAX_PHYS; phy++) { 227 if (controller->phys[phy].cdev_fault) 228 led_destroy(controller->phys[phy].cdev_fault); 229 230 if (controller->phys[phy].cdev_locate) 231 led_destroy(controller->phys[phy].cdev_locate); 232 } 233 234 while (1) { 235 sci_pool_get(controller->unmap_buffer_pool, unmap_buffer); 236 if (unmap_buffer == NULL) 237 break; 238 contigfree(unmap_buffer, PAGE_SIZE, M_ISCI); 239 } 240 } 241 242 /* The SCIF controllers have been stopped, so we can now 243 * free the SCI library memory. 244 */ 245 if (isci->sci_library_memory != NULL) 246 free(isci->sci_library_memory, M_ISCI); 247 248 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 249 { 250 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 251 252 if (pci_bar->resource != NULL) 253 bus_release_resource(device, SYS_RES_MEMORY, 254 pci_bar->resource_id, pci_bar->resource); 255 } 256 257 for (i = 0; i < isci->num_interrupts; i++) 258 { 259 struct ISCI_INTERRUPT_INFO *interrupt_info; 260 261 interrupt_info = &isci->interrupt_info[i]; 262 263 if(interrupt_info->tag != NULL) 264 bus_teardown_intr(device, interrupt_info->res, 265 interrupt_info->tag); 266 267 if(interrupt_info->res != NULL) 268 bus_release_resource(device, SYS_RES_IRQ, 269 rman_get_rid(interrupt_info->res), 270 interrupt_info->res); 271 272 pci_release_msi(device); 273 } 274 pci_disable_busmaster(device); 275 276 return (0); 277 } 278 279 int 280 isci_initialize(struct isci_softc *isci) 281 { 282 int error; 283 uint32_t status = 0; 284 uint32_t library_object_size; 285 uint32_t verbosity_mask; 286 uint32_t scic_log_object_mask; 287 uint32_t scif_log_object_mask; 288 uint8_t *header_buffer; 289 290 library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 291 292 isci->sci_library_memory = 293 malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 294 295 isci->sci_library_handle = scif_library_construct( 296 isci->sci_library_memory, SCI_MAX_CONTROLLERS); 297 298 sci_object_set_association( isci->sci_library_handle, (void *)isci); 299 300 verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 301 (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 302 (1<<SCI_LOG_VERBOSITY_TRACE); 303 304 scic_log_object_mask = 0xFFFFFFFF; 305 scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 306 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 307 scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 308 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 309 scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 310 311 scif_log_object_mask = 0xFFFFFFFF; 312 scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 313 scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 314 315 TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 316 317 sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 318 scif_log_object_mask, verbosity_mask); 319 320 sci_logger_enable(sci_object_get_logger( 321 scif_library_get_scic_handle(isci->sci_library_handle)), 322 scic_log_object_mask, verbosity_mask); 323 324 header_buffer = (uint8_t *)&isci->pci_common_header; 325 for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 326 header_buffer[i] = pci_read_config(isci->device, i, 1); 327 328 scic_library_set_pci_info( 329 scif_library_get_scic_handle(isci->sci_library_handle), 330 &isci->pci_common_header); 331 332 isci->oem_parameters_found = FALSE; 333 334 isci_get_oem_parameters(isci); 335 336 /* trigger interrupt if 32 completions occur before timeout expires */ 337 isci->coalesce_number = 32; 338 339 /* trigger interrupt if 2 microseconds elapse after a completion occurs, 340 * regardless if "coalesce_number" completions have occurred 341 */ 342 isci->coalesce_timeout = 2; 343 344 isci->controller_count = scic_library_get_pci_device_controller_count( 345 scif_library_get_scic_handle(isci->sci_library_handle)); 346 347 for (int index = 0; index < isci->controller_count; index++) { 348 struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 349 SCI_CONTROLLER_HANDLE_T scif_controller_handle; 350 351 controller->index = index; 352 isci_controller_construct(controller, isci); 353 354 scif_controller_handle = controller->scif_controller_handle; 355 356 status = isci_controller_initialize(controller); 357 358 if(status != SCI_SUCCESS) { 359 isci_log_message(0, "ISCI", 360 "isci_controller_initialize FAILED: %x\n", 361 status); 362 return (status); 363 } 364 365 error = isci_controller_allocate_memory(controller); 366 367 if (error != 0) 368 return (error); 369 370 scif_controller_set_interrupt_coalescence( 371 scif_controller_handle, isci->coalesce_number, 372 isci->coalesce_timeout); 373 } 374 375 /* FreeBSD provides us a hook to ensure we get a chance to start 376 * our controllers and complete initial domain discovery before 377 * it searches for the boot device. Once we're done, we'll 378 * disestablish the hook, signaling the kernel that is can proceed 379 * with the boot process. 380 */ 381 isci->config_hook.ich_func = &isci_controller_start; 382 isci->config_hook.ich_arg = &isci->controllers[0]; 383 384 if (config_intrhook_establish(&isci->config_hook) != 0) 385 isci_log_message(0, "ISCI", 386 "config_intrhook_establish failed!\n"); 387 388 return (status); 389 } 390 391 void 392 isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 393 int nseg, int error) 394 { 395 struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 396 397 memory->error = error; 398 399 if (nseg != 1 || error != 0) 400 isci_log_message(0, "ISCI", 401 "Failed to allocate physically contiguous memory!\n"); 402 else 403 memory->physical_address = seg->ds_addr; 404 } 405 406 int 407 isci_allocate_dma_buffer(device_t device, struct ISCI_CONTROLLER *controller, 408 struct ISCI_MEMORY *memory) 409 { 410 uint32_t status; 411 412 status = bus_dma_tag_create(bus_get_dma_tag(device), 413 0x40 /* cacheline alignment */, 414 ISCI_DMA_BOUNDARY, BUS_SPACE_MAXADDR, 415 BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 416 0x1 /* we want physically contiguous */, 417 memory->size, 0, busdma_lock_mutex, &controller->lock, 418 &memory->dma_tag); 419 420 if(status == ENOMEM) { 421 isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 422 return (status); 423 } 424 425 status = bus_dmamem_alloc(memory->dma_tag, 426 (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 427 428 if(status == ENOMEM) 429 { 430 isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 431 return (status); 432 } 433 434 status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 435 (void *)memory->virtual_address, memory->size, 436 isci_allocate_dma_buffer_callback, memory, 0); 437 438 if(status == EINVAL) 439 { 440 isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 441 return (status); 442 } 443 444 return (0); 445 } 446 447 /** 448 * @brief This callback method asks the user to associate the supplied 449 * lock with an operating environment specific locking construct. 450 * 451 * @param[in] controller This parameter specifies the controller with 452 * which this lock is to be associated. 453 * @param[in] lock This parameter specifies the lock for which the 454 * user should associate an operating environment specific 455 * locking object. 456 * 457 * @see The SCI_LOCK_LEVEL enumeration for more information. 458 * 459 * @return none. 460 */ 461 void 462 scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 463 SCI_LOCK_HANDLE_T lock) 464 { 465 466 } 467 468 /** 469 * @brief This callback method asks the user to de-associate the supplied 470 * lock with an operating environment specific locking construct. 471 * 472 * @param[in] controller This parameter specifies the controller with 473 * which this lock is to be de-associated. 474 * @param[in] lock This parameter specifies the lock for which the 475 * user should de-associate an operating environment specific 476 * locking object. 477 * 478 * @see The SCI_LOCK_LEVEL enumeration for more information. 479 * 480 * @return none. 481 */ 482 void 483 scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 484 SCI_LOCK_HANDLE_T lock) 485 { 486 487 } 488 489 490 /** 491 * @brief This callback method asks the user to acquire/get the lock. 492 * This method should pend until the lock has been acquired. 493 * 494 * @param[in] controller This parameter specifies the controller with 495 * which this lock is associated. 496 * @param[in] lock This parameter specifies the lock to be acquired. 497 * 498 * @return none 499 */ 500 void 501 scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 502 SCI_LOCK_HANDLE_T lock) 503 { 504 505 } 506 507 /** 508 * @brief This callback method asks the user to release a lock. 509 * 510 * @param[in] controller This parameter specifies the controller with 511 * which this lock is associated. 512 * @param[in] lock This parameter specifies the lock to be released. 513 * 514 * @return none 515 */ 516 void 517 scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 518 SCI_LOCK_HANDLE_T lock) 519 { 520 } 521 522 /** 523 * @brief This callback method creates an OS specific deferred task 524 * for internal usage. The handler to deferred task is stored by OS 525 * driver. 526 * 527 * @param[in] controller This parameter specifies the controller object 528 * with which this callback is associated. 529 * 530 * @return none 531 */ 532 void 533 scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 534 { 535 536 } 537 538 /** 539 * @brief This callback method schedules a OS specific deferred task. 540 * 541 * @param[in] controller This parameter specifies the controller 542 * object with which this callback is associated. 543 * @param[in] start_internal_io_task_routine This parameter specifies the 544 * sci start_internal_io routine. 545 * @param[in] context This parameter specifies a handle to a parameter 546 * that will be passed into the "start_internal_io_task_routine" 547 * when it is invoked. 548 * 549 * @return none 550 */ 551 void 552 scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 553 FUNCPTR start_internal_io_task_routine, void *context) 554 { 555 /** @todo Use FreeBSD tasklet to defer this routine to a later time, 556 * rather than calling the routine inline. 557 */ 558 SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 559 (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 560 561 sci_start_internal_io_routine(context); 562 } 563 564 /** 565 * @brief In this method the user must write to PCI memory via access. 566 * This method is used for access to memory space and IO space. 567 * 568 * @param[in] controller The controller for which to read a DWORD. 569 * @param[in] address This parameter depicts the address into 570 * which to write. 571 * @param[out] write_value This parameter depicts the value being written 572 * into the PCI memory location. 573 * 574 * @todo These PCI memory access calls likely needs to be optimized into macros? 575 */ 576 void 577 scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 578 void *address, uint32_t write_value) 579 { 580 SCI_CONTROLLER_HANDLE_T scif_controller = 581 (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 582 struct ISCI_CONTROLLER *isci_controller = 583 (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 584 struct isci_softc *isci = isci_controller->isci; 585 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 586 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 587 588 bus_space_write_4(isci->pci_bar[bar].bus_tag, 589 isci->pci_bar[bar].bus_handle, offset, write_value); 590 } 591 592 /** 593 * @brief In this method the user must read from PCI memory via access. 594 * This method is used for access to memory space and IO space. 595 * 596 * @param[in] controller The controller for which to read a DWORD. 597 * @param[in] address This parameter depicts the address from 598 * which to read. 599 * 600 * @return The value being returned from the PCI memory location. 601 * 602 * @todo This PCI memory access calls likely need to be optimized into macro? 603 */ 604 uint32_t 605 scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 606 { 607 SCI_CONTROLLER_HANDLE_T scif_controller = 608 (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 609 struct ISCI_CONTROLLER *isci_controller = 610 (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 611 struct isci_softc *isci = isci_controller->isci; 612 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 613 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 614 615 return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 616 isci->pci_bar[bar].bus_handle, offset)); 617 } 618 619 /** 620 * @brief This method is called when the core requires the OS driver 621 * to stall execution. This method is utilized during initialization 622 * or non-performance paths only. 623 * 624 * @param[in] microseconds This parameter specifies the number of 625 * microseconds for which to stall. The operating system driver 626 * is allowed to round this value up where necessary. 627 * 628 * @return none. 629 */ 630 void 631 scic_cb_stall_execution(uint32_t microseconds) 632 { 633 634 DELAY(microseconds); 635 } 636 637 /** 638 * @brief In this method the user must return the base address register (BAR) 639 * value for the supplied base address register number. 640 * 641 * @param[in] controller The controller for which to retrieve the bar number. 642 * @param[in] bar_number This parameter depicts the BAR index/number to be read. 643 * 644 * @return Return a pointer value indicating the contents of the BAR. 645 * @retval NULL indicates an invalid BAR index/number was specified. 646 * @retval All other values indicate a valid VIRTUAL address from the BAR. 647 */ 648 void * 649 scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 650 uint16_t bar_number) 651 { 652 653 return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 654 } 655 656 /** 657 * @brief This method informs the SCI Core user that a phy/link became 658 * ready, but the phy is not allowed in the port. In some 659 * situations the underlying hardware only allows for certain phy 660 * to port mappings. If these mappings are violated, then this 661 * API is invoked. 662 * 663 * @param[in] controller This parameter represents the controller which 664 * contains the port. 665 * @param[in] port This parameter specifies the SCI port object for which 666 * the callback is being invoked. 667 * @param[in] phy This parameter specifies the phy that came ready, but the 668 * phy can't be a valid member of the port. 669 * 670 * @return none 671 */ 672 void 673 scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 674 SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 675 { 676 677 } 678