1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2023 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #include "irdma_main.h" 36 37 /** 38 * irdma_query_device - get device attributes 39 * @ibdev: device pointer from stack 40 * @props: returning device attributes 41 * @udata: user data 42 */ 43 static int 44 irdma_query_device(struct ib_device *ibdev, 45 struct ib_device_attr *props, 46 struct ib_udata *udata) 47 { 48 struct irdma_device *iwdev = to_iwdev(ibdev); 49 struct irdma_pci_f *rf = iwdev->rf; 50 struct pci_dev *pcidev = iwdev->rf->pcidev; 51 struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs; 52 53 if (udata->inlen || udata->outlen) 54 return -EINVAL; 55 56 memset(props, 0, sizeof(*props)); 57 addrconf_addr_eui48((u8 *)&props->sys_image_guid, 58 if_getlladdr(iwdev->netdev)); 59 props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 | 60 irdma_fw_minor_ver(&rf->sc_dev); 61 props->device_cap_flags = IB_DEVICE_MEM_WINDOW | 62 IB_DEVICE_MEM_MGT_EXTENSIONS; 63 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 64 props->vendor_id = pcidev->vendor; 65 props->vendor_part_id = pcidev->device; 66 props->hw_ver = pcidev->revision; 67 props->page_size_cap = hw_attrs->page_size_cap; 68 props->max_mr_size = hw_attrs->max_mr_size; 69 props->max_qp = rf->max_qp - rf->used_qps; 70 props->max_qp_wr = hw_attrs->max_qp_wr; 71 set_max_sge(props, rf); 72 props->max_cq = rf->max_cq - rf->used_cqs; 73 props->max_cqe = rf->max_cqe - 1; 74 props->max_mr = rf->max_mr - rf->used_mrs; 75 props->max_mw = props->max_mr; 76 props->max_pd = rf->max_pd - rf->used_pds; 77 props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges; 78 props->max_qp_rd_atom = hw_attrs->max_hw_ird; 79 props->max_qp_init_rd_atom = hw_attrs->max_hw_ord; 80 if (rdma_protocol_roce(ibdev, 1)) { 81 props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN; 82 props->max_pkeys = IRDMA_PKEY_TBL_SZ; 83 props->max_ah = rf->max_ah; 84 if (hw_attrs->uk_attrs.hw_rev == IRDMA_GEN_2) { 85 props->max_mcast_grp = rf->max_mcg; 86 props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX; 87 props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX; 88 } 89 } 90 props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR; 91 if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2) 92 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 93 94 return 0; 95 } 96 97 static int 98 irdma_mmap_legacy(struct irdma_ucontext *ucontext, 99 struct vm_area_struct *vma) 100 { 101 u64 pfn; 102 103 if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE) 104 return -EINVAL; 105 106 vma->vm_private_data = ucontext; 107 pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] + 108 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT; 109 110 #if __FreeBSD_version >= 1400026 111 return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE, 112 pgprot_noncached(vma->vm_page_prot), NULL); 113 #else 114 return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE, 115 pgprot_noncached(vma->vm_page_prot)); 116 #endif 117 } 118 119 #if __FreeBSD_version >= 1400026 120 static void 121 irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry) 122 { 123 struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry); 124 125 kfree(entry); 126 } 127 128 struct rdma_user_mmap_entry * 129 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset, 130 enum irdma_mmap_flag mmap_flag, u64 *mmap_offset) 131 { 132 struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL); 133 int ret; 134 135 if (!entry) 136 return NULL; 137 138 entry->bar_offset = bar_offset; 139 entry->mmap_flag = mmap_flag; 140 141 ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext, 142 &entry->rdma_entry, PAGE_SIZE); 143 if (ret) { 144 kfree(entry); 145 return NULL; 146 } 147 *mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry); 148 149 return &entry->rdma_entry; 150 } 151 152 #else 153 static inline bool 154 find_key_in_mmap_tbl(struct irdma_ucontext *ucontext, u64 key) 155 { 156 struct irdma_user_mmap_entry *entry; 157 158 HASH_FOR_EACH_POSSIBLE(ucontext->mmap_hash_tbl, entry, hlist, key) { 159 if (entry->pgoff_key == key) 160 return true; 161 } 162 163 return false; 164 } 165 166 struct irdma_user_mmap_entry * 167 irdma_user_mmap_entry_add_hash(struct irdma_ucontext *ucontext, u64 bar_offset, 168 enum irdma_mmap_flag mmap_flag, u64 *mmap_offset) 169 { 170 struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL); 171 unsigned long flags; 172 int retry_cnt = 0; 173 174 if (!entry) 175 return NULL; 176 177 entry->bar_offset = bar_offset; 178 entry->mmap_flag = mmap_flag; 179 entry->ucontext = ucontext; 180 do { 181 get_random_bytes(&entry->pgoff_key, sizeof(entry->pgoff_key)); 182 183 /* The key is a page offset */ 184 entry->pgoff_key >>= PAGE_SHIFT; 185 186 /* In the event of a collision in the hash table, retry a new key */ 187 spin_lock_irqsave(&ucontext->mmap_tbl_lock, flags); 188 if (!find_key_in_mmap_tbl(ucontext, entry->pgoff_key)) { 189 HASH_ADD(ucontext->mmap_hash_tbl, &entry->hlist, entry->pgoff_key); 190 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 191 goto hash_add_done; 192 } 193 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 194 } while (retry_cnt++ < 10); 195 196 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 197 "mmap table add failed: Cannot find a unique key\n"); 198 kfree(entry); 199 return NULL; 200 201 hash_add_done: 202 /* libc mmap uses a byte offset */ 203 *mmap_offset = entry->pgoff_key << PAGE_SHIFT; 204 205 return entry; 206 } 207 208 static struct irdma_user_mmap_entry * 209 irdma_find_user_mmap_entry(struct irdma_ucontext *ucontext, 210 struct vm_area_struct *vma) 211 { 212 struct irdma_user_mmap_entry *entry; 213 unsigned long flags; 214 215 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 216 return NULL; 217 218 spin_lock_irqsave(&ucontext->mmap_tbl_lock, flags); 219 HASH_FOR_EACH_POSSIBLE(ucontext->mmap_hash_tbl, entry, hlist, vma->vm_pgoff) { 220 if (entry->pgoff_key == vma->vm_pgoff) { 221 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 222 return entry; 223 } 224 } 225 226 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 227 228 return NULL; 229 } 230 231 void 232 irdma_user_mmap_entry_del_hash(struct irdma_user_mmap_entry *entry) 233 { 234 struct irdma_ucontext *ucontext; 235 unsigned long flags; 236 237 if (!entry) 238 return; 239 240 ucontext = entry->ucontext; 241 242 spin_lock_irqsave(&ucontext->mmap_tbl_lock, flags); 243 HASH_DEL(ucontext->mmap_hash_tbl, &entry->hlist); 244 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 245 246 kfree(entry); 247 } 248 249 #endif 250 /** 251 * irdma_mmap - user memory map 252 * @context: context created during alloc 253 * @vma: kernel info for user memory map 254 */ 255 static int 256 irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 257 { 258 #if __FreeBSD_version >= 1400026 259 struct rdma_user_mmap_entry *rdma_entry; 260 #endif 261 struct irdma_user_mmap_entry *entry; 262 struct irdma_ucontext *ucontext; 263 u64 pfn; 264 int ret; 265 266 ucontext = to_ucontext(context); 267 268 /* Legacy support for libi40iw with hard-coded mmap key */ 269 if (ucontext->legacy_mode) 270 return irdma_mmap_legacy(ucontext, vma); 271 272 #if __FreeBSD_version >= 1400026 273 rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma); 274 if (!rdma_entry) { 275 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 276 "pgoff[0x%lx] does not have valid entry\n", 277 vma->vm_pgoff); 278 return -EINVAL; 279 } 280 281 entry = to_irdma_mmap_entry(rdma_entry); 282 #else 283 entry = irdma_find_user_mmap_entry(ucontext, vma); 284 if (!entry) { 285 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 286 "pgoff[0x%lx] does not have valid entry\n", 287 vma->vm_pgoff); 288 return -EINVAL; 289 } 290 #endif 291 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 292 "bar_offset [0x%lx] mmap_flag [%d]\n", entry->bar_offset, 293 entry->mmap_flag); 294 295 pfn = (entry->bar_offset + 296 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT; 297 298 switch (entry->mmap_flag) { 299 case IRDMA_MMAP_IO_NC: 300 #if __FreeBSD_version >= 1400026 301 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 302 pgprot_noncached(vma->vm_page_prot), 303 rdma_entry); 304 #else 305 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 306 pgprot_noncached(vma->vm_page_prot)); 307 #endif 308 break; 309 case IRDMA_MMAP_IO_WC: 310 #if __FreeBSD_version >= 1400026 311 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 312 pgprot_writecombine(vma->vm_page_prot), 313 rdma_entry); 314 #else 315 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 316 pgprot_writecombine(vma->vm_page_prot)); 317 #endif 318 break; 319 default: 320 ret = -EINVAL; 321 } 322 323 if (ret) 324 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 325 "bar_offset [0x%lx] mmap_flag[%d] err[%d]\n", 326 entry->bar_offset, entry->mmap_flag, ret); 327 #if __FreeBSD_version >= 1400026 328 rdma_user_mmap_entry_put(rdma_entry); 329 #endif 330 331 return ret; 332 } 333 334 /** 335 * irdma_alloc_push_page - allocate a push page for qp 336 * @iwqp: qp pointer 337 */ 338 static void 339 irdma_alloc_push_page(struct irdma_qp *iwqp) 340 { 341 struct irdma_cqp_request *cqp_request; 342 struct cqp_cmds_info *cqp_info; 343 struct irdma_device *iwdev = iwqp->iwdev; 344 struct irdma_sc_qp *qp = &iwqp->sc_qp; 345 int status; 346 347 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 348 if (!cqp_request) 349 return; 350 351 cqp_info = &cqp_request->info; 352 cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE; 353 cqp_info->post_sq = 1; 354 cqp_info->in.u.manage_push_page.info.push_idx = 0; 355 cqp_info->in.u.manage_push_page.info.qs_handle = 356 qp->vsi->qos[qp->user_pri].qs_handle; 357 cqp_info->in.u.manage_push_page.info.free_page = 0; 358 cqp_info->in.u.manage_push_page.info.push_page_type = 0; 359 cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp; 360 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request; 361 362 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 363 if (!status && cqp_request->compl_info.op_ret_val < 364 iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) { 365 qp->push_idx = cqp_request->compl_info.op_ret_val; 366 qp->push_offset = 0; 367 } 368 369 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 370 } 371 372 /** 373 * irdma_get_pbl - Retrieve pbl from a list given a virtual 374 * address 375 * @va: user virtual address 376 * @pbl_list: pbl list to search in (QP's or CQ's) 377 */ 378 struct irdma_pbl * 379 irdma_get_pbl(unsigned long va, 380 struct list_head *pbl_list) 381 { 382 struct irdma_pbl *iwpbl; 383 384 list_for_each_entry(iwpbl, pbl_list, list) { 385 if (iwpbl->user_base == va) { 386 list_del(&iwpbl->list); 387 iwpbl->on_list = false; 388 return iwpbl; 389 } 390 } 391 392 return NULL; 393 } 394 395 /** 396 * irdma_clean_cqes - clean cq entries for qp 397 * @iwqp: qp ptr (user or kernel) 398 * @iwcq: cq ptr 399 */ 400 void 401 irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq) 402 { 403 struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk; 404 unsigned long flags; 405 406 spin_lock_irqsave(&iwcq->lock, flags); 407 irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq); 408 spin_unlock_irqrestore(&iwcq->lock, flags); 409 } 410 411 static u64 irdma_compute_push_wqe_offset(struct irdma_device *iwdev, u32 page_idx){ 412 u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET]; 413 414 if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_2) { 415 /* skip over db page */ 416 bar_off += IRDMA_HW_PAGE_SIZE; 417 /* skip over reserved space */ 418 bar_off += IRDMA_PF_BAR_RSVD; 419 } 420 421 /* push wqe page */ 422 bar_off += (u64)page_idx * IRDMA_HW_PAGE_SIZE; 423 424 return bar_off; 425 } 426 427 void 428 irdma_remove_push_mmap_entries(struct irdma_qp *iwqp) 429 { 430 if (iwqp->push_db_mmap_entry) { 431 #if __FreeBSD_version >= 1400026 432 rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry); 433 #else 434 irdma_user_mmap_entry_del_hash(iwqp->push_db_mmap_entry); 435 #endif 436 iwqp->push_db_mmap_entry = NULL; 437 } 438 if (iwqp->push_wqe_mmap_entry) { 439 #if __FreeBSD_version >= 1400026 440 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry); 441 #else 442 irdma_user_mmap_entry_del_hash(iwqp->push_wqe_mmap_entry); 443 #endif 444 iwqp->push_wqe_mmap_entry = NULL; 445 } 446 } 447 448 static int 449 irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext, 450 struct irdma_qp *iwqp, 451 u64 *push_wqe_mmap_key, 452 u64 *push_db_mmap_key) 453 { 454 struct irdma_device *iwdev = ucontext->iwdev; 455 u64 bar_off; 456 457 WARN_ON_ONCE(iwdev->rf->sc_dev.hw_attrs.uk_attrs.hw_rev < IRDMA_GEN_2); 458 459 bar_off = irdma_compute_push_wqe_offset(iwdev, iwqp->sc_qp.push_idx); 460 461 #if __FreeBSD_version >= 1400026 462 iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext, 463 bar_off, IRDMA_MMAP_IO_WC, 464 push_wqe_mmap_key); 465 #else 466 iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_add_hash(ucontext, bar_off, 467 IRDMA_MMAP_IO_WC, 468 push_wqe_mmap_key); 469 #endif 470 if (!iwqp->push_wqe_mmap_entry) 471 return -ENOMEM; 472 473 /* push doorbell page */ 474 bar_off += IRDMA_HW_PAGE_SIZE; 475 #if __FreeBSD_version >= 1400026 476 iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext, 477 bar_off, IRDMA_MMAP_IO_NC, 478 push_db_mmap_key); 479 #else 480 481 iwqp->push_db_mmap_entry = irdma_user_mmap_entry_add_hash(ucontext, bar_off, 482 IRDMA_MMAP_IO_NC, 483 push_db_mmap_key); 484 #endif 485 if (!iwqp->push_db_mmap_entry) { 486 #if __FreeBSD_version >= 1400026 487 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry); 488 #else 489 irdma_user_mmap_entry_del_hash(iwqp->push_wqe_mmap_entry); 490 #endif 491 return -ENOMEM; 492 } 493 494 return 0; 495 } 496 497 /** 498 * irdma_setup_virt_qp - setup for allocation of virtual qp 499 * @iwdev: irdma device 500 * @iwqp: qp ptr 501 * @init_info: initialize info to return 502 */ 503 void 504 irdma_setup_virt_qp(struct irdma_device *iwdev, 505 struct irdma_qp *iwqp, 506 struct irdma_qp_init_info *init_info) 507 { 508 struct irdma_pbl *iwpbl = iwqp->iwpbl; 509 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr; 510 511 iwqp->page = qpmr->sq_page; 512 init_info->shadow_area_pa = qpmr->shadow; 513 if (iwpbl->pbl_allocated) { 514 init_info->virtual_map = true; 515 init_info->sq_pa = qpmr->sq_pbl.idx; 516 init_info->rq_pa = qpmr->rq_pbl.idx; 517 } else { 518 init_info->sq_pa = qpmr->sq_pbl.addr; 519 init_info->rq_pa = qpmr->rq_pbl.addr; 520 } 521 } 522 523 /** 524 * irdma_setup_umode_qp - setup sq and rq size in user mode qp 525 * @udata: user data 526 * @iwdev: iwarp device 527 * @iwqp: qp ptr (user or kernel) 528 * @info: initialize info to return 529 * @init_attr: Initial QP create attributes 530 */ 531 int 532 irdma_setup_umode_qp(struct ib_udata *udata, 533 struct irdma_device *iwdev, 534 struct irdma_qp *iwqp, 535 struct irdma_qp_init_info *info, 536 struct ib_qp_init_attr *init_attr) 537 { 538 #if __FreeBSD_version >= 1400026 539 struct irdma_ucontext *ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 540 #else 541 struct irdma_ucontext *ucontext = to_ucontext(iwqp->iwpd->ibpd.uobject->context); 542 #endif 543 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info; 544 struct irdma_create_qp_req req = {0}; 545 unsigned long flags; 546 int ret; 547 548 ret = ib_copy_from_udata(&req, udata, 549 min(sizeof(req), udata->inlen)); 550 if (ret) { 551 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 552 "ib_copy_from_data fail\n"); 553 return ret; 554 } 555 556 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx; 557 iwqp->user_mode = 1; 558 if (req.user_wqe_bufs) { 559 info->qp_uk_init_info.legacy_mode = ucontext->legacy_mode; 560 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 561 iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs, 562 &ucontext->qp_reg_mem_list); 563 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 564 565 if (!iwqp->iwpbl) { 566 ret = -ENODATA; 567 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 568 "no pbl info\n"); 569 return ret; 570 } 571 } 572 573 if (!ucontext->use_raw_attrs) { 574 /** 575 * Maintain backward compat with older ABI which passes sq and 576 * rq depth in quanta in cap.max_send_wr and cap.max_recv_wr. 577 * There is no way to compute the correct value of 578 * iwqp->max_send_wr/max_recv_wr in the kernel. 579 */ 580 iwqp->max_send_wr = init_attr->cap.max_send_wr; 581 iwqp->max_recv_wr = init_attr->cap.max_recv_wr; 582 ukinfo->sq_size = init_attr->cap.max_send_wr; 583 ukinfo->rq_size = init_attr->cap.max_recv_wr; 584 irdma_uk_calc_shift_wq(ukinfo, &ukinfo->sq_shift, &ukinfo->rq_shift); 585 } else { 586 ret = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth, 587 &ukinfo->sq_shift); 588 if (ret) 589 return ret; 590 591 ret = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth, 592 &ukinfo->rq_shift); 593 if (ret) 594 return ret; 595 596 iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift; 597 iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift; 598 ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift; 599 ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift; 600 } 601 irdma_setup_virt_qp(iwdev, iwqp, info); 602 603 return 0; 604 } 605 606 /** 607 * irdma_setup_kmode_qp - setup initialization for kernel mode qp 608 * @iwdev: iwarp device 609 * @iwqp: qp ptr (user or kernel) 610 * @info: initialize info to return 611 * @init_attr: Initial QP create attributes 612 */ 613 int 614 irdma_setup_kmode_qp(struct irdma_device *iwdev, 615 struct irdma_qp *iwqp, 616 struct irdma_qp_init_info *info, 617 struct ib_qp_init_attr *init_attr) 618 { 619 struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem; 620 u32 size; 621 int status; 622 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info; 623 624 status = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth, 625 &ukinfo->sq_shift); 626 if (status) 627 return status; 628 629 status = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth, 630 &ukinfo->rq_shift); 631 if (status) 632 return status; 633 634 iwqp->kqp.sq_wrid_mem = 635 kcalloc(ukinfo->sq_depth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL); 636 if (!iwqp->kqp.sq_wrid_mem) 637 return -ENOMEM; 638 639 iwqp->kqp.rq_wrid_mem = 640 kcalloc(ukinfo->rq_depth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL); 641 if (!iwqp->kqp.rq_wrid_mem) { 642 kfree(iwqp->kqp.sq_wrid_mem); 643 iwqp->kqp.sq_wrid_mem = NULL; 644 return -ENOMEM; 645 } 646 647 iwqp->kqp.sig_trk_mem = kcalloc(ukinfo->sq_depth, sizeof(u32), GFP_KERNEL); 648 memset(iwqp->kqp.sig_trk_mem, 0, ukinfo->sq_depth * sizeof(u32)); 649 if (!iwqp->kqp.sig_trk_mem) { 650 kfree(iwqp->kqp.sq_wrid_mem); 651 iwqp->kqp.sq_wrid_mem = NULL; 652 kfree(iwqp->kqp.rq_wrid_mem); 653 iwqp->kqp.rq_wrid_mem = NULL; 654 return -ENOMEM; 655 } 656 ukinfo->sq_sigwrtrk_array = (void *)iwqp->kqp.sig_trk_mem; 657 ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem; 658 ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem; 659 660 size = (ukinfo->sq_depth + ukinfo->rq_depth) * IRDMA_QP_WQE_MIN_SIZE; 661 size += (IRDMA_SHADOW_AREA_SIZE << 3); 662 663 mem->size = size; 664 mem->va = irdma_allocate_dma_mem(&iwdev->rf->hw, mem, mem->size, 665 256); 666 if (!mem->va) { 667 kfree(iwqp->kqp.sq_wrid_mem); 668 iwqp->kqp.sq_wrid_mem = NULL; 669 kfree(iwqp->kqp.rq_wrid_mem); 670 iwqp->kqp.rq_wrid_mem = NULL; 671 return -ENOMEM; 672 } 673 674 ukinfo->sq = mem->va; 675 info->sq_pa = mem->pa; 676 ukinfo->rq = &ukinfo->sq[ukinfo->sq_depth]; 677 info->rq_pa = info->sq_pa + (ukinfo->sq_depth * IRDMA_QP_WQE_MIN_SIZE); 678 ukinfo->shadow_area = ukinfo->rq[ukinfo->rq_depth].elem; 679 info->shadow_area_pa = info->rq_pa + (ukinfo->rq_depth * IRDMA_QP_WQE_MIN_SIZE); 680 ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift; 681 ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift; 682 ukinfo->qp_id = iwqp->ibqp.qp_num; 683 684 iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift; 685 iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift; 686 init_attr->cap.max_send_wr = iwqp->max_send_wr; 687 init_attr->cap.max_recv_wr = iwqp->max_recv_wr; 688 689 return 0; 690 } 691 692 int 693 irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp) 694 { 695 struct irdma_pci_f *rf = iwqp->iwdev->rf; 696 struct irdma_cqp_request *cqp_request; 697 struct cqp_cmds_info *cqp_info; 698 struct irdma_create_qp_info *qp_info; 699 int status; 700 701 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true); 702 if (!cqp_request) 703 return -ENOMEM; 704 705 cqp_info = &cqp_request->info; 706 qp_info = &cqp_request->info.in.u.qp_create.info; 707 memset(qp_info, 0, sizeof(*qp_info)); 708 qp_info->mac_valid = true; 709 qp_info->cq_num_valid = true; 710 qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE; 711 712 cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE; 713 cqp_info->post_sq = 1; 714 cqp_info->in.u.qp_create.qp = &iwqp->sc_qp; 715 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request; 716 status = irdma_handle_cqp_op(rf, cqp_request); 717 irdma_put_cqp_request(&rf->cqp, cqp_request); 718 719 return status; 720 } 721 722 void 723 irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp, 724 struct irdma_qp_host_ctx_info *ctx_info) 725 { 726 struct irdma_device *iwdev = iwqp->iwdev; 727 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 728 struct irdma_roce_offload_info *roce_info; 729 struct irdma_udp_offload_info *udp_info; 730 731 udp_info = &iwqp->udp_info; 732 udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu)); 733 udp_info->cwnd = iwdev->roce_cwnd; 734 udp_info->rexmit_thresh = 2; 735 udp_info->rnr_nak_thresh = 2; 736 udp_info->src_port = 0xc000; 737 udp_info->dst_port = ROCE_V2_UDP_DPORT; 738 roce_info = &iwqp->roce_info; 739 ether_addr_copy(roce_info->mac_addr, if_getlladdr(iwdev->netdev)); 740 741 roce_info->rd_en = true; 742 roce_info->wr_rdresp_en = true; 743 roce_info->bind_en = true; 744 roce_info->dcqcn_en = false; 745 roce_info->rtomin = iwdev->roce_rtomin; 746 747 roce_info->ack_credits = iwdev->roce_ackcreds; 748 roce_info->ird_size = dev->hw_attrs.max_hw_ird; 749 roce_info->ord_size = dev->hw_attrs.max_hw_ord; 750 751 if (!iwqp->user_mode) { 752 roce_info->priv_mode_en = true; 753 roce_info->fast_reg_en = true; 754 roce_info->udprivcq_en = true; 755 } 756 roce_info->roce_tver = 0; 757 758 ctx_info->roce_info = &iwqp->roce_info; 759 ctx_info->udp_info = &iwqp->udp_info; 760 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 761 } 762 763 void 764 irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp, 765 struct irdma_qp_host_ctx_info *ctx_info) 766 { 767 struct irdma_device *iwdev = iwqp->iwdev; 768 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 769 struct irdma_iwarp_offload_info *iwarp_info; 770 771 iwarp_info = &iwqp->iwarp_info; 772 ether_addr_copy(iwarp_info->mac_addr, if_getlladdr(iwdev->netdev)); 773 iwarp_info->rd_en = true; 774 iwarp_info->wr_rdresp_en = true; 775 iwarp_info->bind_en = true; 776 iwarp_info->ecn_en = true; 777 iwarp_info->rtomin = 5; 778 779 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 780 iwarp_info->ib_rd_en = true; 781 if (!iwqp->user_mode) { 782 iwarp_info->priv_mode_en = true; 783 iwarp_info->fast_reg_en = true; 784 } 785 iwarp_info->ddp_ver = 1; 786 iwarp_info->rdmap_ver = 1; 787 788 ctx_info->iwarp_info = &iwqp->iwarp_info; 789 ctx_info->iwarp_info_valid = true; 790 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 791 ctx_info->iwarp_info_valid = false; 792 } 793 794 int 795 irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr, 796 struct irdma_device *iwdev) 797 { 798 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 799 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs; 800 801 if (init_attr->create_flags) 802 return -EOPNOTSUPP; 803 804 if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline || 805 init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags || 806 init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags) 807 return -EINVAL; 808 809 if (rdma_protocol_roce(&iwdev->ibdev, 1)) { 810 if (init_attr->qp_type != IB_QPT_RC && 811 init_attr->qp_type != IB_QPT_UD && 812 init_attr->qp_type != IB_QPT_GSI) 813 return -EOPNOTSUPP; 814 } else { 815 if (init_attr->qp_type != IB_QPT_RC) 816 return -EOPNOTSUPP; 817 } 818 819 return 0; 820 } 821 822 void 823 irdma_sched_qp_flush_work(struct irdma_qp *iwqp) 824 { 825 unsigned long flags; 826 827 if (iwqp->sc_qp.qp_uk.destroy_pending) 828 return; 829 irdma_qp_add_ref(&iwqp->ibqp); 830 spin_lock_irqsave(&iwqp->dwork_flush_lock, flags); 831 if (mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush, 832 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS))) 833 irdma_qp_rem_ref(&iwqp->ibqp); 834 spin_unlock_irqrestore(&iwqp->dwork_flush_lock, flags); 835 } 836 837 void 838 irdma_flush_worker(struct work_struct *work) 839 { 840 struct delayed_work *dwork = to_delayed_work(work); 841 struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush); 842 843 irdma_generate_flush_completions(iwqp); 844 /* For the add in irdma_sched_qp_flush_work */ 845 irdma_qp_rem_ref(&iwqp->ibqp); 846 } 847 848 static int 849 irdma_get_ib_acc_flags(struct irdma_qp *iwqp) 850 { 851 int acc_flags = 0; 852 853 if (rdma_protocol_roce(iwqp->ibqp.device, 1)) { 854 if (iwqp->roce_info.wr_rdresp_en) { 855 acc_flags |= IB_ACCESS_LOCAL_WRITE; 856 acc_flags |= IB_ACCESS_REMOTE_WRITE; 857 } 858 if (iwqp->roce_info.rd_en) 859 acc_flags |= IB_ACCESS_REMOTE_READ; 860 if (iwqp->roce_info.bind_en) 861 acc_flags |= IB_ACCESS_MW_BIND; 862 } else { 863 if (iwqp->iwarp_info.wr_rdresp_en) { 864 acc_flags |= IB_ACCESS_LOCAL_WRITE; 865 acc_flags |= IB_ACCESS_REMOTE_WRITE; 866 } 867 if (iwqp->iwarp_info.rd_en) 868 acc_flags |= IB_ACCESS_REMOTE_READ; 869 if (iwqp->iwarp_info.bind_en) 870 acc_flags |= IB_ACCESS_MW_BIND; 871 } 872 return acc_flags; 873 } 874 875 /** 876 * irdma_query_qp - query qp attributes 877 * @ibqp: qp pointer 878 * @attr: attributes pointer 879 * @attr_mask: Not used 880 * @init_attr: qp attributes to return 881 */ 882 static int 883 irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 884 int attr_mask, struct ib_qp_init_attr *init_attr) 885 { 886 struct irdma_qp *iwqp = to_iwqp(ibqp); 887 struct irdma_sc_qp *qp = &iwqp->sc_qp; 888 889 memset(attr, 0, sizeof(*attr)); 890 memset(init_attr, 0, sizeof(*init_attr)); 891 892 attr->qp_state = iwqp->ibqp_state; 893 attr->cur_qp_state = iwqp->ibqp_state; 894 attr->cap.max_send_wr = iwqp->max_send_wr; 895 attr->cap.max_recv_wr = iwqp->max_recv_wr; 896 attr->cap.max_inline_data = qp->qp_uk.max_inline_data; 897 attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt; 898 attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt; 899 attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp); 900 attr->port_num = 1; 901 if (rdma_protocol_roce(ibqp->device, 1)) { 902 attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss); 903 attr->qkey = iwqp->roce_info.qkey; 904 attr->rq_psn = iwqp->udp_info.epsn; 905 attr->sq_psn = iwqp->udp_info.psn_nxt; 906 attr->dest_qp_num = iwqp->roce_info.dest_qp; 907 attr->pkey_index = iwqp->roce_info.p_key; 908 attr->retry_cnt = iwqp->udp_info.rexmit_thresh; 909 attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh; 910 attr->max_rd_atomic = iwqp->roce_info.ord_size; 911 attr->max_dest_rd_atomic = iwqp->roce_info.ird_size; 912 } 913 914 init_attr->event_handler = iwqp->ibqp.event_handler; 915 init_attr->qp_context = iwqp->ibqp.qp_context; 916 init_attr->send_cq = iwqp->ibqp.send_cq; 917 init_attr->recv_cq = iwqp->ibqp.recv_cq; 918 init_attr->cap = attr->cap; 919 920 return 0; 921 } 922 923 static int 924 irdma_wait_for_suspend(struct irdma_qp *iwqp) 925 { 926 if (!wait_event_timeout(iwqp->iwdev->suspend_wq, 927 !iwqp->suspend_pending, 928 msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) { 929 iwqp->suspend_pending = false; 930 irdma_dev_warn(&iwqp->iwdev->ibdev, 931 "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n", 932 iwqp->ibqp.qp_num, iwqp->last_aeq); 933 return -EBUSY; 934 } 935 936 return 0; 937 } 938 939 /** 940 * irdma_modify_qp_roce - modify qp request 941 * @ibqp: qp's pointer for modify 942 * @attr: access attributes 943 * @attr_mask: state mask 944 * @udata: user data 945 */ 946 int 947 irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, 948 int attr_mask, struct ib_udata *udata) 949 { 950 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush) 951 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid) 952 struct irdma_pd *iwpd = to_iwpd(ibqp->pd); 953 struct irdma_qp *iwqp = to_iwqp(ibqp); 954 struct irdma_device *iwdev = iwqp->iwdev; 955 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 956 struct irdma_qp_host_ctx_info *ctx_info; 957 struct irdma_roce_offload_info *roce_info; 958 struct irdma_udp_offload_info *udp_info; 959 struct irdma_modify_qp_info info = {0}; 960 struct irdma_modify_qp_resp uresp = {}; 961 struct irdma_modify_qp_req ureq; 962 unsigned long flags; 963 u8 issue_modify_qp = 0; 964 int ret = 0; 965 966 ctx_info = &iwqp->ctx_info; 967 roce_info = &iwqp->roce_info; 968 udp_info = &iwqp->udp_info; 969 970 if (udata) { 971 if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) || 972 (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN)) 973 return -EINVAL; 974 } 975 976 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) 977 return -EOPNOTSUPP; 978 979 if (attr_mask & IB_QP_DEST_QPN) 980 roce_info->dest_qp = attr->dest_qp_num; 981 982 if (attr_mask & IB_QP_PKEY_INDEX) { 983 ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index, 984 &roce_info->p_key); 985 if (ret) 986 return ret; 987 } 988 989 if (attr_mask & IB_QP_QKEY) 990 roce_info->qkey = attr->qkey; 991 992 if (attr_mask & IB_QP_PATH_MTU) 993 udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu); 994 995 if (attr_mask & IB_QP_SQ_PSN) { 996 udp_info->psn_nxt = attr->sq_psn; 997 udp_info->lsn = 0xffff; 998 udp_info->psn_una = attr->sq_psn; 999 udp_info->psn_max = attr->sq_psn; 1000 } 1001 1002 if (attr_mask & IB_QP_RQ_PSN) 1003 udp_info->epsn = attr->rq_psn; 1004 1005 if (attr_mask & IB_QP_RNR_RETRY) 1006 udp_info->rnr_nak_thresh = attr->rnr_retry; 1007 1008 if (attr_mask & IB_QP_RETRY_CNT) 1009 udp_info->rexmit_thresh = attr->retry_cnt; 1010 1011 ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id; 1012 1013 if (attr_mask & IB_QP_AV) { 1014 struct irdma_av *av = &iwqp->roce_ah.av; 1015 u16 vlan_id = VLAN_N_VID; 1016 u32 local_ip[4] = {}; 1017 1018 memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah)); 1019 if (attr->ah_attr.ah_flags & IB_AH_GRH) { 1020 udp_info->ttl = attr->ah_attr.grh.hop_limit; 1021 udp_info->flow_label = attr->ah_attr.grh.flow_label; 1022 udp_info->tos = attr->ah_attr.grh.traffic_class; 1023 1024 udp_info->src_port = kc_rdma_get_udp_sport(udp_info->flow_label, 1025 ibqp->qp_num, 1026 roce_info->dest_qp); 1027 1028 irdma_qp_rem_qos(&iwqp->sc_qp); 1029 dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri); 1030 if (iwqp->sc_qp.vsi->dscp_mode) 1031 ctx_info->user_pri = 1032 iwqp->sc_qp.vsi->dscp_map[irdma_tos2dscp(udp_info->tos)]; 1033 else 1034 ctx_info->user_pri = rt_tos2priority(udp_info->tos); 1035 } 1036 ret = kc_irdma_set_roce_cm_info(iwqp, attr, &vlan_id); 1037 if (ret) 1038 return ret; 1039 if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri)) 1040 return -ENOMEM; 1041 iwqp->sc_qp.user_pri = ctx_info->user_pri; 1042 irdma_qp_add_qos(&iwqp->sc_qp); 1043 1044 if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode) 1045 vlan_id = 0; 1046 if (vlan_id < VLAN_N_VID) { 1047 udp_info->insert_vlan_tag = true; 1048 udp_info->vlan_tag = vlan_id | 1049 ctx_info->user_pri << VLAN_PRIO_SHIFT; 1050 } else { 1051 udp_info->insert_vlan_tag = false; 1052 } 1053 1054 av->attrs = attr->ah_attr; 1055 rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid); 1056 if (av->net_type == RDMA_NETWORK_IPV6) { 1057 __be32 *daddr = 1058 av->dgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32; 1059 __be32 *saddr = 1060 av->sgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32; 1061 1062 irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr); 1063 irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr); 1064 1065 udp_info->ipv4 = false; 1066 irdma_copy_ip_ntohl(local_ip, daddr); 1067 } else if (av->net_type == RDMA_NETWORK_IPV4) { 1068 __be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr; 1069 __be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr; 1070 1071 local_ip[0] = ntohl(daddr); 1072 1073 udp_info->ipv4 = true; 1074 udp_info->dest_ip_addr[0] = 0; 1075 udp_info->dest_ip_addr[1] = 0; 1076 udp_info->dest_ip_addr[2] = 0; 1077 udp_info->dest_ip_addr[3] = local_ip[0]; 1078 1079 udp_info->local_ipaddr[0] = 0; 1080 udp_info->local_ipaddr[1] = 0; 1081 udp_info->local_ipaddr[2] = 0; 1082 udp_info->local_ipaddr[3] = ntohl(saddr); 1083 } else { 1084 return -EINVAL; 1085 } 1086 udp_info->arp_idx = 1087 irdma_add_arp(iwdev->rf, local_ip, 1088 ah_attr_to_dmac(attr->ah_attr)); 1089 } 1090 1091 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 1092 if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) { 1093 irdma_dev_err(&iwdev->ibdev, 1094 "rd_atomic = %d, above max_hw_ord=%d\n", 1095 attr->max_rd_atomic, 1096 dev->hw_attrs.max_hw_ord); 1097 return -EINVAL; 1098 } 1099 if (attr->max_rd_atomic) 1100 roce_info->ord_size = attr->max_rd_atomic; 1101 info.ord_valid = true; 1102 } 1103 1104 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 1105 if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) { 1106 irdma_dev_err(&iwdev->ibdev, 1107 "rd_atomic = %d, above max_hw_ird=%d\n", 1108 attr->max_rd_atomic, 1109 dev->hw_attrs.max_hw_ird); 1110 return -EINVAL; 1111 } 1112 if (attr->max_dest_rd_atomic) 1113 roce_info->ird_size = attr->max_dest_rd_atomic; 1114 } 1115 1116 if (attr_mask & IB_QP_ACCESS_FLAGS) { 1117 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) 1118 roce_info->wr_rdresp_en = true; 1119 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 1120 roce_info->wr_rdresp_en = true; 1121 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 1122 roce_info->rd_en = true; 1123 } 1124 1125 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend)); 1126 1127 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 1128 "caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n", 1129 __builtin_return_address(0), ibqp->qp_num, attr->qp_state, 1130 iwqp->ibqp_state, iwqp->iwarp_state, attr_mask); 1131 1132 spin_lock_irqsave(&iwqp->lock, flags); 1133 if (attr_mask & IB_QP_STATE) { 1134 if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state, 1135 iwqp->ibqp.qp_type, attr_mask)) { 1136 irdma_dev_warn(&iwdev->ibdev, 1137 "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n", 1138 iwqp->ibqp.qp_num, iwqp->ibqp_state, 1139 attr->qp_state); 1140 ret = -EINVAL; 1141 goto exit; 1142 } 1143 info.curr_iwarp_state = iwqp->iwarp_state; 1144 1145 switch (attr->qp_state) { 1146 case IB_QPS_INIT: 1147 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1148 ret = -EINVAL; 1149 goto exit; 1150 } 1151 1152 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) { 1153 info.next_iwarp_state = IRDMA_QP_STATE_IDLE; 1154 issue_modify_qp = 1; 1155 } 1156 break; 1157 case IB_QPS_RTR: 1158 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1159 ret = -EINVAL; 1160 goto exit; 1161 } 1162 info.arp_cache_idx_valid = true; 1163 info.cq_num_valid = true; 1164 info.next_iwarp_state = IRDMA_QP_STATE_RTR; 1165 issue_modify_qp = 1; 1166 break; 1167 case IB_QPS_RTS: 1168 if (iwqp->ibqp_state < IB_QPS_RTR || 1169 iwqp->ibqp_state == IB_QPS_ERR) { 1170 ret = -EINVAL; 1171 goto exit; 1172 } 1173 1174 info.arp_cache_idx_valid = true; 1175 info.cq_num_valid = true; 1176 info.ord_valid = true; 1177 info.next_iwarp_state = IRDMA_QP_STATE_RTS; 1178 issue_modify_qp = 1; 1179 if (dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_2) 1180 iwdev->rf->check_fc(&iwdev->vsi, &iwqp->sc_qp); 1181 udp_info->cwnd = iwdev->roce_cwnd; 1182 roce_info->ack_credits = iwdev->roce_ackcreds; 1183 if (iwdev->push_mode && udata && 1184 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX && 1185 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1186 spin_unlock_irqrestore(&iwqp->lock, flags); 1187 irdma_alloc_push_page(iwqp); 1188 spin_lock_irqsave(&iwqp->lock, flags); 1189 } 1190 break; 1191 case IB_QPS_SQD: 1192 if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD) 1193 goto exit; 1194 1195 if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) { 1196 ret = -EINVAL; 1197 goto exit; 1198 } 1199 1200 info.next_iwarp_state = IRDMA_QP_STATE_SQD; 1201 issue_modify_qp = 1; 1202 iwqp->suspend_pending = true; 1203 break; 1204 case IB_QPS_SQE: 1205 case IB_QPS_ERR: 1206 case IB_QPS_RESET: 1207 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) { 1208 spin_unlock_irqrestore(&iwqp->lock, flags); 1209 if (udata && udata->inlen) { 1210 if (ib_copy_from_udata(&ureq, udata, 1211 min(sizeof(ureq), udata->inlen))) 1212 return -EINVAL; 1213 1214 irdma_flush_wqes(iwqp, 1215 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) | 1216 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) | 1217 IRDMA_REFLUSH); 1218 } 1219 return 0; 1220 } 1221 1222 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1223 issue_modify_qp = 1; 1224 break; 1225 default: 1226 ret = -EINVAL; 1227 goto exit; 1228 } 1229 1230 iwqp->ibqp_state = attr->qp_state; 1231 } 1232 1233 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; 1234 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; 1235 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 1236 spin_unlock_irqrestore(&iwqp->lock, flags); 1237 1238 if (attr_mask & IB_QP_STATE) { 1239 if (issue_modify_qp) { 1240 ctx_info->rem_endpoint_idx = udp_info->arp_idx; 1241 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true)) 1242 return -EINVAL; 1243 if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) { 1244 ret = irdma_wait_for_suspend(iwqp); 1245 if (ret) 1246 return ret; 1247 } 1248 spin_lock_irqsave(&iwqp->lock, flags); 1249 if (iwqp->iwarp_state == info.curr_iwarp_state) { 1250 iwqp->iwarp_state = info.next_iwarp_state; 1251 iwqp->ibqp_state = attr->qp_state; 1252 } 1253 if (iwqp->ibqp_state > IB_QPS_RTS && 1254 !iwqp->flush_issued) { 1255 spin_unlock_irqrestore(&iwqp->lock, flags); 1256 irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ | 1257 IRDMA_FLUSH_RQ | 1258 IRDMA_FLUSH_WAIT); 1259 iwqp->flush_issued = 1; 1260 1261 } else { 1262 spin_unlock_irqrestore(&iwqp->lock, flags); 1263 } 1264 } else { 1265 iwqp->ibqp_state = attr->qp_state; 1266 } 1267 if (udata && udata->outlen && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1268 struct irdma_ucontext *ucontext; 1269 1270 #if __FreeBSD_version >= 1400026 1271 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 1272 #else 1273 ucontext = to_ucontext(ibqp->uobject->context); 1274 #endif 1275 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX && 1276 !iwqp->push_wqe_mmap_entry && 1277 !irdma_setup_push_mmap_entries(ucontext, iwqp, 1278 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) { 1279 uresp.push_valid = 1; 1280 uresp.push_offset = iwqp->sc_qp.push_offset; 1281 } 1282 uresp.rd_fence_rate = iwdev->rd_fence_rate; 1283 ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), 1284 udata->outlen)); 1285 if (ret) { 1286 irdma_remove_push_mmap_entries(iwqp); 1287 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 1288 "copy_to_udata failed\n"); 1289 return ret; 1290 } 1291 } 1292 } 1293 1294 return 0; 1295 exit: 1296 spin_unlock_irqrestore(&iwqp->lock, flags); 1297 1298 return ret; 1299 } 1300 1301 /** 1302 * irdma_modify_qp - modify qp request 1303 * @ibqp: qp's pointer for modify 1304 * @attr: access attributes 1305 * @attr_mask: state mask 1306 * @udata: user data 1307 */ 1308 int 1309 irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, 1310 struct ib_udata *udata) 1311 { 1312 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush) 1313 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid) 1314 struct irdma_qp *iwqp = to_iwqp(ibqp); 1315 struct irdma_device *iwdev = iwqp->iwdev; 1316 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 1317 struct irdma_qp_host_ctx_info *ctx_info; 1318 struct irdma_tcp_offload_info *tcp_info; 1319 struct irdma_iwarp_offload_info *offload_info; 1320 struct irdma_modify_qp_info info = {0}; 1321 struct irdma_modify_qp_resp uresp = {}; 1322 struct irdma_modify_qp_req ureq = {}; 1323 u8 issue_modify_qp = 0; 1324 u8 dont_wait = 0; 1325 int err; 1326 unsigned long flags; 1327 1328 if (udata) { 1329 if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) || 1330 (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN)) 1331 return -EINVAL; 1332 } 1333 1334 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) 1335 return -EOPNOTSUPP; 1336 1337 ctx_info = &iwqp->ctx_info; 1338 offload_info = &iwqp->iwarp_info; 1339 tcp_info = &iwqp->tcp_info; 1340 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend)); 1341 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 1342 "caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n", 1343 __builtin_return_address(0), ibqp->qp_num, attr->qp_state, 1344 iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq, 1345 iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask); 1346 1347 spin_lock_irqsave(&iwqp->lock, flags); 1348 if (attr_mask & IB_QP_STATE) { 1349 info.curr_iwarp_state = iwqp->iwarp_state; 1350 switch (attr->qp_state) { 1351 case IB_QPS_INIT: 1352 case IB_QPS_RTR: 1353 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1354 err = -EINVAL; 1355 goto exit; 1356 } 1357 1358 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) { 1359 info.next_iwarp_state = IRDMA_QP_STATE_IDLE; 1360 issue_modify_qp = 1; 1361 } 1362 if (iwdev->push_mode && udata && 1363 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX && 1364 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1365 spin_unlock_irqrestore(&iwqp->lock, flags); 1366 irdma_alloc_push_page(iwqp); 1367 spin_lock_irqsave(&iwqp->lock, flags); 1368 } 1369 break; 1370 case IB_QPS_RTS: 1371 if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS || 1372 !iwqp->cm_id) { 1373 err = -EINVAL; 1374 goto exit; 1375 } 1376 1377 issue_modify_qp = 1; 1378 iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED; 1379 iwqp->hte_added = 1; 1380 info.next_iwarp_state = IRDMA_QP_STATE_RTS; 1381 info.tcp_ctx_valid = true; 1382 info.ord_valid = true; 1383 info.arp_cache_idx_valid = true; 1384 info.cq_num_valid = true; 1385 break; 1386 case IB_QPS_SQD: 1387 if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) { 1388 err = 0; 1389 goto exit; 1390 } 1391 1392 if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING || 1393 iwqp->iwarp_state < IRDMA_QP_STATE_RTS) { 1394 err = 0; 1395 goto exit; 1396 } 1397 1398 if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) { 1399 err = -EINVAL; 1400 goto exit; 1401 } 1402 1403 info.next_iwarp_state = IRDMA_QP_STATE_CLOSING; 1404 issue_modify_qp = 1; 1405 break; 1406 case IB_QPS_SQE: 1407 if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) { 1408 err = -EINVAL; 1409 goto exit; 1410 } 1411 1412 info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE; 1413 issue_modify_qp = 1; 1414 break; 1415 case IB_QPS_ERR: 1416 case IB_QPS_RESET: 1417 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) { 1418 spin_unlock_irqrestore(&iwqp->lock, flags); 1419 if (udata && udata->inlen) { 1420 if (ib_copy_from_udata(&ureq, udata, 1421 min(sizeof(ureq), udata->inlen))) 1422 return -EINVAL; 1423 1424 irdma_flush_wqes(iwqp, 1425 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) | 1426 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) | 1427 IRDMA_REFLUSH); 1428 } 1429 return 0; 1430 } 1431 1432 if (iwqp->sc_qp.term_flags) { 1433 spin_unlock_irqrestore(&iwqp->lock, flags); 1434 irdma_terminate_del_timer(&iwqp->sc_qp); 1435 spin_lock_irqsave(&iwqp->lock, flags); 1436 } 1437 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1438 if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED && 1439 iwdev->iw_status && 1440 iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT) 1441 info.reset_tcp_conn = true; 1442 else 1443 dont_wait = 1; 1444 1445 issue_modify_qp = 1; 1446 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1447 break; 1448 default: 1449 err = -EINVAL; 1450 goto exit; 1451 } 1452 1453 iwqp->ibqp_state = attr->qp_state; 1454 } 1455 if (attr_mask & IB_QP_ACCESS_FLAGS) { 1456 ctx_info->iwarp_info_valid = true; 1457 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) 1458 offload_info->wr_rdresp_en = true; 1459 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 1460 offload_info->wr_rdresp_en = true; 1461 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 1462 offload_info->rd_en = true; 1463 } 1464 1465 if (ctx_info->iwarp_info_valid) { 1466 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; 1467 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; 1468 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 1469 } 1470 spin_unlock_irqrestore(&iwqp->lock, flags); 1471 1472 if (attr_mask & IB_QP_STATE) { 1473 if (issue_modify_qp) { 1474 ctx_info->rem_endpoint_idx = tcp_info->arp_idx; 1475 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true)) 1476 return -EINVAL; 1477 } 1478 1479 spin_lock_irqsave(&iwqp->lock, flags); 1480 if (iwqp->iwarp_state == info.curr_iwarp_state) { 1481 iwqp->iwarp_state = info.next_iwarp_state; 1482 iwqp->ibqp_state = attr->qp_state; 1483 } 1484 spin_unlock_irqrestore(&iwqp->lock, flags); 1485 } 1486 1487 if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) { 1488 if (dont_wait) { 1489 if (iwqp->hw_tcp_state) { 1490 spin_lock_irqsave(&iwqp->lock, flags); 1491 iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED; 1492 iwqp->last_aeq = IRDMA_AE_RESET_SENT; 1493 spin_unlock_irqrestore(&iwqp->lock, flags); 1494 } 1495 irdma_cm_disconn(iwqp); 1496 } else { 1497 int close_timer_started; 1498 1499 spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags); 1500 1501 if (iwqp->cm_node) { 1502 atomic_inc(&iwqp->cm_node->refcnt); 1503 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags); 1504 close_timer_started = atomic_inc_return(&iwqp->close_timer_started); 1505 if (iwqp->cm_id && close_timer_started == 1) 1506 irdma_schedule_cm_timer(iwqp->cm_node, 1507 (struct irdma_puda_buf *)iwqp, 1508 IRDMA_TIMER_TYPE_CLOSE, 1, 0); 1509 1510 irdma_rem_ref_cm_node(iwqp->cm_node); 1511 } else { 1512 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags); 1513 } 1514 } 1515 } 1516 if (attr_mask & IB_QP_STATE && udata && udata->outlen && 1517 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1518 struct irdma_ucontext *ucontext; 1519 1520 #if __FreeBSD_version >= 1400026 1521 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 1522 #else 1523 ucontext = to_ucontext(ibqp->uobject->context); 1524 #endif 1525 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX && 1526 !iwqp->push_wqe_mmap_entry && 1527 !irdma_setup_push_mmap_entries(ucontext, iwqp, 1528 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) { 1529 uresp.push_valid = 1; 1530 uresp.push_offset = iwqp->sc_qp.push_offset; 1531 } 1532 uresp.rd_fence_rate = iwdev->rd_fence_rate; 1533 1534 err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), 1535 udata->outlen)); 1536 if (err) { 1537 irdma_remove_push_mmap_entries(iwqp); 1538 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 1539 "copy_to_udata failed\n"); 1540 return err; 1541 } 1542 } 1543 1544 return 0; 1545 exit: 1546 spin_unlock_irqrestore(&iwqp->lock, flags); 1547 1548 return err; 1549 } 1550 1551 /** 1552 * irdma_cq_free_rsrc - free up resources for cq 1553 * @rf: RDMA PCI function 1554 * @iwcq: cq ptr 1555 */ 1556 void 1557 irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq) 1558 { 1559 struct irdma_sc_cq *cq = &iwcq->sc_cq; 1560 1561 if (!iwcq->user_mode) { 1562 irdma_free_dma_mem(rf->sc_dev.hw, &iwcq->kmem); 1563 irdma_free_dma_mem(rf->sc_dev.hw, &iwcq->kmem_shadow); 1564 } 1565 1566 irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id); 1567 } 1568 1569 /** 1570 * irdma_free_cqbuf - worker to free a cq buffer 1571 * @work: provides access to the cq buffer to free 1572 */ 1573 static void 1574 irdma_free_cqbuf(struct work_struct *work) 1575 { 1576 struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work); 1577 1578 irdma_free_dma_mem(cq_buf->hw, &cq_buf->kmem_buf); 1579 kfree(cq_buf); 1580 } 1581 1582 /** 1583 * irdma_process_resize_list - remove resized cq buffers from the resize_list 1584 * @iwcq: cq which owns the resize_list 1585 * @iwdev: irdma device 1586 * @lcqe_buf: the buffer where the last cqe is received 1587 */ 1588 int 1589 irdma_process_resize_list(struct irdma_cq *iwcq, 1590 struct irdma_device *iwdev, 1591 struct irdma_cq_buf *lcqe_buf) 1592 { 1593 struct list_head *tmp_node, *list_node; 1594 struct irdma_cq_buf *cq_buf; 1595 int cnt = 0; 1596 1597 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) { 1598 cq_buf = list_entry(list_node, struct irdma_cq_buf, list); 1599 if (cq_buf == lcqe_buf) 1600 return cnt; 1601 1602 list_del(&cq_buf->list); 1603 queue_work(iwdev->cleanup_wq, &cq_buf->work); 1604 cnt++; 1605 } 1606 1607 return cnt; 1608 } 1609 1610 /** 1611 * irdma_resize_cq - resize cq 1612 * @ibcq: cq to be resized 1613 * @entries: desired cq size 1614 * @udata: user data 1615 */ 1616 static int 1617 irdma_resize_cq(struct ib_cq *ibcq, int entries, 1618 struct ib_udata *udata) 1619 { 1620 #define IRDMA_RESIZE_CQ_MIN_REQ_LEN offsetofend(struct irdma_resize_cq_req, user_cq_buffer) 1621 struct irdma_cq *iwcq = to_iwcq(ibcq); 1622 struct irdma_sc_dev *dev = iwcq->sc_cq.dev; 1623 struct irdma_cqp_request *cqp_request; 1624 struct cqp_cmds_info *cqp_info; 1625 struct irdma_modify_cq_info *m_info; 1626 struct irdma_modify_cq_info info = {0}; 1627 struct irdma_dma_mem kmem_buf; 1628 struct irdma_cq_mr *cqmr_buf; 1629 struct irdma_pbl *iwpbl_buf; 1630 struct irdma_device *iwdev; 1631 struct irdma_pci_f *rf; 1632 struct irdma_cq_buf *cq_buf = NULL; 1633 unsigned long flags; 1634 int ret; 1635 1636 iwdev = to_iwdev(ibcq->device); 1637 rf = iwdev->rf; 1638 1639 if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags & 1640 IRDMA_FEATURE_CQ_RESIZE)) 1641 return -EOPNOTSUPP; 1642 1643 if (udata && udata->inlen < IRDMA_RESIZE_CQ_MIN_REQ_LEN) 1644 return -EINVAL; 1645 1646 if (entries > rf->max_cqe) 1647 return -EINVAL; 1648 1649 if (!iwcq->user_mode) { 1650 entries++; 1651 if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 1652 entries *= 2; 1653 } 1654 1655 info.cq_size = max(entries, 4); 1656 1657 if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1) 1658 return 0; 1659 1660 if (udata) { 1661 struct irdma_resize_cq_req req = {}; 1662 struct irdma_ucontext *ucontext = 1663 #if __FreeBSD_version >= 1400026 1664 rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 1665 #else 1666 to_ucontext(ibcq->uobject->context); 1667 #endif 1668 1669 /* CQ resize not supported with legacy GEN_1 libi40iw */ 1670 if (ucontext->legacy_mode) 1671 return -EOPNOTSUPP; 1672 1673 if (ib_copy_from_udata(&req, udata, 1674 min(sizeof(req), udata->inlen))) 1675 return -EINVAL; 1676 1677 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 1678 iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer, 1679 &ucontext->cq_reg_mem_list); 1680 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 1681 1682 if (!iwpbl_buf) 1683 return -ENOMEM; 1684 1685 cqmr_buf = &iwpbl_buf->cq_mr; 1686 if (iwpbl_buf->pbl_allocated) { 1687 info.virtual_map = true; 1688 info.pbl_chunk_size = 1; 1689 info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx; 1690 } else { 1691 info.cq_pa = cqmr_buf->cq_pbl.addr; 1692 } 1693 } else { 1694 /* Kmode CQ resize */ 1695 int rsize; 1696 1697 rsize = info.cq_size * sizeof(struct irdma_cqe); 1698 kmem_buf.size = round_up(rsize, 256); 1699 kmem_buf.va = irdma_allocate_dma_mem(dev->hw, &kmem_buf, 1700 kmem_buf.size, 256); 1701 if (!kmem_buf.va) 1702 return -ENOMEM; 1703 1704 info.cq_base = kmem_buf.va; 1705 info.cq_pa = kmem_buf.pa; 1706 cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL); 1707 if (!cq_buf) { 1708 ret = -ENOMEM; 1709 goto error; 1710 } 1711 } 1712 1713 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true); 1714 if (!cqp_request) { 1715 ret = -ENOMEM; 1716 goto error; 1717 } 1718 1719 info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold; 1720 info.cq_resize = true; 1721 1722 cqp_info = &cqp_request->info; 1723 m_info = &cqp_info->in.u.cq_modify.info; 1724 memcpy(m_info, &info, sizeof(*m_info)); 1725 1726 cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY; 1727 cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq; 1728 cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request; 1729 cqp_info->post_sq = 1; 1730 ret = irdma_handle_cqp_op(rf, cqp_request); 1731 irdma_put_cqp_request(&rf->cqp, cqp_request); 1732 if (ret) 1733 goto error; 1734 1735 spin_lock_irqsave(&iwcq->lock, flags); 1736 if (cq_buf) { 1737 cq_buf->kmem_buf = iwcq->kmem; 1738 cq_buf->hw = dev->hw; 1739 memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk)); 1740 INIT_WORK(&cq_buf->work, irdma_free_cqbuf); 1741 list_add_tail(&cq_buf->list, &iwcq->resize_list); 1742 iwcq->kmem = kmem_buf; 1743 } 1744 1745 irdma_sc_cq_resize(&iwcq->sc_cq, &info); 1746 ibcq->cqe = info.cq_size - 1; 1747 spin_unlock_irqrestore(&iwcq->lock, flags); 1748 1749 return 0; 1750 error: 1751 if (!udata) 1752 irdma_free_dma_mem(dev->hw, &kmem_buf); 1753 kfree(cq_buf); 1754 1755 return ret; 1756 } 1757 1758 /** 1759 * irdma_get_mr_access - get hw MR access permissions from IB access flags 1760 * @access: IB access flags 1761 */ 1762 static inline u16 irdma_get_mr_access(int access){ 1763 u16 hw_access = 0; 1764 1765 hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ? 1766 IRDMA_ACCESS_FLAGS_LOCALWRITE : 0; 1767 hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ? 1768 IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0; 1769 hw_access |= (access & IB_ACCESS_REMOTE_READ) ? 1770 IRDMA_ACCESS_FLAGS_REMOTEREAD : 0; 1771 hw_access |= (access & IB_ACCESS_MW_BIND) ? 1772 IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0; 1773 hw_access |= (access & IB_ZERO_BASED) ? 1774 IRDMA_ACCESS_FLAGS_ZERO_BASED : 0; 1775 hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD; 1776 1777 return hw_access; 1778 } 1779 1780 /** 1781 * irdma_free_stag - free stag resource 1782 * @iwdev: irdma device 1783 * @stag: stag to free 1784 */ 1785 void 1786 irdma_free_stag(struct irdma_device *iwdev, u32 stag) 1787 { 1788 u32 stag_idx; 1789 1790 stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S; 1791 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx); 1792 } 1793 1794 /** 1795 * irdma_create_stag - create random stag 1796 * @iwdev: irdma device 1797 */ 1798 u32 1799 irdma_create_stag(struct irdma_device *iwdev) 1800 { 1801 u32 stag; 1802 u32 stag_index = 0; 1803 u32 next_stag_index; 1804 u32 driver_key; 1805 u32 random; 1806 u8 consumer_key; 1807 int ret; 1808 1809 get_random_bytes(&random, sizeof(random)); 1810 consumer_key = (u8)random; 1811 1812 driver_key = random & ~iwdev->rf->mr_stagmask; 1813 next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8; 1814 next_stag_index %= iwdev->rf->max_mr; 1815 1816 ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, 1817 iwdev->rf->max_mr, &stag_index, 1818 &next_stag_index); 1819 if (ret) 1820 return 0; 1821 stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S; 1822 stag |= driver_key; 1823 stag += (u32)consumer_key; 1824 1825 return stag; 1826 } 1827 1828 /** 1829 * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous 1830 * @arr: lvl1 pbl array 1831 * @npages: page count 1832 * @pg_size: page size 1833 * 1834 */ 1835 static bool 1836 irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size) 1837 { 1838 u32 pg_idx; 1839 1840 for (pg_idx = 0; pg_idx < npages; pg_idx++) { 1841 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx]) 1842 return false; 1843 } 1844 1845 return true; 1846 } 1847 1848 /** 1849 * irdma_check_mr_contiguous - check if MR is physically contiguous 1850 * @palloc: pbl allocation struct 1851 * @pg_size: page size 1852 */ 1853 static bool 1854 irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc, 1855 u32 pg_size) 1856 { 1857 struct irdma_pble_level2 *lvl2 = &palloc->level2; 1858 struct irdma_pble_info *leaf = lvl2->leaf; 1859 u64 *arr = NULL; 1860 u64 *start_addr = NULL; 1861 int i; 1862 bool ret; 1863 1864 if (palloc->level == PBLE_LEVEL_1) { 1865 arr = palloc->level1.addr; 1866 ret = irdma_check_mem_contiguous(arr, palloc->total_cnt, 1867 pg_size); 1868 return ret; 1869 } 1870 1871 start_addr = leaf->addr; 1872 1873 for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) { 1874 arr = leaf->addr; 1875 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr) 1876 return false; 1877 ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size); 1878 if (!ret) 1879 return false; 1880 } 1881 1882 return true; 1883 } 1884 1885 /** 1886 * irdma_setup_pbles - copy user pg address to pble's 1887 * @rf: RDMA PCI function 1888 * @iwmr: mr pointer for this memory registration 1889 * @lvl: requested pble levels 1890 */ 1891 static int 1892 irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr, 1893 u8 lvl) 1894 { 1895 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 1896 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 1897 struct irdma_pble_info *pinfo; 1898 u64 *pbl; 1899 int status; 1900 enum irdma_pble_level level = PBLE_LEVEL_1; 1901 1902 if (lvl) { 1903 status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt, 1904 lvl); 1905 if (status) 1906 return status; 1907 1908 iwpbl->pbl_allocated = true; 1909 level = palloc->level; 1910 pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 : 1911 palloc->level2.leaf; 1912 pbl = pinfo->addr; 1913 } else { 1914 pbl = iwmr->pgaddrmem; 1915 } 1916 1917 irdma_copy_user_pgaddrs(iwmr, pbl, level); 1918 1919 if (lvl) 1920 iwmr->pgaddrmem[0] = *pbl; 1921 1922 return 0; 1923 } 1924 1925 /** 1926 * irdma_handle_q_mem - handle memory for qp and cq 1927 * @iwdev: irdma device 1928 * @req: information for q memory management 1929 * @iwpbl: pble struct 1930 * @lvl: pble level mask 1931 */ 1932 static int 1933 irdma_handle_q_mem(struct irdma_device *iwdev, 1934 struct irdma_mem_reg_req *req, 1935 struct irdma_pbl *iwpbl, u8 lvl) 1936 { 1937 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 1938 struct irdma_mr *iwmr = iwpbl->iwmr; 1939 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr; 1940 struct irdma_cq_mr *cqmr = &iwpbl->cq_mr; 1941 struct irdma_hmc_pble *hmc_p; 1942 u64 *arr = iwmr->pgaddrmem; 1943 u32 pg_size, total; 1944 int err = 0; 1945 bool ret = true; 1946 1947 pg_size = iwmr->page_size; 1948 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 1949 if (err) 1950 return err; 1951 1952 if (lvl) 1953 arr = palloc->level1.addr; 1954 1955 switch (iwmr->type) { 1956 case IRDMA_MEMREG_TYPE_QP: 1957 total = req->sq_pages + req->rq_pages; 1958 hmc_p = &qpmr->sq_pbl; 1959 qpmr->shadow = (dma_addr_t) arr[total]; 1960 if (lvl) { 1961 ret = irdma_check_mem_contiguous(arr, req->sq_pages, 1962 pg_size); 1963 if (ret) 1964 ret = irdma_check_mem_contiguous(&arr[req->sq_pages], 1965 req->rq_pages, 1966 pg_size); 1967 } 1968 1969 if (!ret) { 1970 hmc_p->idx = palloc->level1.idx; 1971 hmc_p = &qpmr->rq_pbl; 1972 hmc_p->idx = palloc->level1.idx + req->sq_pages; 1973 } else { 1974 hmc_p->addr = arr[0]; 1975 hmc_p = &qpmr->rq_pbl; 1976 hmc_p->addr = arr[req->sq_pages]; 1977 } 1978 break; 1979 case IRDMA_MEMREG_TYPE_CQ: 1980 hmc_p = &cqmr->cq_pbl; 1981 1982 if (!cqmr->split) 1983 cqmr->shadow = (dma_addr_t) arr[req->cq_pages]; 1984 1985 if (lvl) 1986 ret = irdma_check_mem_contiguous(arr, req->cq_pages, 1987 pg_size); 1988 1989 if (!ret) 1990 hmc_p->idx = palloc->level1.idx; 1991 else 1992 hmc_p->addr = arr[0]; 1993 break; 1994 default: 1995 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, "MR type error\n"); 1996 err = -EINVAL; 1997 } 1998 1999 if (lvl && ret) { 2000 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2001 iwpbl->pbl_allocated = false; 2002 } 2003 2004 return err; 2005 } 2006 2007 /** 2008 * irdma_hw_alloc_mw - create the hw memory window 2009 * @iwdev: irdma device 2010 * @iwmr: pointer to memory window info 2011 */ 2012 int 2013 irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr) 2014 { 2015 struct irdma_mw_alloc_info *info; 2016 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd); 2017 struct irdma_cqp_request *cqp_request; 2018 struct cqp_cmds_info *cqp_info; 2019 int status; 2020 2021 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2022 if (!cqp_request) 2023 return -ENOMEM; 2024 2025 cqp_info = &cqp_request->info; 2026 info = &cqp_info->in.u.mw_alloc.info; 2027 memset(info, 0, sizeof(*info)); 2028 if (iwmr->ibmw.type == IB_MW_TYPE_1) 2029 info->mw_wide = true; 2030 2031 info->page_size = PAGE_SIZE; 2032 info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2033 info->pd_id = iwpd->sc_pd.pd_id; 2034 info->remote_access = true; 2035 cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC; 2036 cqp_info->post_sq = 1; 2037 cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev; 2038 cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request; 2039 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2040 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2041 2042 return status; 2043 } 2044 2045 /** 2046 * irdma_dealloc_mw - Dealloc memory window 2047 * @ibmw: memory window structure. 2048 */ 2049 static int 2050 irdma_dealloc_mw(struct ib_mw *ibmw) 2051 { 2052 struct ib_pd *ibpd = ibmw->pd; 2053 struct irdma_pd *iwpd = to_iwpd(ibpd); 2054 struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw); 2055 struct irdma_device *iwdev = to_iwdev(ibmw->device); 2056 struct irdma_cqp_request *cqp_request; 2057 struct cqp_cmds_info *cqp_info; 2058 struct irdma_dealloc_stag_info *info; 2059 2060 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2061 if (!cqp_request) 2062 return -ENOMEM; 2063 2064 cqp_info = &cqp_request->info; 2065 info = &cqp_info->in.u.dealloc_stag.info; 2066 memset(info, 0, sizeof(*info)); 2067 info->pd_id = iwpd->sc_pd.pd_id; 2068 info->stag_idx = RS_64_1(ibmw->rkey, IRDMA_CQPSQ_STAG_IDX_S); 2069 info->mr = false; 2070 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG; 2071 cqp_info->post_sq = 1; 2072 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev; 2073 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request; 2074 irdma_handle_cqp_op(iwdev->rf, cqp_request); 2075 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2076 irdma_free_stag(iwdev, iwmr->stag); 2077 kfree(iwmr); 2078 2079 return 0; 2080 } 2081 2082 /** 2083 * irdma_hw_alloc_stag - cqp command to allocate stag 2084 * @iwdev: irdma device 2085 * @iwmr: irdma mr pointer 2086 */ 2087 int 2088 irdma_hw_alloc_stag(struct irdma_device *iwdev, 2089 struct irdma_mr *iwmr) 2090 { 2091 struct irdma_allocate_stag_info *info; 2092 struct ib_pd *pd = iwmr->ibmr.pd; 2093 struct irdma_pd *iwpd = to_iwpd(pd); 2094 struct irdma_cqp_request *cqp_request; 2095 struct cqp_cmds_info *cqp_info; 2096 int status; 2097 2098 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2099 if (!cqp_request) 2100 return -ENOMEM; 2101 2102 cqp_info = &cqp_request->info; 2103 info = &cqp_info->in.u.alloc_stag.info; 2104 memset(info, 0, sizeof(*info)); 2105 info->page_size = PAGE_SIZE; 2106 info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2107 info->pd_id = iwpd->sc_pd.pd_id; 2108 info->total_len = iwmr->len; 2109 info->all_memory = (pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) ? true : false; 2110 info->remote_access = true; 2111 cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG; 2112 cqp_info->post_sq = 1; 2113 cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev; 2114 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request; 2115 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2116 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2117 if (!status) 2118 iwmr->is_hwreg = 1; 2119 2120 return status; 2121 } 2122 2123 /** 2124 * irdma_set_page - populate pbl list for fmr 2125 * @ibmr: ib mem to access iwarp mr pointer 2126 * @addr: page dma address fro pbl list 2127 */ 2128 static int 2129 irdma_set_page(struct ib_mr *ibmr, u64 addr) 2130 { 2131 struct irdma_mr *iwmr = to_iwmr(ibmr); 2132 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2133 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2134 u64 *pbl; 2135 2136 if (unlikely(iwmr->npages == iwmr->page_cnt)) 2137 return -ENOMEM; 2138 2139 if (palloc->level == PBLE_LEVEL_2) { 2140 struct irdma_pble_info *palloc_info = 2141 palloc->level2.leaf + (iwmr->npages >> PBLE_512_SHIFT); 2142 2143 palloc_info->addr[iwmr->npages & (PBLE_PER_PAGE - 1)] = addr; 2144 } else { 2145 pbl = palloc->level1.addr; 2146 pbl[iwmr->npages] = addr; 2147 } 2148 2149 iwmr->npages++; 2150 return 0; 2151 } 2152 2153 /** 2154 * irdma_map_mr_sg - map of sg list for fmr 2155 * @ibmr: ib mem to access iwarp mr pointer 2156 * @sg: scatter gather list 2157 * @sg_nents: number of sg pages 2158 * @sg_offset: scatter gather list for fmr 2159 */ 2160 static int 2161 irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, 2162 int sg_nents, unsigned int *sg_offset) 2163 { 2164 struct irdma_mr *iwmr = to_iwmr(ibmr); 2165 2166 iwmr->npages = 0; 2167 2168 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page); 2169 } 2170 2171 /** 2172 * irdma_hwreg_mr - send cqp command for memory registration 2173 * @iwdev: irdma device 2174 * @iwmr: irdma mr pointer 2175 * @access: access for MR 2176 */ 2177 int 2178 irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr, 2179 u16 access) 2180 { 2181 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2182 struct irdma_reg_ns_stag_info *stag_info; 2183 struct ib_pd *pd = iwmr->ibmr.pd; 2184 struct irdma_pd *iwpd = to_iwpd(pd); 2185 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2186 struct irdma_cqp_request *cqp_request; 2187 struct cqp_cmds_info *cqp_info; 2188 int ret; 2189 2190 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2191 if (!cqp_request) 2192 return -ENOMEM; 2193 2194 cqp_info = &cqp_request->info; 2195 stag_info = &cqp_info->in.u.mr_reg_non_shared.info; 2196 memset(stag_info, 0, sizeof(*stag_info)); 2197 stag_info->va = iwpbl->user_base; 2198 stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2199 stag_info->stag_key = (u8)iwmr->stag; 2200 stag_info->total_len = iwmr->len; 2201 stag_info->all_memory = (pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) ? true : false; 2202 stag_info->access_rights = irdma_get_mr_access(access); 2203 stag_info->pd_id = iwpd->sc_pd.pd_id; 2204 if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED) 2205 stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED; 2206 else 2207 stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED; 2208 stag_info->page_size = iwmr->page_size; 2209 2210 if (iwpbl->pbl_allocated) { 2211 if (palloc->level == PBLE_LEVEL_1) { 2212 stag_info->first_pm_pbl_index = palloc->level1.idx; 2213 stag_info->chunk_size = 1; 2214 } else { 2215 stag_info->first_pm_pbl_index = palloc->level2.root.idx; 2216 stag_info->chunk_size = 3; 2217 } 2218 } else { 2219 stag_info->reg_addr_pa = iwmr->pgaddrmem[0]; 2220 } 2221 2222 cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED; 2223 cqp_info->post_sq = 1; 2224 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev; 2225 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request; 2226 ret = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2227 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2228 2229 if (!ret) 2230 iwmr->is_hwreg = 1; 2231 2232 return ret; 2233 } 2234 2235 /* 2236 * irdma_alloc_iwmr - Allocate iwmr @region - memory region @pd - protection domain @virt - virtual address @reg_type - 2237 * registration type 2238 */ 2239 static struct irdma_mr * 2240 irdma_alloc_iwmr(struct ib_umem *region, 2241 struct ib_pd *pd, u64 virt, 2242 enum irdma_memreg_type reg_type) 2243 { 2244 struct irdma_pbl *iwpbl; 2245 struct irdma_mr *iwmr; 2246 2247 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); 2248 if (!iwmr) 2249 return ERR_PTR(-ENOMEM); 2250 2251 iwpbl = &iwmr->iwpbl; 2252 iwpbl->iwmr = iwmr; 2253 iwmr->region = region; 2254 iwmr->ibmr.pd = pd; 2255 iwmr->ibmr.device = pd->device; 2256 iwmr->ibmr.iova = virt; 2257 iwmr->type = reg_type; 2258 2259 /* Some OOT versions of irdma_copy_user_pg_addr require the pg mask */ 2260 iwmr->page_msk = ~(IRDMA_HW_PAGE_SIZE - 1); 2261 iwmr->page_size = IRDMA_HW_PAGE_SIZE; 2262 iwmr->len = region->length; 2263 iwpbl->user_base = virt; 2264 iwmr->page_cnt = irdma_ib_umem_num_dma_blocks(region, iwmr->page_size, virt); 2265 2266 return iwmr; 2267 } 2268 2269 static void 2270 irdma_free_iwmr(struct irdma_mr *iwmr) 2271 { 2272 kfree(iwmr); 2273 } 2274 2275 /* 2276 * irdma_reg_user_mr_type_mem - Handle memory registration @iwmr - irdma mr @access - access rights 2277 */ 2278 static int 2279 irdma_reg_user_mr_type_mem(struct irdma_mr *iwmr, int access) 2280 { 2281 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2282 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2283 u32 stag; 2284 int err; 2285 u8 lvl; 2286 2287 lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0; 2288 2289 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 2290 if (err) 2291 return err; 2292 2293 if (lvl) { 2294 err = irdma_check_mr_contiguous(&iwpbl->pble_alloc, 2295 iwmr->page_size); 2296 if (err) { 2297 irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc); 2298 iwpbl->pbl_allocated = false; 2299 } 2300 } 2301 2302 stag = irdma_create_stag(iwdev); 2303 if (!stag) { 2304 err = -ENOMEM; 2305 goto free_pble; 2306 } 2307 2308 iwmr->stag = stag; 2309 iwmr->ibmr.rkey = stag; 2310 iwmr->ibmr.lkey = stag; 2311 iwmr->access = access; 2312 err = irdma_hwreg_mr(iwdev, iwmr, access); 2313 if (err) 2314 goto err_hwreg; 2315 2316 return 0; 2317 2318 err_hwreg: 2319 irdma_free_stag(iwdev, stag); 2320 2321 free_pble: 2322 if (iwpbl->pble_alloc.level != PBLE_LEVEL_0 && iwpbl->pbl_allocated) 2323 irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc); 2324 2325 return err; 2326 } 2327 2328 /* 2329 * irdma_reg_user_mr_type_qp - Handle QP memory registration @req - memory reg req @udata - user info @iwmr - irdma mr 2330 */ 2331 static int 2332 irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req, 2333 struct ib_udata *udata, 2334 struct irdma_mr *iwmr) 2335 { 2336 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2337 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2338 struct irdma_ucontext *ucontext; 2339 unsigned long flags; 2340 u32 total; 2341 int err; 2342 u8 lvl; 2343 2344 total = req.sq_pages + req.rq_pages + IRDMA_SHADOW_PGCNT; 2345 if (total > iwmr->page_cnt) 2346 return -EINVAL; 2347 2348 total = req.sq_pages + req.rq_pages; 2349 lvl = total > 2 ? PBLE_LEVEL_1 : PBLE_LEVEL_0; 2350 err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl); 2351 if (err) 2352 return err; 2353 2354 #if __FreeBSD_version >= 1400026 2355 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 2356 #else 2357 ucontext = to_ucontext(iwmr->ibpd.pd->uobject->context); 2358 #endif 2359 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 2360 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list); 2361 iwpbl->on_list = true; 2362 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 2363 2364 return 0; 2365 } 2366 2367 /* 2368 * irdma_reg_user_mr_type_cq - Handle CQ memory registration @req - memory reg req @udata - user info @iwmr - irdma mr 2369 */ 2370 static int 2371 irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req, 2372 struct ib_udata *udata, 2373 struct irdma_mr *iwmr) 2374 { 2375 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2376 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2377 struct irdma_ucontext *ucontext; 2378 unsigned long flags; 2379 u32 total; 2380 int err; 2381 u8 lvl; 2382 2383 total = req.cq_pages + 2384 ((iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE) ? 0 : IRDMA_SHADOW_PGCNT); 2385 if (total > iwmr->page_cnt) 2386 return -EINVAL; 2387 2388 lvl = req.cq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0; 2389 err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl); 2390 if (err) 2391 return err; 2392 2393 #if __FreeBSD_version >= 1400026 2394 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 2395 #else 2396 ucontext = to_ucontext(iwmr->ibmr.pd->uobject->context); 2397 #endif 2398 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 2399 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list); 2400 iwpbl->on_list = true; 2401 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 2402 2403 return 0; 2404 } 2405 2406 /** 2407 * irdma_reg_user_mr - Register a user memory region 2408 * @pd: ptr of pd 2409 * @start: virtual start address 2410 * @len: length of mr 2411 * @virt: virtual address 2412 * @access: access of mr 2413 * @udata: user data 2414 */ 2415 static struct ib_mr * 2416 irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len, 2417 u64 virt, int access, 2418 struct ib_udata *udata) 2419 { 2420 #define IRDMA_MEM_REG_MIN_REQ_LEN offsetofend(struct irdma_mem_reg_req, sq_pages) 2421 struct irdma_device *iwdev = to_iwdev(pd->device); 2422 struct irdma_mem_reg_req req = {}; 2423 struct ib_umem *region; 2424 struct irdma_mr *iwmr; 2425 int err; 2426 2427 if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size) 2428 return ERR_PTR(-EINVAL); 2429 2430 if (udata->inlen < IRDMA_MEM_REG_MIN_REQ_LEN) 2431 return ERR_PTR(-EINVAL); 2432 2433 region = ib_umem_get(pd->uobject->context, start, len, access, 0); 2434 2435 if (IS_ERR(region)) { 2436 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2437 "Failed to create ib_umem region\n"); 2438 return (struct ib_mr *)region; 2439 } 2440 2441 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) { 2442 ib_umem_release(region); 2443 return ERR_PTR(-EFAULT); 2444 } 2445 2446 iwmr = irdma_alloc_iwmr(region, pd, virt, req.reg_type); 2447 if (IS_ERR(iwmr)) { 2448 ib_umem_release(region); 2449 return (struct ib_mr *)iwmr; 2450 } 2451 2452 switch (req.reg_type) { 2453 case IRDMA_MEMREG_TYPE_QP: 2454 err = irdma_reg_user_mr_type_qp(req, udata, iwmr); 2455 if (err) 2456 goto error; 2457 2458 break; 2459 case IRDMA_MEMREG_TYPE_CQ: 2460 err = irdma_reg_user_mr_type_cq(req, udata, iwmr); 2461 if (err) 2462 goto error; 2463 2464 break; 2465 case IRDMA_MEMREG_TYPE_MEM: 2466 err = irdma_reg_user_mr_type_mem(iwmr, access); 2467 if (err) 2468 goto error; 2469 2470 break; 2471 default: 2472 err = -EINVAL; 2473 goto error; 2474 } 2475 2476 return &iwmr->ibmr; 2477 2478 error: 2479 ib_umem_release(region); 2480 irdma_free_iwmr(iwmr); 2481 2482 return ERR_PTR(err); 2483 } 2484 2485 int 2486 irdma_hwdereg_mr(struct ib_mr *ib_mr) 2487 { 2488 struct irdma_device *iwdev = to_iwdev(ib_mr->device); 2489 struct irdma_mr *iwmr = to_iwmr(ib_mr); 2490 struct irdma_pd *iwpd = to_iwpd(ib_mr->pd); 2491 struct irdma_dealloc_stag_info *info; 2492 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2493 struct irdma_cqp_request *cqp_request; 2494 struct cqp_cmds_info *cqp_info; 2495 int status; 2496 2497 /* 2498 * Skip HW MR de-register when it is already de-registered during an MR re-reregister and the re-registration 2499 * fails 2500 */ 2501 if (!iwmr->is_hwreg) 2502 return 0; 2503 2504 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2505 if (!cqp_request) 2506 return -ENOMEM; 2507 2508 cqp_info = &cqp_request->info; 2509 info = &cqp_info->in.u.dealloc_stag.info; 2510 memset(info, 0, sizeof(*info)); 2511 info->pd_id = iwpd->sc_pd.pd_id; 2512 info->stag_idx = RS_64_1(ib_mr->rkey, IRDMA_CQPSQ_STAG_IDX_S); 2513 info->mr = true; 2514 if (iwpbl->pbl_allocated) 2515 info->dealloc_pbl = true; 2516 2517 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG; 2518 cqp_info->post_sq = 1; 2519 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev; 2520 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request; 2521 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2522 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2523 2524 if (!status) 2525 iwmr->is_hwreg = 0; 2526 2527 return status; 2528 } 2529 2530 /* 2531 * irdma_rereg_mr_trans - Re-register a user MR for a change translation. @iwmr: ptr of iwmr @start: virtual start 2532 * address @len: length of mr @virt: virtual address 2533 * 2534 * Re-register a user memory region when a change translation is requested. Re-register a new region while reusing the 2535 * stag from the original registration. 2536 */ 2537 struct ib_mr * 2538 irdma_rereg_mr_trans(struct irdma_mr *iwmr, u64 start, u64 len, 2539 u64 virt, struct ib_udata *udata) 2540 { 2541 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2542 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2543 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2544 struct ib_pd *pd = iwmr->ibmr.pd; 2545 struct ib_umem *region; 2546 u8 lvl; 2547 int err; 2548 2549 region = ib_umem_get(pd->uobject->context, start, len, iwmr->access, 0); 2550 2551 if (IS_ERR(region)) { 2552 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2553 "Failed to create ib_umem region\n"); 2554 return (struct ib_mr *)region; 2555 } 2556 2557 iwmr->region = region; 2558 iwmr->ibmr.iova = virt; 2559 iwmr->ibmr.pd = pd; 2560 iwmr->page_size = PAGE_SIZE; 2561 2562 iwmr->len = region->length; 2563 iwpbl->user_base = virt; 2564 iwmr->page_cnt = irdma_ib_umem_num_dma_blocks(region, iwmr->page_size, 2565 virt); 2566 2567 lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0; 2568 2569 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 2570 if (err) 2571 goto error; 2572 2573 if (lvl) { 2574 err = irdma_check_mr_contiguous(palloc, 2575 iwmr->page_size); 2576 if (err) { 2577 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2578 iwpbl->pbl_allocated = false; 2579 } 2580 } 2581 2582 err = irdma_hwreg_mr(iwdev, iwmr, iwmr->access); 2583 if (err) 2584 goto error; 2585 2586 return &iwmr->ibmr; 2587 2588 error: 2589 if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated) { 2590 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2591 iwpbl->pbl_allocated = false; 2592 } 2593 ib_umem_release(region); 2594 iwmr->region = NULL; 2595 2596 return ERR_PTR(err); 2597 } 2598 2599 /** 2600 * irdma_reg_phys_mr - register kernel physical memory 2601 * @pd: ibpd pointer 2602 * @addr: physical address of memory to register 2603 * @size: size of memory to register 2604 * @access: Access rights 2605 * @iova_start: start of virtual address for physical buffers 2606 */ 2607 struct ib_mr * 2608 irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access, 2609 u64 *iova_start) 2610 { 2611 struct irdma_device *iwdev = to_iwdev(pd->device); 2612 struct irdma_pbl *iwpbl; 2613 struct irdma_mr *iwmr; 2614 u32 stag; 2615 int ret; 2616 2617 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); 2618 if (!iwmr) 2619 return ERR_PTR(-ENOMEM); 2620 2621 iwmr->ibmr.pd = pd; 2622 iwmr->ibmr.device = pd->device; 2623 iwpbl = &iwmr->iwpbl; 2624 iwpbl->iwmr = iwmr; 2625 iwmr->type = IRDMA_MEMREG_TYPE_MEM; 2626 iwpbl->user_base = *iova_start; 2627 stag = irdma_create_stag(iwdev); 2628 if (!stag) { 2629 ret = -ENOMEM; 2630 goto err; 2631 } 2632 2633 iwmr->stag = stag; 2634 iwmr->ibmr.iova = *iova_start; 2635 iwmr->ibmr.rkey = stag; 2636 iwmr->ibmr.lkey = stag; 2637 iwmr->page_cnt = 1; 2638 iwmr->pgaddrmem[0] = addr; 2639 iwmr->len = size; 2640 iwmr->page_size = SZ_4K; 2641 ret = irdma_hwreg_mr(iwdev, iwmr, access); 2642 if (ret) { 2643 irdma_free_stag(iwdev, stag); 2644 goto err; 2645 } 2646 2647 return &iwmr->ibmr; 2648 2649 err: 2650 kfree(iwmr); 2651 2652 return ERR_PTR(ret); 2653 } 2654 2655 /** 2656 * irdma_get_dma_mr - register physical mem 2657 * @pd: ptr of pd 2658 * @acc: access for memory 2659 */ 2660 static struct ib_mr * 2661 irdma_get_dma_mr(struct ib_pd *pd, int acc) 2662 { 2663 u64 kva = 0; 2664 2665 return irdma_reg_phys_mr(pd, 0, 0, acc, &kva); 2666 } 2667 2668 /** 2669 * irdma_del_memlist - Deleting pbl list entries for CQ/QP 2670 * @iwmr: iwmr for IB's user page addresses 2671 * @ucontext: ptr to user context 2672 */ 2673 void 2674 irdma_del_memlist(struct irdma_mr *iwmr, 2675 struct irdma_ucontext *ucontext) 2676 { 2677 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2678 unsigned long flags; 2679 2680 switch (iwmr->type) { 2681 case IRDMA_MEMREG_TYPE_CQ: 2682 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 2683 if (iwpbl->on_list) { 2684 iwpbl->on_list = false; 2685 list_del(&iwpbl->list); 2686 } 2687 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 2688 break; 2689 case IRDMA_MEMREG_TYPE_QP: 2690 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 2691 if (iwpbl->on_list) { 2692 iwpbl->on_list = false; 2693 list_del(&iwpbl->list); 2694 } 2695 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 2696 break; 2697 default: 2698 break; 2699 } 2700 } 2701 2702 /** 2703 * irdma_copy_sg_list - copy sg list for qp 2704 * @sg_list: copied into sg_list 2705 * @sgl: copy from sgl 2706 * @num_sges: count of sg entries 2707 */ 2708 static void 2709 irdma_copy_sg_list(struct irdma_sge *sg_list, struct ib_sge *sgl, 2710 int num_sges) 2711 { 2712 unsigned int i; 2713 2714 for (i = 0; i < num_sges; i++) { 2715 sg_list[i].tag_off = sgl[i].addr; 2716 sg_list[i].len = sgl[i].length; 2717 sg_list[i].stag = sgl[i].lkey; 2718 } 2719 } 2720 2721 /** 2722 * irdma_post_send - kernel application wr 2723 * @ibqp: qp ptr for wr 2724 * @ib_wr: work request ptr 2725 * @bad_wr: return of bad wr if err 2726 */ 2727 static int 2728 irdma_post_send(struct ib_qp *ibqp, 2729 const struct ib_send_wr *ib_wr, 2730 const struct ib_send_wr **bad_wr) 2731 { 2732 struct irdma_qp *iwqp; 2733 struct irdma_qp_uk *ukqp; 2734 struct irdma_sc_dev *dev; 2735 struct irdma_post_sq_info info; 2736 int err = 0; 2737 unsigned long flags; 2738 bool inv_stag; 2739 struct irdma_ah *ah; 2740 2741 iwqp = to_iwqp(ibqp); 2742 ukqp = &iwqp->sc_qp.qp_uk; 2743 dev = &iwqp->iwdev->rf->sc_dev; 2744 2745 spin_lock_irqsave(&iwqp->lock, flags); 2746 while (ib_wr) { 2747 memset(&info, 0, sizeof(info)); 2748 inv_stag = false; 2749 info.wr_id = (ib_wr->wr_id); 2750 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all) 2751 info.signaled = true; 2752 if (ib_wr->send_flags & IB_SEND_FENCE) 2753 info.read_fence = true; 2754 switch (ib_wr->opcode) { 2755 case IB_WR_SEND_WITH_IMM: 2756 if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) { 2757 info.imm_data_valid = true; 2758 info.imm_data = ntohl(ib_wr->ex.imm_data); 2759 } else { 2760 err = -EINVAL; 2761 break; 2762 } 2763 /* fallthrough */ 2764 case IB_WR_SEND: 2765 case IB_WR_SEND_WITH_INV: 2766 if (ib_wr->opcode == IB_WR_SEND || 2767 ib_wr->opcode == IB_WR_SEND_WITH_IMM) { 2768 if (ib_wr->send_flags & IB_SEND_SOLICITED) 2769 info.op_type = IRDMA_OP_TYPE_SEND_SOL; 2770 else 2771 info.op_type = IRDMA_OP_TYPE_SEND; 2772 } else { 2773 if (ib_wr->send_flags & IB_SEND_SOLICITED) 2774 info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV; 2775 else 2776 info.op_type = IRDMA_OP_TYPE_SEND_INV; 2777 info.stag_to_inv = ib_wr->ex.invalidate_rkey; 2778 } 2779 2780 info.op.send.num_sges = ib_wr->num_sge; 2781 info.op.send.sg_list = (struct irdma_sge *)ib_wr->sg_list; 2782 if (iwqp->ibqp.qp_type == IB_QPT_UD || 2783 iwqp->ibqp.qp_type == IB_QPT_GSI) { 2784 ah = to_iwah(ud_wr(ib_wr)->ah); 2785 info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx; 2786 info.op.send.qkey = ud_wr(ib_wr)->remote_qkey; 2787 info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn; 2788 } 2789 2790 if (ib_wr->send_flags & IB_SEND_INLINE) 2791 err = irdma_uk_inline_send(ukqp, &info, false); 2792 else 2793 err = irdma_uk_send(ukqp, &info, false); 2794 break; 2795 case IB_WR_RDMA_WRITE_WITH_IMM: 2796 if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) { 2797 info.imm_data_valid = true; 2798 info.imm_data = ntohl(ib_wr->ex.imm_data); 2799 } else { 2800 err = -EINVAL; 2801 break; 2802 } 2803 /* fallthrough */ 2804 case IB_WR_RDMA_WRITE: 2805 if (ib_wr->send_flags & IB_SEND_SOLICITED) 2806 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL; 2807 else 2808 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE; 2809 2810 info.op.rdma_write.num_lo_sges = ib_wr->num_sge; 2811 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list; 2812 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr; 2813 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey; 2814 if (ib_wr->send_flags & IB_SEND_INLINE) 2815 err = irdma_uk_inline_rdma_write(ukqp, &info, false); 2816 else 2817 err = irdma_uk_rdma_write(ukqp, &info, false); 2818 break; 2819 case IB_WR_RDMA_READ_WITH_INV: 2820 inv_stag = true; 2821 /* fallthrough */ 2822 case IB_WR_RDMA_READ: 2823 if (ib_wr->num_sge > 2824 dev->hw_attrs.uk_attrs.max_hw_read_sges) { 2825 err = -EINVAL; 2826 break; 2827 } 2828 info.op_type = IRDMA_OP_TYPE_RDMA_READ; 2829 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr; 2830 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey; 2831 info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list; 2832 info.op.rdma_read.num_lo_sges = ib_wr->num_sge; 2833 err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false); 2834 break; 2835 case IB_WR_LOCAL_INV: 2836 info.op_type = IRDMA_OP_TYPE_INV_STAG; 2837 info.local_fence = info.read_fence; 2838 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey; 2839 err = irdma_uk_stag_local_invalidate(ukqp, &info, true); 2840 break; 2841 case IB_WR_REG_MR:{ 2842 struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr); 2843 struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc; 2844 struct irdma_fast_reg_stag_info stag_info = {0}; 2845 2846 stag_info.signaled = info.signaled; 2847 stag_info.read_fence = info.read_fence; 2848 stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access); 2849 stag_info.stag_key = reg_wr(ib_wr)->key & 0xff; 2850 stag_info.stag_idx = reg_wr(ib_wr)->key >> 8; 2851 stag_info.page_size = reg_wr(ib_wr)->mr->page_size; 2852 stag_info.wr_id = ib_wr->wr_id; 2853 stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED; 2854 stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova; 2855 stag_info.total_len = iwmr->ibmr.length; 2856 if (palloc->level == PBLE_LEVEL_2) { 2857 stag_info.chunk_size = 3; 2858 stag_info.first_pm_pbl_index = palloc->level2.root.idx; 2859 } else { 2860 stag_info.chunk_size = 1; 2861 stag_info.first_pm_pbl_index = palloc->level1.idx; 2862 } 2863 stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE; 2864 err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info, 2865 true); 2866 break; 2867 } 2868 default: 2869 err = -EINVAL; 2870 irdma_debug(&iwqp->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2871 "upost_send bad opcode = 0x%x\n", 2872 ib_wr->opcode); 2873 break; 2874 } 2875 2876 if (err) 2877 break; 2878 ib_wr = ib_wr->next; 2879 } 2880 2881 if (!iwqp->flush_issued) { 2882 if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS) 2883 irdma_uk_qp_post_wr(ukqp); 2884 spin_unlock_irqrestore(&iwqp->lock, flags); 2885 } else { 2886 spin_unlock_irqrestore(&iwqp->lock, flags); 2887 irdma_sched_qp_flush_work(iwqp); 2888 } 2889 2890 if (err) 2891 *bad_wr = ib_wr; 2892 2893 return err; 2894 } 2895 2896 /** 2897 * irdma_post_recv - post receive wr for kernel application 2898 * @ibqp: ib qp pointer 2899 * @ib_wr: work request for receive 2900 * @bad_wr: bad wr caused an error 2901 */ 2902 static int 2903 irdma_post_recv(struct ib_qp *ibqp, 2904 const struct ib_recv_wr *ib_wr, 2905 const struct ib_recv_wr **bad_wr) 2906 { 2907 struct irdma_qp *iwqp = to_iwqp(ibqp); 2908 struct irdma_qp_uk *ukqp = &iwqp->sc_qp.qp_uk; 2909 struct irdma_post_rq_info post_recv = {0}; 2910 struct irdma_sge *sg_list = iwqp->sg_list; 2911 unsigned long flags; 2912 int err = 0; 2913 2914 spin_lock_irqsave(&iwqp->lock, flags); 2915 2916 while (ib_wr) { 2917 if (ib_wr->num_sge > ukqp->max_rq_frag_cnt) { 2918 err = -EINVAL; 2919 goto out; 2920 } 2921 post_recv.num_sges = ib_wr->num_sge; 2922 post_recv.wr_id = ib_wr->wr_id; 2923 irdma_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge); 2924 post_recv.sg_list = sg_list; 2925 err = irdma_uk_post_receive(ukqp, &post_recv); 2926 if (err) { 2927 irdma_debug(&iwqp->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2928 "post_recv err %d\n", err); 2929 goto out; 2930 } 2931 2932 ib_wr = ib_wr->next; 2933 } 2934 2935 out: 2936 spin_unlock_irqrestore(&iwqp->lock, flags); 2937 if (iwqp->flush_issued) 2938 irdma_sched_qp_flush_work(iwqp); 2939 2940 if (err) 2941 *bad_wr = ib_wr; 2942 2943 return err; 2944 } 2945 2946 /** 2947 * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status 2948 * @opcode: iwarp flush code 2949 */ 2950 static enum ib_wc_status 2951 irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode) 2952 { 2953 switch (opcode) { 2954 case FLUSH_PROT_ERR: 2955 return IB_WC_LOC_PROT_ERR; 2956 case FLUSH_REM_ACCESS_ERR: 2957 return IB_WC_REM_ACCESS_ERR; 2958 case FLUSH_LOC_QP_OP_ERR: 2959 return IB_WC_LOC_QP_OP_ERR; 2960 case FLUSH_REM_OP_ERR: 2961 return IB_WC_REM_OP_ERR; 2962 case FLUSH_LOC_LEN_ERR: 2963 return IB_WC_LOC_LEN_ERR; 2964 case FLUSH_GENERAL_ERR: 2965 return IB_WC_WR_FLUSH_ERR; 2966 case FLUSH_MW_BIND_ERR: 2967 return IB_WC_MW_BIND_ERR; 2968 case FLUSH_REM_INV_REQ_ERR: 2969 return IB_WC_REM_INV_REQ_ERR; 2970 case FLUSH_RETRY_EXC_ERR: 2971 return IB_WC_RETRY_EXC_ERR; 2972 case FLUSH_FATAL_ERR: 2973 default: 2974 return IB_WC_FATAL_ERR; 2975 } 2976 } 2977 2978 /** 2979 * irdma_process_cqe - process cqe info 2980 * @entry: processed cqe 2981 * @cq_poll_info: cqe info 2982 */ 2983 static void 2984 irdma_process_cqe(struct ib_wc *entry, 2985 struct irdma_cq_poll_info *cq_poll_info) 2986 { 2987 struct irdma_sc_qp *qp; 2988 2989 entry->wc_flags = 0; 2990 entry->pkey_index = 0; 2991 entry->wr_id = cq_poll_info->wr_id; 2992 2993 qp = cq_poll_info->qp_handle; 2994 entry->qp = qp->qp_uk.back_qp; 2995 2996 if (cq_poll_info->error) { 2997 entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ? 2998 irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR; 2999 3000 entry->vendor_err = cq_poll_info->major_err << 16 | 3001 cq_poll_info->minor_err; 3002 } else { 3003 entry->status = IB_WC_SUCCESS; 3004 if (cq_poll_info->imm_valid) { 3005 entry->ex.imm_data = htonl(cq_poll_info->imm_data); 3006 entry->wc_flags |= IB_WC_WITH_IMM; 3007 } 3008 if (cq_poll_info->ud_smac_valid) { 3009 ether_addr_copy(entry->smac, cq_poll_info->ud_smac); 3010 entry->wc_flags |= IB_WC_WITH_SMAC; 3011 } 3012 3013 if (cq_poll_info->ud_vlan_valid) { 3014 u16 vlan = cq_poll_info->ud_vlan & EVL_VLID_MASK; 3015 3016 entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT; 3017 if (vlan) { 3018 entry->vlan_id = vlan; 3019 entry->wc_flags |= IB_WC_WITH_VLAN; 3020 } 3021 } else { 3022 entry->sl = 0; 3023 } 3024 } 3025 3026 if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) { 3027 set_ib_wc_op_sq(cq_poll_info, entry); 3028 } else { 3029 set_ib_wc_op_rq(cq_poll_info, entry, 3030 qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM ? 3031 true : false); 3032 if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD && 3033 cq_poll_info->stag_invalid_set) { 3034 entry->ex.invalidate_rkey = cq_poll_info->inv_stag; 3035 entry->wc_flags |= IB_WC_WITH_INVALIDATE; 3036 } 3037 } 3038 3039 if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) { 3040 entry->src_qp = cq_poll_info->ud_src_qpn; 3041 entry->slid = 0; 3042 entry->wc_flags |= 3043 (IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE); 3044 entry->network_hdr_type = cq_poll_info->ipv4 ? 3045 RDMA_NETWORK_IPV4 : 3046 RDMA_NETWORK_IPV6; 3047 } else { 3048 entry->src_qp = cq_poll_info->qp_id; 3049 } 3050 3051 entry->byte_len = cq_poll_info->bytes_xfered; 3052 } 3053 3054 /** 3055 * irdma_poll_one - poll one entry of the CQ 3056 * @ukcq: ukcq to poll 3057 * @cur_cqe: current CQE info to be filled in 3058 * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ 3059 * 3060 * Returns the internal irdma device error code or 0 on success 3061 */ 3062 static inline int 3063 irdma_poll_one(struct irdma_cq_uk *ukcq, 3064 struct irdma_cq_poll_info *cur_cqe, 3065 struct ib_wc *entry) 3066 { 3067 int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe); 3068 3069 if (ret) 3070 return ret; 3071 3072 irdma_process_cqe(entry, cur_cqe); 3073 3074 return 0; 3075 } 3076 3077 /** 3078 * __irdma_poll_cq - poll cq for completion (kernel apps) 3079 * @iwcq: cq to poll 3080 * @num_entries: number of entries to poll 3081 * @entry: wr of a completed entry 3082 */ 3083 static int 3084 __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry) 3085 { 3086 struct list_head *tmp_node, *list_node; 3087 struct irdma_cq_buf *last_buf = NULL; 3088 struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe; 3089 struct irdma_cq_buf *cq_buf; 3090 int ret; 3091 struct irdma_device *iwdev; 3092 struct irdma_cq_uk *ukcq; 3093 bool cq_new_cqe = false; 3094 int resized_bufs = 0; 3095 int npolled = 0; 3096 3097 iwdev = to_iwdev(iwcq->ibcq.device); 3098 ukcq = &iwcq->sc_cq.cq_uk; 3099 3100 /* go through the list of previously resized CQ buffers */ 3101 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) { 3102 cq_buf = container_of(list_node, struct irdma_cq_buf, list); 3103 while (npolled < num_entries) { 3104 ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled); 3105 if (!ret) { 3106 ++npolled; 3107 cq_new_cqe = true; 3108 continue; 3109 } 3110 if (ret == -ENOENT) 3111 break; 3112 /* QP using the CQ is destroyed. Skip reporting this CQE */ 3113 if (ret == -EFAULT) { 3114 cq_new_cqe = true; 3115 continue; 3116 } 3117 goto error; 3118 } 3119 3120 /* save the resized CQ buffer which received the last cqe */ 3121 if (cq_new_cqe) 3122 last_buf = cq_buf; 3123 cq_new_cqe = false; 3124 } 3125 3126 /* check the current CQ for new cqes */ 3127 while (npolled < num_entries) { 3128 ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled); 3129 if (ret == -ENOENT) { 3130 ret = irdma_generated_cmpls(iwcq, cur_cqe); 3131 if (!ret) 3132 irdma_process_cqe(entry + npolled, cur_cqe); 3133 } 3134 if (!ret) { 3135 ++npolled; 3136 cq_new_cqe = true; 3137 continue; 3138 } 3139 3140 if (ret == -ENOENT) 3141 break; 3142 /* QP using the CQ is destroyed. Skip reporting this CQE */ 3143 if (ret == -EFAULT) { 3144 cq_new_cqe = true; 3145 continue; 3146 } 3147 goto error; 3148 } 3149 3150 if (cq_new_cqe) 3151 /* all previous CQ resizes are complete */ 3152 resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL); 3153 else if (last_buf) 3154 /* only CQ resizes up to the last_buf are complete */ 3155 resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf); 3156 if (resized_bufs) 3157 /* report to the HW the number of complete CQ resizes */ 3158 irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs); 3159 3160 return npolled; 3161 error: 3162 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3163 "%s: Error polling CQ, irdma_err: %d\n", __func__, ret); 3164 3165 return ret; 3166 } 3167 3168 /** 3169 * irdma_poll_cq - poll cq for completion (kernel apps) 3170 * @ibcq: cq to poll 3171 * @num_entries: number of entries to poll 3172 * @entry: wr of a completed entry 3173 */ 3174 static int 3175 irdma_poll_cq(struct ib_cq *ibcq, int num_entries, 3176 struct ib_wc *entry) 3177 { 3178 struct irdma_cq *iwcq; 3179 unsigned long flags; 3180 int ret; 3181 3182 iwcq = to_iwcq(ibcq); 3183 3184 spin_lock_irqsave(&iwcq->lock, flags); 3185 ret = __irdma_poll_cq(iwcq, num_entries, entry); 3186 spin_unlock_irqrestore(&iwcq->lock, flags); 3187 3188 return ret; 3189 } 3190 3191 /** 3192 * irdma_req_notify_cq - arm cq kernel application 3193 * @ibcq: cq to arm 3194 * @notify_flags: notofication flags 3195 */ 3196 static int 3197 irdma_req_notify_cq(struct ib_cq *ibcq, 3198 enum ib_cq_notify_flags notify_flags) 3199 { 3200 struct irdma_cq *iwcq; 3201 struct irdma_cq_uk *ukcq; 3202 unsigned long flags; 3203 enum irdma_cmpl_notify cq_notify = IRDMA_CQ_COMPL_EVENT; 3204 bool promo_event = false; 3205 int ret = 0; 3206 3207 iwcq = to_iwcq(ibcq); 3208 ukcq = &iwcq->sc_cq.cq_uk; 3209 3210 spin_lock_irqsave(&iwcq->lock, flags); 3211 if (notify_flags == IB_CQ_SOLICITED) { 3212 cq_notify = IRDMA_CQ_COMPL_SOLICITED; 3213 } else { 3214 if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED) 3215 promo_event = true; 3216 } 3217 3218 if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) { 3219 iwcq->last_notify = cq_notify; 3220 irdma_uk_cq_request_notification(ukcq, cq_notify); 3221 } 3222 3223 if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) && 3224 (!irdma_cq_empty(iwcq) || !list_empty(&iwcq->cmpl_generated))) 3225 ret = 1; 3226 spin_unlock_irqrestore(&iwcq->lock, flags); 3227 3228 return ret; 3229 } 3230 3231 /** 3232 * mcast_list_add - Add a new mcast item to list 3233 * @rf: RDMA PCI function 3234 * @new_elem: pointer to element to add 3235 */ 3236 static void 3237 mcast_list_add(struct irdma_pci_f *rf, 3238 struct mc_table_list *new_elem) 3239 { 3240 list_add(&new_elem->list, &rf->mc_qht_list.list); 3241 } 3242 3243 /** 3244 * mcast_list_del - Remove an mcast item from list 3245 * @mc_qht_elem: pointer to mcast table list element 3246 */ 3247 static void 3248 mcast_list_del(struct mc_table_list *mc_qht_elem) 3249 { 3250 if (mc_qht_elem) 3251 list_del(&mc_qht_elem->list); 3252 } 3253 3254 /** 3255 * mcast_list_lookup_ip - Search mcast list for address 3256 * @rf: RDMA PCI function 3257 * @ip_mcast: pointer to mcast IP address 3258 */ 3259 static struct mc_table_list * 3260 mcast_list_lookup_ip(struct irdma_pci_f *rf, 3261 u32 *ip_mcast) 3262 { 3263 struct mc_table_list *mc_qht_el; 3264 struct list_head *pos, *q; 3265 3266 list_for_each_safe(pos, q, &rf->mc_qht_list.list) { 3267 mc_qht_el = list_entry(pos, struct mc_table_list, list); 3268 if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast, 3269 sizeof(mc_qht_el->mc_info.dest_ip))) 3270 return mc_qht_el; 3271 } 3272 3273 return NULL; 3274 } 3275 3276 /** 3277 * irdma_mcast_cqp_op - perform a mcast cqp operation 3278 * @iwdev: irdma device 3279 * @mc_grp_ctx: mcast group info 3280 * @op: operation 3281 * 3282 * returns error status 3283 */ 3284 static int 3285 irdma_mcast_cqp_op(struct irdma_device *iwdev, 3286 struct irdma_mcast_grp_info *mc_grp_ctx, u8 op) 3287 { 3288 struct cqp_cmds_info *cqp_info; 3289 struct irdma_cqp_request *cqp_request; 3290 int status; 3291 3292 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 3293 if (!cqp_request) 3294 return -ENOMEM; 3295 3296 cqp_request->info.in.u.mc_create.info = *mc_grp_ctx; 3297 cqp_info = &cqp_request->info; 3298 cqp_info->cqp_cmd = op; 3299 cqp_info->post_sq = 1; 3300 cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request; 3301 cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp; 3302 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 3303 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 3304 3305 return status; 3306 } 3307 3308 /** 3309 * irdma_attach_mcast - attach a qp to a multicast group 3310 * @ibqp: ptr to qp 3311 * @ibgid: pointer to global ID 3312 * @lid: local ID 3313 * 3314 * returns error status 3315 */ 3316 static int 3317 irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) 3318 { 3319 struct irdma_qp *iwqp = to_iwqp(ibqp); 3320 struct irdma_device *iwdev = iwqp->iwdev; 3321 struct irdma_pci_f *rf = iwdev->rf; 3322 struct mc_table_list *mc_qht_elem; 3323 struct irdma_mcast_grp_ctx_entry_info mcg_info = {0}; 3324 unsigned long flags; 3325 u32 ip_addr[4] = {0}; 3326 u32 mgn; 3327 u32 no_mgs; 3328 int ret = 0; 3329 bool ipv4; 3330 u16 vlan_id; 3331 union irdma_sockaddr sgid_addr; 3332 unsigned char dmac[ETHER_ADDR_LEN]; 3333 3334 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid); 3335 3336 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) { 3337 irdma_copy_ip_ntohl(ip_addr, 3338 sgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32); 3339 irdma_netdev_vlan_ipv6(iwqp->cm_id, ip_addr, &vlan_id, NULL); 3340 ipv4 = false; 3341 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3342 "qp_id=%d, IP6address=%x:%x:%x:%x\n", ibqp->qp_num, 3343 IRDMA_PRINT_IP6(ip_addr)); 3344 irdma_mcast_mac_v6(ip_addr, dmac); 3345 } else { 3346 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr); 3347 ipv4 = true; 3348 vlan_id = irdma_get_vlan_ipv4(iwqp->cm_id, ip_addr); 3349 irdma_mcast_mac_v4(ip_addr, dmac); 3350 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3351 "qp_id=%d, IP4address=%x, MAC=%x:%x:%x:%x:%x:%x\n", 3352 ibqp->qp_num, ip_addr[0], dmac[0], dmac[1], dmac[2], 3353 dmac[3], dmac[4], dmac[5]); 3354 } 3355 3356 spin_lock_irqsave(&rf->qh_list_lock, flags); 3357 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr); 3358 if (!mc_qht_elem) { 3359 struct irdma_dma_mem *dma_mem_mc; 3360 3361 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3362 mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL); 3363 if (!mc_qht_elem) 3364 return -ENOMEM; 3365 3366 mc_qht_elem->mc_info.ipv4_valid = ipv4; 3367 memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr, 3368 sizeof(mc_qht_elem->mc_info.dest_ip)); 3369 ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg, 3370 &mgn, &rf->next_mcg); 3371 if (ret) { 3372 kfree(mc_qht_elem); 3373 return -ENOMEM; 3374 } 3375 3376 mc_qht_elem->mc_info.mgn = mgn; 3377 dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc; 3378 dma_mem_mc->size = sizeof(u64)* IRDMA_MAX_MGS_PER_CTX; 3379 dma_mem_mc->va = irdma_allocate_dma_mem(&rf->hw, dma_mem_mc, 3380 dma_mem_mc->size, 3381 IRDMA_HW_PAGE_SIZE); 3382 if (!dma_mem_mc->va) { 3383 irdma_free_rsrc(rf, rf->allocated_mcgs, mgn); 3384 kfree(mc_qht_elem); 3385 return -ENOMEM; 3386 } 3387 3388 mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn; 3389 memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr, 3390 sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr)); 3391 mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4; 3392 mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id; 3393 if (vlan_id < VLAN_N_VID) 3394 mc_qht_elem->mc_grp_ctx.vlan_valid = true; 3395 mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->rf->sc_dev.hmc_fn_id; 3396 mc_qht_elem->mc_grp_ctx.qs_handle = 3397 iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle; 3398 ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac); 3399 3400 spin_lock_irqsave(&rf->qh_list_lock, flags); 3401 mcast_list_add(rf, mc_qht_elem); 3402 } else { 3403 if (mc_qht_elem->mc_grp_ctx.no_of_mgs == 3404 IRDMA_MAX_MGS_PER_CTX) { 3405 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3406 return -ENOMEM; 3407 } 3408 } 3409 3410 mcg_info.qp_id = iwqp->ibqp.qp_num; 3411 no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs; 3412 irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 3413 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3414 3415 /* Only if there is a change do we need to modify or create */ 3416 if (!no_mgs) { 3417 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3418 IRDMA_OP_MC_CREATE); 3419 } else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) { 3420 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3421 IRDMA_OP_MC_MODIFY); 3422 } else { 3423 return 0; 3424 } 3425 3426 if (ret) 3427 goto error; 3428 3429 return 0; 3430 3431 error: 3432 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 3433 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) { 3434 mcast_list_del(mc_qht_elem); 3435 irdma_free_dma_mem(&rf->hw, 3436 &mc_qht_elem->mc_grp_ctx.dma_mem_mc); 3437 irdma_free_rsrc(rf, rf->allocated_mcgs, 3438 mc_qht_elem->mc_grp_ctx.mg_id); 3439 kfree(mc_qht_elem); 3440 } 3441 3442 return ret; 3443 } 3444 3445 /** 3446 * irdma_detach_mcast - detach a qp from a multicast group 3447 * @ibqp: ptr to qp 3448 * @ibgid: pointer to global ID 3449 * @lid: local ID 3450 * 3451 * returns error status 3452 */ 3453 static int 3454 irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) 3455 { 3456 struct irdma_qp *iwqp = to_iwqp(ibqp); 3457 struct irdma_device *iwdev = iwqp->iwdev; 3458 struct irdma_pci_f *rf = iwdev->rf; 3459 u32 ip_addr[4] = {0}; 3460 struct mc_table_list *mc_qht_elem; 3461 struct irdma_mcast_grp_ctx_entry_info mcg_info = {0}; 3462 int ret; 3463 unsigned long flags; 3464 union irdma_sockaddr sgid_addr; 3465 3466 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid); 3467 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) 3468 irdma_copy_ip_ntohl(ip_addr, 3469 sgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32); 3470 else 3471 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr); 3472 3473 spin_lock_irqsave(&rf->qh_list_lock, flags); 3474 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr); 3475 if (!mc_qht_elem) { 3476 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3477 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3478 "address not found MCG\n"); 3479 return 0; 3480 } 3481 3482 mcg_info.qp_id = iwqp->ibqp.qp_num; 3483 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 3484 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) { 3485 mcast_list_del(mc_qht_elem); 3486 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3487 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3488 IRDMA_OP_MC_DESTROY); 3489 if (ret) { 3490 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3491 "failed MC_DESTROY MCG\n"); 3492 spin_lock_irqsave(&rf->qh_list_lock, flags); 3493 mcast_list_add(rf, mc_qht_elem); 3494 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3495 return -EAGAIN; 3496 } 3497 3498 irdma_free_dma_mem(&rf->hw, 3499 &mc_qht_elem->mc_grp_ctx.dma_mem_mc); 3500 irdma_free_rsrc(rf, rf->allocated_mcgs, 3501 mc_qht_elem->mc_grp_ctx.mg_id); 3502 kfree(mc_qht_elem); 3503 } else { 3504 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3505 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3506 IRDMA_OP_MC_MODIFY); 3507 if (ret) { 3508 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3509 "failed Modify MCG\n"); 3510 return ret; 3511 } 3512 } 3513 3514 return 0; 3515 } 3516 3517 /** 3518 * irdma_query_ah - Query address handle 3519 * @ibah: pointer to address handle 3520 * @ah_attr: address handle attributes 3521 */ 3522 static int 3523 irdma_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr) 3524 { 3525 struct irdma_ah *ah = to_iwah(ibah); 3526 3527 memset(ah_attr, 0, sizeof(*ah_attr)); 3528 if (ah->av.attrs.ah_flags & IB_AH_GRH) { 3529 ah_attr->ah_flags = IB_AH_GRH; 3530 ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label; 3531 ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos; 3532 ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl; 3533 ah_attr->grh.sgid_index = ah->sgid_index; 3534 ah_attr->grh.sgid_index = ah->sgid_index; 3535 memcpy(&ah_attr->grh.dgid, &ah->dgid, 3536 sizeof(ah_attr->grh.dgid)); 3537 } 3538 3539 return 0; 3540 } 3541 3542 static if_t 3543 irdma_get_netdev(struct ib_device *ibdev, u8 port_num) 3544 { 3545 struct irdma_device *iwdev = to_iwdev(ibdev); 3546 3547 if (iwdev->netdev) { 3548 dev_hold(iwdev->netdev); 3549 return iwdev->netdev; 3550 } 3551 3552 return NULL; 3553 } 3554 3555 static void 3556 irdma_set_device_ops(struct ib_device *ibdev) 3557 { 3558 struct ib_device *dev_ops = ibdev; 3559 3560 #if __FreeBSD_version >= 1400000 3561 dev_ops->ops.driver_id = RDMA_DRIVER_I40IW; 3562 dev_ops->ops.size_ib_ah = IRDMA_SET_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah); 3563 dev_ops->ops.size_ib_cq = IRDMA_SET_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq); 3564 dev_ops->ops.size_ib_pd = IRDMA_SET_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd); 3565 dev_ops->ops.size_ib_ucontext = IRDMA_SET_RDMA_OBJ_SIZE(ib_ucontext, 3566 irdma_ucontext, 3567 ibucontext); 3568 3569 #endif /* __FreeBSD_version >= 1400000 */ 3570 dev_ops->alloc_hw_stats = irdma_alloc_hw_stats; 3571 dev_ops->alloc_mr = irdma_alloc_mr; 3572 dev_ops->alloc_mw = irdma_alloc_mw; 3573 dev_ops->alloc_pd = irdma_alloc_pd; 3574 dev_ops->alloc_ucontext = irdma_alloc_ucontext; 3575 dev_ops->create_cq = irdma_create_cq; 3576 dev_ops->create_qp = irdma_create_qp; 3577 dev_ops->dealloc_mw = irdma_dealloc_mw; 3578 dev_ops->dealloc_pd = irdma_dealloc_pd; 3579 dev_ops->dealloc_ucontext = irdma_dealloc_ucontext; 3580 dev_ops->dereg_mr = irdma_dereg_mr; 3581 dev_ops->destroy_cq = irdma_destroy_cq; 3582 dev_ops->destroy_qp = irdma_destroy_qp; 3583 dev_ops->disassociate_ucontext = irdma_disassociate_ucontext; 3584 dev_ops->get_dev_fw_str = irdma_get_dev_fw_str; 3585 dev_ops->get_dma_mr = irdma_get_dma_mr; 3586 dev_ops->get_hw_stats = irdma_get_hw_stats; 3587 dev_ops->get_netdev = irdma_get_netdev; 3588 dev_ops->map_mr_sg = irdma_map_mr_sg; 3589 dev_ops->mmap = irdma_mmap; 3590 #if __FreeBSD_version >= 1400026 3591 dev_ops->mmap_free = irdma_mmap_free; 3592 #endif 3593 dev_ops->poll_cq = irdma_poll_cq; 3594 dev_ops->post_recv = irdma_post_recv; 3595 dev_ops->post_send = irdma_post_send; 3596 dev_ops->query_device = irdma_query_device; 3597 dev_ops->query_port = irdma_query_port; 3598 dev_ops->modify_port = irdma_modify_port; 3599 dev_ops->query_qp = irdma_query_qp; 3600 dev_ops->reg_user_mr = irdma_reg_user_mr; 3601 dev_ops->rereg_user_mr = irdma_rereg_user_mr; 3602 dev_ops->req_notify_cq = irdma_req_notify_cq; 3603 dev_ops->resize_cq = irdma_resize_cq; 3604 } 3605 3606 static void 3607 irdma_set_device_mcast_ops(struct ib_device *ibdev) 3608 { 3609 struct ib_device *dev_ops = ibdev; 3610 dev_ops->attach_mcast = irdma_attach_mcast; 3611 dev_ops->detach_mcast = irdma_detach_mcast; 3612 } 3613 3614 static void 3615 irdma_set_device_roce_ops(struct ib_device *ibdev) 3616 { 3617 struct ib_device *dev_ops = ibdev; 3618 dev_ops->create_ah = irdma_create_ah; 3619 dev_ops->destroy_ah = irdma_destroy_ah; 3620 dev_ops->get_link_layer = irdma_get_link_layer; 3621 dev_ops->get_port_immutable = irdma_roce_port_immutable; 3622 dev_ops->modify_qp = irdma_modify_qp_roce; 3623 dev_ops->query_ah = irdma_query_ah; 3624 dev_ops->query_gid = irdma_query_gid_roce; 3625 dev_ops->query_pkey = irdma_query_pkey; 3626 ibdev->add_gid = irdma_add_gid; 3627 ibdev->del_gid = irdma_del_gid; 3628 } 3629 3630 static void 3631 irdma_set_device_iw_ops(struct ib_device *ibdev) 3632 { 3633 struct ib_device *dev_ops = ibdev; 3634 3635 ibdev->uverbs_cmd_mask |= 3636 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 3637 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 3638 3639 dev_ops->create_ah = irdma_create_ah_stub; 3640 dev_ops->destroy_ah = irdma_destroy_ah_stub; 3641 dev_ops->get_port_immutable = irdma_iw_port_immutable; 3642 dev_ops->modify_qp = irdma_modify_qp; 3643 dev_ops->query_gid = irdma_query_gid; 3644 dev_ops->query_pkey = irdma_iw_query_pkey; 3645 } 3646 3647 static inline void 3648 irdma_set_device_gen1_ops(struct ib_device *ibdev) 3649 { 3650 } 3651 3652 /** 3653 * irdma_init_roce_device - initialization of roce rdma device 3654 * @iwdev: irdma device 3655 */ 3656 static void 3657 irdma_init_roce_device(struct irdma_device *iwdev) 3658 { 3659 kc_set_roce_uverbs_cmd_mask(iwdev); 3660 iwdev->ibdev.node_type = RDMA_NODE_IB_CA; 3661 addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid, 3662 if_getlladdr(iwdev->netdev)); 3663 irdma_set_device_roce_ops(&iwdev->ibdev); 3664 if (iwdev->rf->rdma_ver == IRDMA_GEN_2) 3665 irdma_set_device_mcast_ops(&iwdev->ibdev); 3666 } 3667 3668 /** 3669 * irdma_init_iw_device - initialization of iwarp rdma device 3670 * @iwdev: irdma device 3671 */ 3672 static int 3673 irdma_init_iw_device(struct irdma_device *iwdev) 3674 { 3675 if_t netdev = iwdev->netdev; 3676 3677 iwdev->ibdev.node_type = RDMA_NODE_RNIC; 3678 addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid, 3679 if_getlladdr(netdev)); 3680 iwdev->ibdev.iwcm = kzalloc(sizeof(*iwdev->ibdev.iwcm), GFP_KERNEL); 3681 if (!iwdev->ibdev.iwcm) 3682 return -ENOMEM; 3683 3684 iwdev->ibdev.iwcm->add_ref = irdma_qp_add_ref; 3685 iwdev->ibdev.iwcm->rem_ref = irdma_qp_rem_ref; 3686 iwdev->ibdev.iwcm->get_qp = irdma_get_qp; 3687 iwdev->ibdev.iwcm->connect = irdma_connect; 3688 iwdev->ibdev.iwcm->accept = irdma_accept; 3689 iwdev->ibdev.iwcm->reject = irdma_reject; 3690 iwdev->ibdev.iwcm->create_listen = irdma_create_listen; 3691 iwdev->ibdev.iwcm->destroy_listen = irdma_destroy_listen; 3692 memcpy(iwdev->ibdev.iwcm->ifname, if_name(netdev), 3693 sizeof(iwdev->ibdev.iwcm->ifname)); 3694 irdma_set_device_iw_ops(&iwdev->ibdev); 3695 3696 return 0; 3697 } 3698 3699 /** 3700 * irdma_init_rdma_device - initialization of rdma device 3701 * @iwdev: irdma device 3702 */ 3703 static int 3704 irdma_init_rdma_device(struct irdma_device *iwdev) 3705 { 3706 int ret; 3707 3708 iwdev->ibdev.owner = THIS_MODULE; 3709 iwdev->ibdev.uverbs_abi_ver = IRDMA_ABI_VER; 3710 kc_set_rdma_uverbs_cmd_mask(iwdev); 3711 3712 if (iwdev->roce_mode) { 3713 irdma_init_roce_device(iwdev); 3714 } else { 3715 ret = irdma_init_iw_device(iwdev); 3716 if (ret) 3717 return ret; 3718 } 3719 3720 iwdev->ibdev.phys_port_cnt = 1; 3721 iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count; 3722 iwdev->ibdev.dev.parent = iwdev->rf->dev_ctx.dev; 3723 set_ibdev_dma_device(iwdev->ibdev, &iwdev->rf->pcidev->dev); 3724 irdma_set_device_ops(&iwdev->ibdev); 3725 if (iwdev->rf->rdma_ver == IRDMA_GEN_1) 3726 irdma_set_device_gen1_ops(&iwdev->ibdev); 3727 3728 return 0; 3729 } 3730 3731 /** 3732 * irdma_port_ibevent - indicate port event 3733 * @iwdev: irdma device 3734 */ 3735 void 3736 irdma_port_ibevent(struct irdma_device *iwdev) 3737 { 3738 struct ib_event event; 3739 3740 event.device = &iwdev->ibdev; 3741 event.element.port_num = 1; 3742 event.event = 3743 iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3744 ib_dispatch_event(&event); 3745 } 3746 3747 /** 3748 * irdma_ib_unregister_device - unregister rdma device from IB 3749 * core 3750 * @iwdev: irdma device 3751 */ 3752 void 3753 irdma_ib_unregister_device(struct irdma_device *iwdev) 3754 { 3755 iwdev->iw_status = 0; 3756 irdma_port_ibevent(iwdev); 3757 ib_unregister_device(&iwdev->ibdev); 3758 dev_put(iwdev->netdev); 3759 kfree(iwdev->ibdev.iwcm); 3760 iwdev->ibdev.iwcm = NULL; 3761 } 3762 3763 /** 3764 * irdma_ib_register_device - register irdma device to IB core 3765 * @iwdev: irdma device 3766 */ 3767 int 3768 irdma_ib_register_device(struct irdma_device *iwdev) 3769 { 3770 int ret; 3771 3772 ret = irdma_init_rdma_device(iwdev); 3773 if (ret) 3774 return ret; 3775 3776 dev_hold(iwdev->netdev); 3777 sprintf(iwdev->ibdev.name, "irdma-%s", if_name(iwdev->netdev)); 3778 ret = ib_register_device(&iwdev->ibdev, NULL); 3779 if (ret) 3780 goto error; 3781 3782 iwdev->iw_status = 1; 3783 irdma_port_ibevent(iwdev); 3784 3785 return 0; 3786 3787 error: 3788 kfree(iwdev->ibdev.iwcm); 3789 iwdev->ibdev.iwcm = NULL; 3790 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, "Register RDMA device fail\n"); 3791 3792 return ret; 3793 } 3794