xref: /freebsd/sys/dev/irdma/irdma_main.h (revision f5463265955b829775bbb32e1fd0bc11dafc36ce)
1 /*-
2  * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
3  *
4  * Copyright (c) 2015 - 2023 Intel Corporation
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenFabrics.org BSD license below:
11  *
12  *   Redistribution and use in source and binary forms, with or
13  *   without modification, are permitted provided that the following
14  *   conditions are met:
15  *
16  *    - Redistributions of source code must retain the above
17  *	copyright notice, this list of conditions and the following
18  *	disclaimer.
19  *
20  *    - Redistributions in binary form must reproduce the above
21  *	copyright notice, this list of conditions and the following
22  *	disclaimer in the documentation and/or other materials
23  *	provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #ifndef IRDMA_MAIN_H
36 #define IRDMA_MAIN_H
37 
38 #include <linux/in.h>
39 #include <netinet/ip6.h>
40 #include <netinet/udp.h>
41 #include <netinet/tcp.h>
42 #include <sys/rman.h>
43 #include <sys/socket.h>
44 #include <netinet/if_ether.h>
45 #include <linux/slab.h>
46 #include <linux/rculist.h>
47 #if __FreeBSD_version >= 1400000
48 #include <rdma/uverbs_ioctl.h>
49 #endif
50 #include <rdma/ib_smi.h>
51 #include <rdma/ib_verbs.h>
52 #include <rdma/ib_pack.h>
53 #include <rdma/rdma_cm.h>
54 #include <rdma/iw_cm.h>
55 #include <rdma/ib_user_verbs.h>
56 #include <rdma/ib_umem.h>
57 #include <rdma/ib_cache.h>
58 #include "osdep.h"
59 #include "irdma_defs.h"
60 #include "irdma_hmc.h"
61 #include "irdma_type.h"
62 #include "irdma_ws.h"
63 #include "irdma_protos.h"
64 #include "irdma_pble.h"
65 #include "irdma_cm.h"
66 #include "fbsd_kcompat.h"
67 #include "irdma-abi.h"
68 #include "irdma_verbs.h"
69 #include "irdma_user.h"
70 #include "irdma_puda.h"
71 
72 extern struct list_head irdma_handlers;
73 extern spinlock_t irdma_handler_lock;
74 extern bool irdma_upload_context;
75 
76 #define IRDMA_FW_VER_DEFAULT	2
77 #define IRDMA_HW_VER	        2
78 
79 #define IRDMA_ARP_ADD		1
80 #define IRDMA_ARP_DELETE	2
81 #define IRDMA_ARP_RESOLVE	3
82 
83 #define IRDMA_MACIP_ADD		1
84 #define IRDMA_MACIP_DELETE	2
85 
86 #define IW_CCQ_SIZE	(IRDMA_CQP_SW_SQSIZE_2048 + 1)
87 #define IW_CEQ_SIZE	2048
88 #define IW_AEQ_SIZE	2048
89 
90 #define RX_BUF_SIZE	(1536 + 8)
91 #define IW_REG0_SIZE	(4 * 1024)
92 #define IW_TX_TIMEOUT	(6 * HZ)
93 #define IW_FIRST_QPN	1
94 
95 #define IW_SW_CONTEXT_ALIGN	1024
96 
97 #define MAX_DPC_ITERATIONS	128
98 
99 #define IRDMA_EVENT_TIMEOUT_MS		5000
100 #define IRDMA_VCHNL_EVENT_TIMEOUT_MS	10000
101 #define IRDMA_RST_TIMEOUT_HZ		4
102 
103 #define	IRDMA_NO_QSET	0xffff
104 
105 #define IW_CFG_FPM_QP_COUNT		32768
106 #define IRDMA_MAX_PAGES_PER_FMR		262144
107 #define IRDMA_MIN_PAGES_PER_FMR		1
108 #define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED	2
109 #define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED	3
110 
111 #define IRDMA_Q_TYPE_PE_AEQ	0x80
112 #define IRDMA_Q_INVALID_IDX	0xffff
113 #define IRDMA_REM_ENDPOINT_TRK_QPID	3
114 
115 #define IRDMA_DRV_OPT_ENA_MPA_VER_0		0x00000001
116 #define IRDMA_DRV_OPT_DISABLE_MPA_CRC		0x00000002
117 #define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE	0x00000004
118 #define IRDMA_DRV_OPT_DISABLE_INTF		0x00000008
119 #define IRDMA_DRV_OPT_ENA_MSI			0x00000010
120 #define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT		0x00000020
121 #define IRDMA_DRV_OPT_NO_INLINE_DATA		0x00000080
122 #define IRDMA_DRV_OPT_DISABLE_INT_MOD		0x00000100
123 #define IRDMA_DRV_OPT_DISABLE_VIRT_WQ		0x00000200
124 #define IRDMA_DRV_OPT_ENA_PAU			0x00000400
125 #define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP		0x00000800
126 
127 #define IW_HMC_OBJ_TYPE_NUM	ARRAY_SIZE(iw_hmc_obj_types)
128 #define IRDMA_ROCE_CWND_DEFAULT			0x400
129 #define IRDMA_ROCE_ACKCREDS_DEFAULT		0x1E
130 
131 #define IRDMA_FLUSH_SQ		BIT(0)
132 #define IRDMA_FLUSH_RQ		BIT(1)
133 #define IRDMA_REFLUSH		BIT(2)
134 #define IRDMA_FLUSH_WAIT	BIT(3)
135 
136 #define IRDMA_IRQ_NAME_STR_LEN 64
137 
138 enum init_completion_state {
139 	INVALID_STATE = 0,
140 	INITIAL_STATE,
141 	CQP_CREATED,
142 	HMC_OBJS_CREATED,
143 	HW_RSRC_INITIALIZED,
144 	CCQ_CREATED,
145 	CEQ0_CREATED, /* Last state of probe */
146 	ILQ_CREATED,
147 	IEQ_CREATED,
148 	REM_ENDPOINT_TRK_CREATED,
149 	CEQS_CREATED,
150 	PBLE_CHUNK_MEM,
151 	AEQ_CREATED,
152 	IP_ADDR_REGISTERED,  /* Last state of open */
153 };
154 
155 struct ae_desc {
156 	u16 id;
157 	const char *desc;
158 };
159 
160 struct irdma_rsrc_limits {
161 	u32 qplimit;
162 	u32 mrlimit;
163 	u32 cqlimit;
164 };
165 
166 struct irdma_cqp_err_info {
167 	u16 maj;
168 	u16 min;
169 	const char *desc;
170 };
171 
172 struct irdma_cqp_compl_info {
173 	u32 op_ret_val;
174 	u16 maj_err_code;
175 	u16 min_err_code;
176 	bool error;
177 	u8 op_code;
178 };
179 
180 struct irdma_cqp_request {
181 	struct cqp_cmds_info info;
182 	wait_queue_head_t waitq;
183 	struct list_head list;
184 	atomic_t refcnt;
185 	void (*callback_fcn)(struct irdma_cqp_request *cqp_request);
186 	void *param;
187 	struct irdma_cqp_compl_info compl_info;
188 	bool request_done; /* READ/WRITE_ONCE macros operate on it */
189 	bool waiting:1;
190 	bool dynamic:1;
191 };
192 
193 struct irdma_cqp {
194 	struct irdma_sc_cqp sc_cqp;
195 	spinlock_t req_lock; /* protect CQP request list */
196 	spinlock_t compl_lock; /* protect CQP completion processing */
197 	wait_queue_head_t waitq;
198 	wait_queue_head_t remove_wq;
199 	struct irdma_dma_mem sq;
200 	struct irdma_dma_mem host_ctx;
201 	u64 *scratch_array;
202 	struct irdma_cqp_request *cqp_requests;
203 	struct list_head cqp_avail_reqs;
204 	struct list_head cqp_pending_reqs;
205 };
206 
207 struct irdma_ccq {
208 	struct irdma_sc_cq sc_cq;
209 	struct irdma_dma_mem mem_cq;
210 	struct irdma_dma_mem shadow_area;
211 };
212 
213 struct irdma_ceq {
214 	struct irdma_sc_ceq sc_ceq;
215 	struct irdma_dma_mem mem;
216 	u32 irq;
217 	u32 msix_idx;
218 	struct irdma_pci_f *rf;
219 	struct tasklet_struct dpc_tasklet;
220 	spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */
221 };
222 
223 struct irdma_aeq {
224 	struct irdma_sc_aeq sc_aeq;
225 	struct irdma_dma_mem mem;
226 	struct irdma_pble_alloc palloc;
227 	bool virtual_map;
228 };
229 
230 struct irdma_arp_entry {
231 	u32 ip_addr[4];
232 	u8 mac_addr[ETHER_ADDR_LEN];
233 };
234 
235 struct irdma_msix_vector {
236 	u32 idx;
237 	u32 irq;
238 	u32 cpu_affinity;
239 	u32 ceq_id;
240 	char name[IRDMA_IRQ_NAME_STR_LEN];
241 	struct resource *res;
242 	void  *tag;
243 };
244 
245 struct irdma_mc_table_info {
246 	u32 mgn;
247 	u32 dest_ip[4];
248 	bool lan_fwd:1;
249 	bool ipv4_valid:1;
250 };
251 
252 struct mc_table_list {
253 	struct list_head list;
254 	struct irdma_mc_table_info mc_info;
255 	struct irdma_mcast_grp_info mc_grp_ctx;
256 };
257 
258 struct irdma_qv_info {
259 	u32 v_idx; /* msix_vector */
260 	u16 ceq_idx;
261 	u16 aeq_idx;
262 	u8 itr_idx;
263 };
264 
265 struct irdma_qvlist_info {
266 	u32 num_vectors;
267 	struct irdma_qv_info qv_info[1];
268 };
269 
270 struct irdma_gen_ops {
271 	void (*request_reset)(struct irdma_pci_f *rf);
272 	int (*register_qset)(struct irdma_sc_vsi *vsi,
273 			     struct irdma_ws_node *tc_node);
274 	void (*unregister_qset)(struct irdma_sc_vsi *vsi,
275 				struct irdma_ws_node *tc_node);
276 };
277 
278 struct irdma_pci_f {
279 	bool reset:1;
280 	bool rsrc_created:1;
281 	bool msix_shared:1;
282 	bool ftype:1;
283 	u8 rsrc_profile;
284 	u8 *hmc_info_mem;
285 	u8 *mem_rsrc;
286 	u8 rdma_ver;
287 	u8 rst_to;
288 	/* Not used in SRIOV VF mode */
289 	u8 pf_id;
290 	enum irdma_protocol_used protocol_used;
291 	bool en_rem_endpoint_trk:1;
292 	bool dcqcn_ena:1;
293 	u32 sd_type;
294 	u32 msix_count;
295 	u32 max_mr;
296 	u32 max_qp;
297 	u32 max_cq;
298 	u32 max_ah;
299 	u32 next_ah;
300 	u32 max_mcg;
301 	u32 next_mcg;
302 	u32 max_pd;
303 	u32 next_qp;
304 	u32 next_cq;
305 	u32 next_pd;
306 	u32 max_mr_size;
307 	u32 max_cqe;
308 	u32 mr_stagmask;
309 	u32 used_pds;
310 	u32 used_cqs;
311 	u32 used_mrs;
312 	u32 used_qps;
313 	u32 arp_table_size;
314 	u32 next_arp_index;
315 	u32 ceqs_count;
316 	u32 next_ws_node_id;
317 	u32 max_ws_node_id;
318 	u32 limits_sel;
319 	unsigned long *allocated_ws_nodes;
320 	unsigned long *allocated_qps;
321 	unsigned long *allocated_cqs;
322 	unsigned long *allocated_mrs;
323 	unsigned long *allocated_pds;
324 	unsigned long *allocated_mcgs;
325 	unsigned long *allocated_ahs;
326 	unsigned long *allocated_arps;
327 	enum init_completion_state init_state;
328 	struct irdma_sc_dev sc_dev;
329 	struct irdma_dev_ctx dev_ctx;
330 	struct irdma_tunable_info tun_info;
331 	eventhandler_tag irdma_ifaddr_event;
332 	struct irdma_handler *hdl;
333 	struct pci_dev *pcidev;
334 	struct ice_rdma_peer *peer_info;
335 	struct irdma_hw hw;
336 	struct irdma_cqp cqp;
337 	struct irdma_ccq ccq;
338 	struct irdma_aeq aeq;
339 	struct irdma_ceq *ceqlist;
340 	struct irdma_hmc_pble_rsrc *pble_rsrc;
341 	struct irdma_arp_entry *arp_table;
342 	spinlock_t arp_lock; /*protect ARP table access*/
343 	spinlock_t rsrc_lock; /* protect HW resource array access */
344 	spinlock_t qptable_lock; /*protect QP table access*/
345 	spinlock_t cqtable_lock; /*protect CQ table access*/
346 	struct irdma_qp **qp_table;
347 	struct irdma_cq **cq_table;
348 	spinlock_t qh_list_lock; /* protect mc_qht_list */
349 	struct mc_table_list mc_qht_list;
350 	struct irdma_msix_vector *iw_msixtbl;
351 	struct irdma_qvlist_info *iw_qvlist;
352 	struct tasklet_struct dpc_tasklet;
353 	struct msix_entry msix_info;
354 	struct irdma_dma_mem obj_mem;
355 	struct irdma_dma_mem obj_next;
356 	atomic_t vchnl_msgs;
357 	wait_queue_head_t vchnl_waitq;
358 	struct workqueue_struct *cqp_cmpl_wq;
359 	struct work_struct cqp_cmpl_work;
360 	struct irdma_sc_vsi default_vsi;
361 	void *back_fcn;
362 	struct irdma_gen_ops gen_ops;
363 	void (*check_fc)(struct irdma_sc_vsi *vsi, struct irdma_sc_qp *sc_qp);
364 	struct irdma_dcqcn_cc_params dcqcn_params;
365 	struct irdma_device *iwdev;
366 };
367 
368 struct irdma_device {
369 	struct ib_device ibdev;
370 	struct irdma_pci_f *rf;
371 	if_t netdev;
372 	struct notifier_block nb_netdevice_event;
373 	struct irdma_handler *hdl;
374 	struct workqueue_struct *cleanup_wq;
375 	struct irdma_sc_vsi vsi;
376 	struct irdma_cm_core cm_core;
377 	u32 roce_cwnd;
378 	u32 roce_ackcreds;
379 	u32 vendor_id;
380 	u32 vendor_part_id;
381 	u32 push_mode;
382 	u32 rcv_wnd;
383 	u16 mac_ip_table_idx;
384 	u16 vsi_num;
385 	u8 rcv_wscale;
386 	u8 iw_status;
387 	u8 roce_rtomin;
388 	u8 rd_fence_rate;
389 	bool override_rcv_wnd:1;
390 	bool override_cwnd:1;
391 	bool override_ackcreds:1;
392 	bool override_ooo:1;
393 	bool override_rd_fence_rate:1;
394 	bool override_rtomin:1;
395 	bool roce_mode:1;
396 	bool roce_dcqcn_en:1;
397 	bool dcb_vlan_mode:1;
398 	bool iw_ooo:1;
399 	enum init_completion_state init_state;
400 
401 	wait_queue_head_t suspend_wq;
402 };
403 
404 struct irdma_handler {
405 	struct list_head list;
406 	struct irdma_device *iwdev;
407 	struct task deferred_task;
408 	struct taskqueue *deferred_tq;
409 	bool shared_res_created;
410 };
411 
412 static inline struct irdma_device *to_iwdev(struct ib_device *ibdev)
413 {
414 	return container_of(ibdev, struct irdma_device, ibdev);
415 }
416 
417 static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
418 {
419 	return container_of(ibucontext, struct irdma_ucontext, ibucontext);
420 }
421 
422 #if __FreeBSD_version >= 1400026
423 static inline struct irdma_user_mmap_entry *
424 to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry)
425 {
426 	return container_of(rdma_entry, struct irdma_user_mmap_entry,
427 			    rdma_entry);
428 }
429 
430 #endif
431 static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd)
432 {
433 	return container_of(ibpd, struct irdma_pd, ibpd);
434 }
435 
436 static inline struct irdma_ah *to_iwah(struct ib_ah *ibah)
437 {
438 	return container_of(ibah, struct irdma_ah, ibah);
439 }
440 
441 static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr)
442 {
443 	return container_of(ibmr, struct irdma_mr, ibmr);
444 }
445 
446 static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw)
447 {
448 	return container_of(ibmw, struct irdma_mr, ibmw);
449 }
450 
451 static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq)
452 {
453 	return container_of(ibcq, struct irdma_cq, ibcq);
454 }
455 
456 static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp)
457 {
458 	return container_of(ibqp, struct irdma_qp, ibqp);
459 }
460 
461 static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev)
462 {
463 	return container_of(dev, struct irdma_pci_f, sc_dev);
464 }
465 
466 /**
467  * irdma_alloc_resource - allocate a resource
468  * @iwdev: device pointer
469  * @resource_array: resource bit array:
470  * @max_resources: maximum resource number
471  * @req_resources_num: Allocated resource number
472  * @next: next free id
473  **/
474 static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf,
475 				   unsigned long *rsrc_array, u32 max_rsrc,
476 				   u32 *req_rsrc_num, u32 *next)
477 {
478 	u32 rsrc_num;
479 	unsigned long flags;
480 
481 	spin_lock_irqsave(&rf->rsrc_lock, flags);
482 	rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next);
483 	if (rsrc_num >= max_rsrc) {
484 		rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc);
485 		if (rsrc_num >= max_rsrc) {
486 			spin_unlock_irqrestore(&rf->rsrc_lock, flags);
487 			irdma_debug(&rf->sc_dev, IRDMA_DEBUG_ERR,
488 				    "resource [%d] allocation failed\n",
489 				    rsrc_num);
490 			return -EOVERFLOW;
491 		}
492 	}
493 	__set_bit(rsrc_num, rsrc_array);
494 	*next = rsrc_num + 1;
495 	if (*next == max_rsrc)
496 		*next = 0;
497 	*req_rsrc_num = rsrc_num;
498 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
499 
500 	return 0;
501 }
502 
503 /**
504  * irdma_free_resource - free a resource
505  * @iwdev: device pointer
506  * @resource_array: resource array for the resource_num
507  * @resource_num: resource number to free
508  **/
509 static inline void irdma_free_rsrc(struct irdma_pci_f *rf,
510 				   unsigned long *rsrc_array, u32 rsrc_num)
511 {
512 	unsigned long flags;
513 
514 	spin_lock_irqsave(&rf->rsrc_lock, flags);
515 	__clear_bit(rsrc_num, rsrc_array);
516 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
517 }
518 
519 int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
520 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
521 int irdma_rt_init_hw(struct irdma_device *iwdev,
522 		     struct irdma_l2params *l2params);
523 void irdma_rt_deinit_hw(struct irdma_device *iwdev);
524 void irdma_qp_add_ref(struct ib_qp *ibqp);
525 void irdma_qp_rem_ref(struct ib_qp *ibqp);
526 void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp);
527 struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn);
528 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
529 void irdma_manage_arp_cache(struct irdma_pci_f *rf, const unsigned char *mac_addr,
530 			    u32 *ip_addr, u32 action);
531 struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port);
532 void irdma_del_apbvt(struct irdma_device *iwdev,
533 		     struct irdma_apbvt_entry *entry);
534 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
535 							  bool wait);
536 void irdma_free_cqp_request(struct irdma_cqp *cqp,
537 			    struct irdma_cqp_request *cqp_request);
538 void irdma_put_cqp_request(struct irdma_cqp *cqp,
539 			   struct irdma_cqp_request *cqp_request);
540 int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx);
541 int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx);
542 void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx);
543 const char *irdma_get_ae_desc(u16 ae_id);
544 
545 u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
546 void irdma_port_ibevent(struct irdma_device *iwdev);
547 void irdma_cm_disconn(struct irdma_qp *qp);
548 
549 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
550 			u16 maj_err_code, u16 min_err_code);
551 int irdma_handle_cqp_op(struct irdma_pci_f *rf,
552 			struct irdma_cqp_request *cqp_request);
553 
554 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
555 		    struct ib_udata *udata);
556 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
557 			 int attr_mask, struct ib_udata *udata);
558 void irdma_cq_add_ref(struct ib_cq *ibcq);
559 void irdma_cq_rem_ref(struct ib_cq *ibcq);
560 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
561 
562 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
563 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
564 		       struct irdma_modify_qp_info *info, bool wait);
565 int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
566 int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
567 		       enum irdma_quad_entry_type etype,
568 		       enum irdma_quad_hash_manage_type mtype, void *cmnode,
569 		       bool wait);
570 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
571 void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp);
572 void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
573 int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
574 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
575 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
576 			 u8 term_len);
577 int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
578 int irdma_send_reset(struct irdma_cm_node *cm_node);
579 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
580 				      u16 rem_port, u32 *rem_addr, u16 loc_port,
581 				      u32 *loc_addr, u16 vlan_id);
582 int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
583 			struct irdma_qp_flush_info *info, bool wait);
584 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
585 		  struct irdma_gen_ae_info *info, bool wait);
586 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
587 void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
588 u16 irdma_get_vlan_ipv4(struct iw_cm_id *cm_id, u32 *addr);
589 if_t irdma_netdev_vlan_ipv6(struct iw_cm_id *cm_id, u32 *addr, u16 *vlan_id,
590 			    u8 *mac);
591 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
592 				int acc, u64 *iova_start);
593 int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw);
594 void irdma_del_hmc_objects(struct irdma_sc_dev *dev,
595 			   struct irdma_hmc_info *hmc_info, bool privileged,
596 			   bool reset, enum irdma_vers vers);
597 void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
598 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
599 		    bool wait,
600 		    void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
601 		    void *cb_param);
602 void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request);
603 void irdma_udqp_qs_worker(struct work_struct *work);
604 bool irdma_cq_empty(struct irdma_cq *iwcq);
605 int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event,
606 			  void *ptr);
607 void irdma_unregister_notifiers(struct irdma_device *iwdev);
608 int irdma_register_notifiers(struct irdma_device *iwdev);
609 void irdma_set_rf_user_cfg_params(struct irdma_pci_f *rf);
610 void irdma_add_ip(struct irdma_device *iwdev);
611 void irdma_add_handler(struct irdma_handler *hdl);
612 void irdma_del_handler(struct irdma_handler *hdl);
613 void cqp_compl_worker(struct work_struct *work);
614 void irdma_cleanup_dead_qps(struct irdma_sc_vsi *vsi);
615 #endif /* IRDMA_MAIN_H */
616