1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2023 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef IRDMA_HMC_H 36 #define IRDMA_HMC_H 37 38 #include "irdma_defs.h" 39 40 #define IRDMA_HMC_MAX_BP_COUNT 512 41 #define IRDMA_MAX_SD_ENTRIES 11 42 #define IRDMA_HW_DBG_HMC_INVALID_BP_MARK 0xca 43 #define IRDMA_HMC_INFO_SIGNATURE 0x484d5347 44 #define IRDMA_HMC_PD_CNT_IN_SD 512 45 #define IRDMA_HMC_DIRECT_BP_SIZE 0x200000 46 #define IRDMA_HMC_MAX_SD_COUNT 8192 47 #define IRDMA_HMC_PAGED_BP_SIZE 4096 48 #define IRDMA_HMC_PD_BP_BUF_ALIGNMENT 4096 49 #define IRDMA_FIRST_VF_FPM_ID 8 50 #define FPM_MULTIPLIER 1024 51 52 enum irdma_hmc_rsrc_type { 53 IRDMA_HMC_IW_QP = 0, 54 IRDMA_HMC_IW_CQ = 1, 55 IRDMA_HMC_IW_RESERVED = 2, 56 IRDMA_HMC_IW_HTE = 3, 57 IRDMA_HMC_IW_ARP = 4, 58 IRDMA_HMC_IW_APBVT_ENTRY = 5, 59 IRDMA_HMC_IW_MR = 6, 60 IRDMA_HMC_IW_XF = 7, 61 IRDMA_HMC_IW_XFFL = 8, 62 IRDMA_HMC_IW_Q1 = 9, 63 IRDMA_HMC_IW_Q1FL = 10, 64 IRDMA_HMC_IW_TIMER = 11, 65 IRDMA_HMC_IW_FSIMC = 12, 66 IRDMA_HMC_IW_FSIAV = 13, 67 IRDMA_HMC_IW_PBLE = 14, 68 IRDMA_HMC_IW_RRF = 15, 69 IRDMA_HMC_IW_RRFFL = 16, 70 IRDMA_HMC_IW_HDR = 17, 71 IRDMA_HMC_IW_MD = 18, 72 IRDMA_HMC_IW_OOISC = 19, 73 IRDMA_HMC_IW_OOISCFFL = 20, 74 IRDMA_HMC_IW_MAX, /* Must be last entry */ 75 }; 76 77 enum irdma_sd_entry_type { 78 IRDMA_SD_TYPE_INVALID = 0, 79 IRDMA_SD_TYPE_PAGED = 1, 80 IRDMA_SD_TYPE_DIRECT = 2, 81 }; 82 83 struct irdma_hmc_obj_info { 84 u64 base; 85 u32 max_cnt; 86 u32 cnt; 87 u64 size; 88 }; 89 90 struct irdma_hmc_bp { 91 enum irdma_sd_entry_type entry_type; 92 struct irdma_dma_mem addr; 93 u32 sd_pd_index; 94 u32 use_cnt; 95 }; 96 97 struct irdma_hmc_pd_entry { 98 struct irdma_hmc_bp bp; 99 u32 sd_index; 100 bool rsrc_pg:1; 101 bool valid:1; 102 }; 103 104 struct irdma_hmc_pd_table { 105 struct irdma_dma_mem pd_page_addr; 106 struct irdma_hmc_pd_entry *pd_entry; 107 struct irdma_virt_mem pd_entry_virt_mem; 108 u32 use_cnt; 109 u32 sd_index; 110 }; 111 112 struct irdma_hmc_sd_entry { 113 enum irdma_sd_entry_type entry_type; 114 bool valid; 115 union { 116 struct irdma_hmc_pd_table pd_table; 117 struct irdma_hmc_bp bp; 118 } u; 119 }; 120 121 struct irdma_hmc_sd_table { 122 struct irdma_virt_mem addr; 123 u32 sd_cnt; 124 u32 use_cnt; 125 struct irdma_hmc_sd_entry *sd_entry; 126 }; 127 128 struct irdma_hmc_info { 129 u32 signature; 130 u16 hmc_fn_id; 131 u16 first_sd_index; 132 struct irdma_hmc_obj_info *hmc_obj; 133 struct irdma_virt_mem hmc_obj_virt_mem; 134 struct irdma_hmc_sd_table sd_table; 135 u16 sd_indexes[IRDMA_HMC_MAX_SD_COUNT]; 136 }; 137 138 struct irdma_update_sd_entry { 139 u64 cmd; 140 u64 data; 141 }; 142 143 struct irdma_update_sds_info { 144 u32 cnt; 145 u16 hmc_fn_id; 146 struct irdma_update_sd_entry entry[IRDMA_MAX_SD_ENTRIES]; 147 }; 148 149 struct irdma_ccq_cqe_info; 150 struct irdma_hmc_fcn_info { 151 u32 vf_id; 152 u8 free_fcn; 153 }; 154 155 struct irdma_hmc_create_obj_info { 156 struct irdma_hmc_info *hmc_info; 157 struct irdma_virt_mem add_sd_virt_mem; 158 u32 rsrc_type; 159 u32 start_idx; 160 u32 count; 161 u32 add_sd_cnt; 162 enum irdma_sd_entry_type entry_type; 163 bool privileged; 164 }; 165 166 struct irdma_hmc_del_obj_info { 167 struct irdma_hmc_info *hmc_info; 168 struct irdma_virt_mem del_sd_virt_mem; 169 u32 rsrc_type; 170 u32 start_idx; 171 u32 count; 172 u32 del_sd_cnt; 173 bool privileged; 174 }; 175 176 int irdma_copy_dma_mem(struct irdma_hw *hw, void *dest_buf, 177 struct irdma_dma_mem *src_mem, u64 src_offset, u64 size); 178 int irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev, 179 struct irdma_hmc_create_obj_info *info); 180 int irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev, 181 struct irdma_hmc_del_obj_info *info, bool reset); 182 int irdma_hmc_sd_one(struct irdma_sc_dev *dev, u16 hmc_fn_id, u64 pa, u32 sd_idx, 183 enum irdma_sd_entry_type type, 184 bool setsd); 185 int irdma_update_sds_noccq(struct irdma_sc_dev *dev, 186 struct irdma_update_sds_info *info); 187 int irdma_add_sd_table_entry(struct irdma_hw *hw, 188 struct irdma_hmc_info *hmc_info, u32 sd_index, 189 enum irdma_sd_entry_type type, u64 direct_mode_sz); 190 int irdma_add_pd_table_entry(struct irdma_sc_dev *dev, 191 struct irdma_hmc_info *hmc_info, u32 pd_index, 192 struct irdma_dma_mem *rsrc_pg); 193 int irdma_remove_pd_bp(struct irdma_sc_dev *dev, 194 struct irdma_hmc_info *hmc_info, u32 idx); 195 int irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, u32 idx); 196 int irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx); 197 #endif /* IRDMA_HMC_H */ 198