1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013 The FreeBSD Foundation 5 * All rights reserved. 6 * 7 * This software was developed by Konstantin Belousov <kib@FreeBSD.org> 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $FreeBSD$ 32 */ 33 34 #ifndef _DEV_IOMMU_IOMMU_H_ 35 #define _DEV_IOMMU_IOMMU_H_ 36 37 #include <dev/iommu/iommu_types.h> 38 39 struct bus_dma_tag_common; 40 struct iommu_map_entry; 41 TAILQ_HEAD(iommu_map_entries_tailq, iommu_map_entry); 42 43 RB_HEAD(iommu_gas_entries_tree, iommu_map_entry); 44 RB_PROTOTYPE(iommu_gas_entries_tree, iommu_map_entry, rb_entry, 45 iommu_gas_cmp_entries); 46 47 struct iommu_qi_genseq { 48 u_int gen; 49 uint32_t seq; 50 }; 51 52 struct iommu_map_entry { 53 iommu_gaddr_t start; 54 iommu_gaddr_t end; 55 iommu_gaddr_t first; /* Least start in subtree */ 56 iommu_gaddr_t last; /* Greatest end in subtree */ 57 iommu_gaddr_t free_down; /* Max free space below the 58 current R/B tree node */ 59 u_int flags; 60 TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* Link for dmamap entries */ 61 RB_ENTRY(iommu_map_entry) rb_entry; /* Links for domain entries */ 62 TAILQ_ENTRY(iommu_map_entry) unroll_link; /* Link for unroll after 63 dmamap_load failure */ 64 struct iommu_domain *domain; 65 struct iommu_qi_genseq gseq; 66 }; 67 68 struct iommu_unit { 69 struct mtx lock; 70 device_t dev; 71 int unit; 72 73 int dma_enabled; 74 75 /* Busdma delayed map load */ 76 struct task dmamap_load_task; 77 TAILQ_HEAD(, bus_dmamap_iommu) delayed_maps; 78 struct taskqueue *delayed_taskqueue; 79 80 /* 81 * Bitmap of buses for which context must ignore slot:func, 82 * duplicating the page table pointer into all context table 83 * entries. This is a client-controlled quirk to support some 84 * NTBs. 85 */ 86 uint32_t buswide_ctxs[(PCI_BUSMAX + 1) / NBBY / sizeof(uint32_t)]; 87 }; 88 89 struct iommu_domain_map_ops { 90 int (*map)(struct iommu_domain *domain, iommu_gaddr_t base, 91 iommu_gaddr_t size, vm_page_t *ma, uint64_t pflags, int flags); 92 int (*unmap)(struct iommu_domain *domain, iommu_gaddr_t base, 93 iommu_gaddr_t size, int flags); 94 }; 95 96 /* 97 * Locking annotations: 98 * (u) - Protected by iommu unit lock 99 * (d) - Protected by domain lock 100 * (c) - Immutable after initialization 101 */ 102 103 struct iommu_domain { 104 struct iommu_unit *iommu; /* (c) */ 105 const struct iommu_domain_map_ops *ops; 106 struct mtx lock; /* (c) */ 107 struct task unload_task; /* (c) */ 108 u_int entries_cnt; /* (d) */ 109 struct iommu_map_entries_tailq unload_entries; /* (d) Entries to 110 unload */ 111 struct iommu_gas_entries_tree rb_root; /* (d) */ 112 iommu_gaddr_t end; /* (c) Highest address + 1 in 113 the guest AS */ 114 struct iommu_map_entry *first_place, *last_place; /* (d) */ 115 struct iommu_map_entry *msi_entry; /* (d) Arch-specific */ 116 iommu_gaddr_t msi_base; /* (d) Arch-specific */ 117 vm_paddr_t msi_phys; /* (d) Arch-specific */ 118 u_int flags; /* (u) */ 119 }; 120 121 struct iommu_ctx { 122 struct iommu_domain *domain; /* (c) */ 123 struct bus_dma_tag_iommu *tag; /* (c) Root tag */ 124 u_long loads; /* atomic updates, for stat only */ 125 u_long unloads; /* same */ 126 u_int flags; /* (u) */ 127 uint16_t rid; /* (c) pci RID */ 128 }; 129 130 /* struct iommu_ctx flags */ 131 #define IOMMU_CTX_FAULTED 0x0001 /* Fault was reported, 132 last_fault_rec is valid */ 133 #define IOMMU_CTX_DISABLED 0x0002 /* Device is disabled, the 134 ephemeral reference is kept 135 to prevent context destruction */ 136 137 #define IOMMU_DOMAIN_GAS_INITED 0x0001 138 #define IOMMU_DOMAIN_PGTBL_INITED 0x0002 139 #define IOMMU_DOMAIN_IDMAP 0x0010 /* Domain uses identity 140 page table */ 141 #define IOMMU_DOMAIN_RMRR 0x0020 /* Domain contains RMRR entry, 142 cannot be turned off */ 143 144 #define IOMMU_LOCK(unit) mtx_lock(&(unit)->lock) 145 #define IOMMU_UNLOCK(unit) mtx_unlock(&(unit)->lock) 146 #define IOMMU_ASSERT_LOCKED(unit) mtx_assert(&(unit)->lock, MA_OWNED) 147 148 #define IOMMU_DOMAIN_LOCK(dom) mtx_lock(&(dom)->lock) 149 #define IOMMU_DOMAIN_UNLOCK(dom) mtx_unlock(&(dom)->lock) 150 #define IOMMU_DOMAIN_ASSERT_LOCKED(dom) mtx_assert(&(dom)->lock, MA_OWNED) 151 152 static inline bool 153 iommu_test_boundary(iommu_gaddr_t start, iommu_gaddr_t size, 154 iommu_gaddr_t boundary) 155 { 156 157 if (boundary == 0) 158 return (true); 159 return (start + size <= ((start + boundary) & ~(boundary - 1))); 160 } 161 162 void iommu_free_ctx(struct iommu_ctx *ctx); 163 void iommu_free_ctx_locked(struct iommu_unit *iommu, struct iommu_ctx *ctx); 164 struct iommu_ctx *iommu_get_ctx(struct iommu_unit *, device_t dev, 165 uint16_t rid, bool id_mapped, bool rmrr_init); 166 struct iommu_unit *iommu_find(device_t dev, bool verbose); 167 void iommu_domain_unload_entry(struct iommu_map_entry *entry, bool free); 168 void iommu_domain_unload(struct iommu_domain *domain, 169 struct iommu_map_entries_tailq *entries, bool cansleep); 170 171 struct iommu_ctx *iommu_instantiate_ctx(struct iommu_unit *iommu, 172 device_t dev, bool rmrr); 173 device_t iommu_get_requester(device_t dev, uint16_t *rid); 174 int iommu_init_busdma(struct iommu_unit *unit); 175 void iommu_fini_busdma(struct iommu_unit *unit); 176 struct iommu_map_entry *iommu_map_alloc_entry(struct iommu_domain *iodom, 177 u_int flags); 178 void iommu_map_free_entry(struct iommu_domain *, struct iommu_map_entry *); 179 int iommu_map(struct iommu_domain *iodom, 180 const struct bus_dma_tag_common *common, iommu_gaddr_t size, int offset, 181 u_int eflags, u_int flags, vm_page_t *ma, struct iommu_map_entry **res); 182 int iommu_map_region(struct iommu_domain *domain, 183 struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma); 184 185 void iommu_gas_init_domain(struct iommu_domain *domain); 186 void iommu_gas_fini_domain(struct iommu_domain *domain); 187 struct iommu_map_entry *iommu_gas_alloc_entry(struct iommu_domain *domain, 188 u_int flags); 189 void iommu_gas_free_entry(struct iommu_domain *domain, 190 struct iommu_map_entry *entry); 191 void iommu_gas_free_space(struct iommu_domain *domain, 192 struct iommu_map_entry *entry); 193 int iommu_gas_map(struct iommu_domain *domain, 194 const struct bus_dma_tag_common *common, iommu_gaddr_t size, int offset, 195 u_int eflags, u_int flags, vm_page_t *ma, struct iommu_map_entry **res); 196 void iommu_gas_free_region(struct iommu_domain *domain, 197 struct iommu_map_entry *entry); 198 int iommu_gas_map_region(struct iommu_domain *domain, 199 struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma); 200 int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start, 201 iommu_gaddr_t end, struct iommu_map_entry **entry0); 202 int iommu_gas_reserve_region_extend(struct iommu_domain *domain, 203 iommu_gaddr_t start, iommu_gaddr_t end); 204 205 void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno); 206 bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno); 207 void iommu_domain_init(struct iommu_unit *unit, struct iommu_domain *domain, 208 const struct iommu_domain_map_ops *ops); 209 void iommu_domain_fini(struct iommu_domain *domain); 210 211 bool bus_dma_iommu_set_buswide(device_t dev); 212 int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map, 213 vm_paddr_t start, vm_size_t length, int flags); 214 215 bus_dma_tag_t iommu_get_dma_tag(device_t dev, device_t child); 216 struct iommu_ctx *iommu_get_dev_ctx(device_t dev); 217 struct iommu_domain *iommu_get_ctx_domain(struct iommu_ctx *ctx); 218 219 SYSCTL_DECL(_hw_iommu); 220 221 #endif /* !_DEV_IOMMU_IOMMU_H_ */ 222