xref: /freebsd/sys/dev/iicbus/icee.c (revision 2b8331622f0b212cf3bb4fc4914a501e5321d506)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 /*
30  * Generic IIC eeprom support, modeled after the AT24C family of products.
31  */
32 
33 #include "opt_platform.h"
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/conf.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/resource.h>
42 #include <sys/sx.h>
43 #include <sys/sysctl.h>
44 #include <sys/uio.h>
45 #include <machine/bus.h>
46 
47 #ifdef FDT
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 #endif
51 
52 #include <dev/iicbus/iiconf.h>
53 #include <dev/iicbus/iicbus.h>
54 
55 #include "iicbus_if.h"
56 
57 /*
58  * AT24 parts have a "write page size" that differs per-device, and a "read page
59  * size" that is always equal to the full device size.  We define maximum values
60  * here to limit how long we occupy the bus with a single transfer, and because
61  * there are temporary buffers of these sizes allocated on the stack.
62  */
63 #define	MAX_RD_SZ	256	/* Largest read size we support */
64 #define	MAX_WR_SZ	256	/* Largest write size we support */
65 
66 struct icee_softc {
67 	device_t	dev;		/* Myself */
68 	struct cdev	*cdev;		/* user interface */
69 	int		addr;		/* Slave address on the bus */
70 	int		size;		/* How big am I? */
71 	int		type;		/* What address type 8 or 16 bit? */
72 	int		wr_sz;		/* What's the write page size */
73 };
74 
75 #ifdef FDT
76 struct eeprom_desc {
77 	int	    type;
78 	int	    size;
79 	int	    wr_sz;
80 	const char *name;
81 };
82 
83 static struct eeprom_desc type_desc[] = {
84 	{ 8,        128,   8, "AT24C01"},
85 	{ 8,        256,   8, "AT24C02"},
86 	{ 8,        512,  16, "AT24C04"},
87 	{ 8,       1024,  16, "AT24C08"},
88 	{ 8,   2 * 1024,  16, "AT24C16"},
89 	{16,   4 * 1024,  32, "AT24C32"},
90 	{16,   8 * 1024,  32, "AT24C64"},
91 	{16,  16 * 1024,  64, "AT24C128"},
92 	{16,  32 * 1024,  64, "AT24C256"},
93 	{16,  64 * 1024, 128, "AT24C512"},
94 	{16, 128 * 1024, 256, "AT24CM01"},
95 };
96 
97 static struct ofw_compat_data compat_data[] = {
98 	{"atmel,24c01",	  (uintptr_t)(&type_desc[0])},
99 	{"atmel,24c02",	  (uintptr_t)(&type_desc[1])},
100 	{"atmel,24c04",	  (uintptr_t)(&type_desc[2])},
101 	{"atmel,24c08",	  (uintptr_t)(&type_desc[3])},
102 	{"atmel,24c16",	  (uintptr_t)(&type_desc[4])},
103 	{"atmel,24c32",	  (uintptr_t)(&type_desc[5])},
104 	{"atmel,24c64",	  (uintptr_t)(&type_desc[6])},
105 	{"atmel,24c128",  (uintptr_t)(&type_desc[7])},
106 	{"atmel,24c256",  (uintptr_t)(&type_desc[8])},
107 	{"atmel,24c512",  (uintptr_t)(&type_desc[9])},
108 	{"atmel,24c1024", (uintptr_t)(&type_desc[10])},
109 	{NULL,		  (uintptr_t)NULL},
110 };
111 #endif
112 
113 #define CDEV2SOFTC(dev)		((dev)->si_drv1)
114 
115 /* cdev routines */
116 static d_read_t icee_read;
117 static d_write_t icee_write;
118 
119 static struct cdevsw icee_cdevsw =
120 {
121 	.d_version = D_VERSION,
122 	.d_read = icee_read,
123 	.d_write = icee_write
124 };
125 
126 static int
127 icee_probe(device_t dev)
128 {
129 #ifdef FDT
130 	struct eeprom_desc *d;
131 
132 	if (!ofw_bus_status_okay(dev))
133 		return (ENXIO);
134 
135 	d = (struct eeprom_desc *)
136 	    ofw_bus_search_compatible(dev, compat_data)->ocd_data;
137 	if (d != NULL) {
138 		device_set_desc(dev, d->name);
139 		return (BUS_PROBE_DEFAULT);
140 	}
141 #endif
142 	device_set_desc(dev, "I2C EEPROM");
143 	return (BUS_PROBE_NOWILDCARD);
144 }
145 
146 static int
147 icee_init(struct icee_softc *sc)
148 {
149 	const char *dname;
150 	int dunit;
151 #ifdef FDT
152 	struct eeprom_desc *d;
153 
154 	d = (struct eeprom_desc *)
155 	    ofw_bus_search_compatible(sc->dev, compat_data)->ocd_data;
156 	if (d != NULL) {
157 		sc->size  = d->size;
158 		sc->type  = d->type;
159 		sc->wr_sz = d->wr_sz;
160 		return (0);
161 	}
162 #endif
163 	dname = device_get_name(sc->dev);
164 	dunit = device_get_unit(sc->dev);
165 	if (resource_int_value(dname, dunit, "type", &sc->type) != 0)
166 		return (ENOENT);
167 	if (resource_int_value(dname, dunit, "size", &sc->size) != 0)
168 		return (ENOENT);
169 	if (resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz) != 0)
170 		return (ENOENT);
171 	return (0);
172 }
173 
174 static int
175 icee_attach(device_t dev)
176 {
177 	struct icee_softc *sc = device_get_softc(dev);
178 	struct sysctl_ctx_list *ctx;
179 	struct sysctl_oid_list *tree;
180 
181 	sc->dev = dev;
182 	sc->addr = iicbus_get_addr(dev);
183 	if (icee_init(sc) != 0)
184 		return (EINVAL);
185 	if (bootverbose)
186 		device_printf(dev, "size: %d bytes, addressing: %d-bits\n",
187 		    sc->size, sc->type);
188 	sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT,
189 	    GID_WHEEL, 0600, "icee%d", device_get_unit(dev));
190 	if (sc->cdev == NULL) {
191 		return (ENOMEM);
192 	}
193 	sc->cdev->si_drv1 = sc;
194 
195 	ctx = device_get_sysctl_ctx(dev);
196 	tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
197 	SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "address_size", CTLFLAG_RD,
198 	    &sc->type, 0, "Memory array address size in bits");
199 	SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "device_size", CTLFLAG_RD,
200 	    &sc->size, 0, "Memory array capacity in bytes");
201 	SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "write_size", CTLFLAG_RD,
202 	    &sc->wr_sz, 0, "Memory array page write size in bytes");
203 
204 	return (0);
205 }
206 
207 static int
208 icee_detach(device_t dev)
209 {
210 	struct icee_softc *sc = device_get_softc(dev);
211 
212 	destroy_dev(sc->cdev);
213 	return (0);
214 }
215 
216 static int
217 icee_read(struct cdev *dev, struct uio *uio, int ioflag)
218 {
219 	struct icee_softc *sc;
220 	uint8_t addr[2];
221 	uint8_t data[MAX_RD_SZ];
222 	int error, i, len, slave;
223 	struct iic_msg msgs[2] = {
224 	     { 0, IIC_M_WR, 1, addr },
225 	     { 0, IIC_M_RD, 0, data },
226 	};
227 
228 	sc = CDEV2SOFTC(dev);
229 	if (uio->uio_offset == sc->size)
230 		return (0);
231 	if (uio->uio_offset > sc->size)
232 		return (EIO);
233 	if (sc->type != 8 && sc->type != 16)
234 		return (EINVAL);
235 	slave = error = 0;
236 	while (uio->uio_resid > 0) {
237 		if (uio->uio_offset >= sc->size)
238 			break;
239 		len = MIN(MAX_RD_SZ - (uio->uio_offset & (MAX_RD_SZ - 1)),
240 		    uio->uio_resid);
241 		switch (sc->type) {
242 		case 8:
243 			slave = (uio->uio_offset >> 7) | sc->addr;
244 			msgs[0].len = 1;
245 			msgs[1].len = len;
246 			addr[0] = uio->uio_offset & 0xff;
247 			break;
248 		case 16:
249 			slave = sc->addr | (uio->uio_offset >> 15);
250 			msgs[0].len = 2;
251 			msgs[1].len = len;
252 			addr[0] = (uio->uio_offset >> 8) & 0xff;
253 			addr[1] = uio->uio_offset & 0xff;
254 			break;
255 		}
256 		for (i = 0; i < 2; i++)
257 			msgs[i].slave = slave;
258 		error = iicbus_transfer_excl(sc->dev, msgs, 2, IIC_INTRWAIT);
259 		if (error) {
260 			error = iic2errno(error);
261 			break;
262 		}
263 		error = uiomove(data, len, uio);
264 		if (error)
265 			break;
266 	}
267 	return (error);
268 }
269 
270 /*
271  * Write to the part.  We use three transfers here since we're actually
272  * doing a write followed by a read to make sure that the write finished.
273  * It is easier to encode the dummy read here than to break things up
274  * into smaller chunks...
275  */
276 static int
277 icee_write(struct cdev *dev, struct uio *uio, int ioflag)
278 {
279 	struct icee_softc *sc;
280 	int error, len, slave, waitlimit;
281 	uint8_t data[MAX_WR_SZ + 2];
282 	struct iic_msg wr[1] = {
283 	     { 0, IIC_M_WR, 0, data },
284 	};
285 	struct iic_msg rd[1] = {
286 	     { 0, IIC_M_RD, 1, data },
287 	};
288 
289 	sc = CDEV2SOFTC(dev);
290 	if (uio->uio_offset >= sc->size)
291 		return (EIO);
292 	if (sc->type != 8 && sc->type != 16)
293 		return (EINVAL);
294 
295 	slave = error = 0;
296 	while (uio->uio_resid > 0) {
297 		if (uio->uio_offset >= sc->size)
298 			break;
299 		len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)),
300 		    uio->uio_resid);
301 		switch (sc->type) {
302 		case 8:
303 			slave = (uio->uio_offset >> 7) | sc->addr;
304 			wr[0].len = 1 + len;
305 			data[0] = uio->uio_offset & 0xff;
306 			break;
307 		case 16:
308 			slave = sc->addr | (uio->uio_offset >> 15);
309 			wr[0].len = 2 + len;
310 			data[0] = (uio->uio_offset >> 8) & 0xff;
311 			data[1] = uio->uio_offset & 0xff;
312 			break;
313 		}
314 		wr[0].slave = slave;
315 		error = uiomove(data + sc->type / 8, len, uio);
316 		if (error)
317 			break;
318 		error = iicbus_transfer_excl(sc->dev, wr, 1, IIC_INTRWAIT);
319 		if (error) {
320 			error = iic2errno(error);
321 			break;
322 		}
323 		/* Read after write to wait for write-done. */
324 		waitlimit = 10000;
325 		rd[0].slave = slave;
326 		do {
327 			error = iicbus_transfer_excl(sc->dev, rd, 1,
328 			    IIC_INTRWAIT);
329 		} while (waitlimit-- > 0 && error != 0);
330 		if (error) {
331 			error = iic2errno(error);
332 			break;
333 		}
334 	}
335 	return error;
336 }
337 
338 static device_method_t icee_methods[] = {
339 	DEVMETHOD(device_probe,		icee_probe),
340 	DEVMETHOD(device_attach,	icee_attach),
341 	DEVMETHOD(device_detach,	icee_detach),
342 
343 	DEVMETHOD_END
344 };
345 
346 static driver_t icee_driver = {
347 	"icee",
348 	icee_methods,
349 	sizeof(struct icee_softc),
350 };
351 
352 DRIVER_MODULE(icee, iicbus, icee_driver, 0, 0);
353 MODULE_VERSION(icee, 1);
354 MODULE_DEPEND(icee, iicbus, 1, 1, 1);
355 IICBUS_FDT_PNP_INFO(compat_data);
356