xref: /freebsd/sys/dev/iicbus/icee.c (revision 1603881667360c015f6685131f2f25474fa67a72)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 /*
30  * Generic IIC eeprom support, modeled after the AT24C family of products.
31  */
32 
33 #include "opt_platform.h"
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/conf.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/resource.h>
42 #include <sys/sx.h>
43 #include <sys/sysctl.h>
44 #include <sys/uio.h>
45 #include <machine/bus.h>
46 
47 #ifdef FDT
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 #endif
51 
52 #include <dev/iicbus/iiconf.h>
53 #include <dev/iicbus/iicbus.h>
54 
55 #include "iicbus_if.h"
56 
57 /*
58  * AT24 parts have a "write page size" that differs per-device, and a "read page
59  * size" that is always equal to the full device size.  We define maximum values
60  * here to limit how long we occupy the bus with a single transfer, and because
61  * there are temporary buffers of these sizes allocated on the stack.
62  */
63 #define	MAX_RD_SZ	256	/* Largest read size we support */
64 #define	MAX_WR_SZ	256	/* Largest write size we support */
65 
66 struct icee_softc {
67 	device_t	dev;		/* Myself */
68 	struct cdev	*cdev;		/* user interface */
69 	int		addr;		/* Slave address on the bus */
70 	int		size;		/* How big am I? */
71 	int		type;		/* What address type 8 or 16 bit? */
72 	int		wr_sz;		/* What's the write page size */
73 };
74 
75 #ifdef FDT
76 struct eeprom_desc {
77 	int	    type;
78 	int	    size;
79 	int	    wr_sz;
80 	const char *name;
81 };
82 
83 static struct eeprom_desc type_desc[] = {
84 	{ 8,        128,   8, "AT24C01"},
85 	{ 8,        256,   8, "AT24C02"},
86 	{ 8,        512,  16, "AT24C04"},
87 	{ 8,       1024,  16, "AT24C08"},
88 	{ 8,   2 * 1024,  16, "AT24C16"},
89 	{16,   4 * 1024,  32, "AT24C32"},
90 	{16,   8 * 1024,  32, "AT24C64"},
91 	{16,  16 * 1024,  64, "AT24C128"},
92 	{16,  32 * 1024,  64, "AT24C256"},
93 	{16,  64 * 1024, 128, "AT24C512"},
94 	{16, 128 * 1024, 256, "AT24CM01"},
95 };
96 
97 static struct ofw_compat_data compat_data[] = {
98 	{"atmel,24c01",	  (uintptr_t)(&type_desc[0])},
99 	{"atmel,24c02",	  (uintptr_t)(&type_desc[1])},
100 	{"atmel,24c04",	  (uintptr_t)(&type_desc[2])},
101 	{"atmel,24c08",	  (uintptr_t)(&type_desc[3])},
102 	{"atmel,24c16",	  (uintptr_t)(&type_desc[4])},
103 	{"atmel,24c32",	  (uintptr_t)(&type_desc[5])},
104 	{"atmel,24c64",	  (uintptr_t)(&type_desc[6])},
105 	{"atmel,24c128",  (uintptr_t)(&type_desc[7])},
106 	{"atmel,24c256",  (uintptr_t)(&type_desc[8])},
107 	{"atmel,24c512",  (uintptr_t)(&type_desc[9])},
108 	{"atmel,24c1024", (uintptr_t)(&type_desc[10])},
109 	{NULL,		  (uintptr_t)NULL},
110 };
111 #endif
112 
113 #define CDEV2SOFTC(dev)		((dev)->si_drv1)
114 
115 /* cdev routines */
116 static d_read_t icee_read;
117 static d_write_t icee_write;
118 
119 static struct cdevsw icee_cdevsw =
120 {
121 	.d_version = D_VERSION,
122 	.d_read = icee_read,
123 	.d_write = icee_write
124 };
125 
126 #ifdef FDT
127 static int
128 icee_probe(device_t dev)
129 {
130 	struct eeprom_desc *d;
131 
132 	if (!ofw_bus_status_okay(dev))
133 		return (ENXIO);
134 
135 	d = (struct eeprom_desc *)
136 	    ofw_bus_search_compatible(dev, compat_data)->ocd_data;
137 	if (d == NULL)
138 		return (ENXIO);
139 
140 	device_set_desc(dev, d->name);
141 	return (BUS_PROBE_DEFAULT);
142 }
143 
144 static void
145 icee_init(struct icee_softc *sc)
146 {
147 	struct eeprom_desc *d;
148 
149 	d = (struct eeprom_desc *)
150 	    ofw_bus_search_compatible(sc->dev, compat_data)->ocd_data;
151 	if (d == NULL)
152 		return; /* attach will see sc->size == 0 and return error */
153 
154 	sc->size  = d->size;
155 	sc->type  = d->type;
156 	sc->wr_sz = d->wr_sz;
157 }
158 #else /* !FDT */
159 static int
160 icee_probe(device_t dev)
161 {
162 
163 	device_set_desc(dev, "I2C EEPROM");
164 	return (BUS_PROBE_NOWILDCARD);
165 }
166 
167 static void
168 icee_init(struct icee_softc *sc)
169 {
170 	const char *dname;
171 	int dunit;
172 
173 	dname = device_get_name(sc->dev);
174 	dunit = device_get_unit(sc->dev);
175 	resource_int_value(dname, dunit, "size", &sc->size);
176 	resource_int_value(dname, dunit, "type", &sc->type);
177 	resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz);
178 }
179 #endif /* FDT */
180 
181 static int
182 icee_attach(device_t dev)
183 {
184 	struct icee_softc *sc = device_get_softc(dev);
185 	struct sysctl_ctx_list *ctx;
186 	struct sysctl_oid_list *tree;
187 
188 	sc->dev = dev;
189 	sc->addr = iicbus_get_addr(dev);
190 	icee_init(sc);
191 	if (sc->size == 0 || sc->type == 0 || sc->wr_sz == 0) {
192 		device_printf(sc->dev, "Missing config data, "
193 		    "these cannot be zero: size %d type %d wr_sz %d\n",
194 		    sc->size, sc->type, sc->wr_sz);
195 		return (EINVAL);
196 	}
197 	if (bootverbose)
198 		device_printf(dev, "size: %d bytes, addressing: %d-bits\n",
199 		    sc->size, sc->type);
200 	sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT,
201 	    GID_WHEEL, 0600, "icee%d", device_get_unit(dev));
202 	if (sc->cdev == NULL) {
203 		return (ENOMEM);
204 	}
205 	sc->cdev->si_drv1 = sc;
206 
207 	ctx = device_get_sysctl_ctx(dev);
208 	tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
209 	SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "address_size", CTLFLAG_RD,
210 	    &sc->type, 0, "Memory array address size in bits");
211 	SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "device_size", CTLFLAG_RD,
212 	    &sc->size, 0, "Memory array capacity in bytes");
213 	SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "write_size", CTLFLAG_RD,
214 	    &sc->wr_sz, 0, "Memory array page write size in bytes");
215 
216 	return (0);
217 }
218 
219 static int
220 icee_detach(device_t dev)
221 {
222 	struct icee_softc *sc = device_get_softc(dev);
223 
224 	destroy_dev(sc->cdev);
225 	return (0);
226 }
227 
228 static int
229 icee_read(struct cdev *dev, struct uio *uio, int ioflag)
230 {
231 	struct icee_softc *sc;
232 	uint8_t addr[2];
233 	uint8_t data[MAX_RD_SZ];
234 	int error, i, len, slave;
235 	struct iic_msg msgs[2] = {
236 	     { 0, IIC_M_WR, 1, addr },
237 	     { 0, IIC_M_RD, 0, data },
238 	};
239 
240 	sc = CDEV2SOFTC(dev);
241 	if (uio->uio_offset == sc->size)
242 		return (0);
243 	if (uio->uio_offset > sc->size)
244 		return (EIO);
245 	if (sc->type != 8 && sc->type != 16)
246 		return (EINVAL);
247 	slave = error = 0;
248 	while (uio->uio_resid > 0) {
249 		if (uio->uio_offset >= sc->size)
250 			break;
251 		len = MIN(MAX_RD_SZ - (uio->uio_offset & (MAX_RD_SZ - 1)),
252 		    uio->uio_resid);
253 		switch (sc->type) {
254 		case 8:
255 			slave = (uio->uio_offset >> 7) | sc->addr;
256 			msgs[0].len = 1;
257 			msgs[1].len = len;
258 			addr[0] = uio->uio_offset & 0xff;
259 			break;
260 		case 16:
261 			slave = sc->addr | (uio->uio_offset >> 15);
262 			msgs[0].len = 2;
263 			msgs[1].len = len;
264 			addr[0] = (uio->uio_offset >> 8) & 0xff;
265 			addr[1] = uio->uio_offset & 0xff;
266 			break;
267 		}
268 		for (i = 0; i < 2; i++)
269 			msgs[i].slave = slave;
270 		error = iicbus_transfer_excl(sc->dev, msgs, 2, IIC_INTRWAIT);
271 		if (error) {
272 			error = iic2errno(error);
273 			break;
274 		}
275 		error = uiomove(data, len, uio);
276 		if (error)
277 			break;
278 	}
279 	return (error);
280 }
281 
282 /*
283  * Write to the part.  We use three transfers here since we're actually
284  * doing a write followed by a read to make sure that the write finished.
285  * It is easier to encode the dummy read here than to break things up
286  * into smaller chunks...
287  */
288 static int
289 icee_write(struct cdev *dev, struct uio *uio, int ioflag)
290 {
291 	struct icee_softc *sc;
292 	int error, len, slave, waitlimit;
293 	uint8_t data[MAX_WR_SZ + 2];
294 	struct iic_msg wr[1] = {
295 	     { 0, IIC_M_WR, 0, data },
296 	};
297 	struct iic_msg rd[1] = {
298 	     { 0, IIC_M_RD, 1, data },
299 	};
300 
301 	sc = CDEV2SOFTC(dev);
302 	if (uio->uio_offset >= sc->size)
303 		return (EIO);
304 	if (sc->type != 8 && sc->type != 16)
305 		return (EINVAL);
306 
307 	slave = error = 0;
308 	while (uio->uio_resid > 0) {
309 		if (uio->uio_offset >= sc->size)
310 			break;
311 		len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)),
312 		    uio->uio_resid);
313 		switch (sc->type) {
314 		case 8:
315 			slave = (uio->uio_offset >> 7) | sc->addr;
316 			wr[0].len = 1 + len;
317 			data[0] = uio->uio_offset & 0xff;
318 			break;
319 		case 16:
320 			slave = sc->addr | (uio->uio_offset >> 15);
321 			wr[0].len = 2 + len;
322 			data[0] = (uio->uio_offset >> 8) & 0xff;
323 			data[1] = uio->uio_offset & 0xff;
324 			break;
325 		}
326 		wr[0].slave = slave;
327 		error = uiomove(data + sc->type / 8, len, uio);
328 		if (error)
329 			break;
330 		error = iicbus_transfer_excl(sc->dev, wr, 1, IIC_INTRWAIT);
331 		if (error) {
332 			error = iic2errno(error);
333 			break;
334 		}
335 		/* Read after write to wait for write-done. */
336 		waitlimit = 10000;
337 		rd[0].slave = slave;
338 		do {
339 			error = iicbus_transfer_excl(sc->dev, rd, 1,
340 			    IIC_INTRWAIT);
341 		} while (waitlimit-- > 0 && error != 0);
342 		if (error) {
343 			error = iic2errno(error);
344 			break;
345 		}
346 	}
347 	return error;
348 }
349 
350 static device_method_t icee_methods[] = {
351 	DEVMETHOD(device_probe,		icee_probe),
352 	DEVMETHOD(device_attach,	icee_attach),
353 	DEVMETHOD(device_detach,	icee_detach),
354 
355 	DEVMETHOD_END
356 };
357 
358 static driver_t icee_driver = {
359 	"icee",
360 	icee_methods,
361 	sizeof(struct icee_softc),
362 };
363 static devclass_t icee_devclass;
364 
365 DRIVER_MODULE(icee, iicbus, icee_driver, icee_devclass, 0, 0);
366 MODULE_VERSION(icee, 1);
367 MODULE_DEPEND(icee, iicbus, 1, 1, 1);
368 IICBUS_FDT_PNP_INFO(compat_data);
369