1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org> 5 * All rights reserved. 6 * Copyright (c) 2021 Rubicon Communications, LLC (Netgate) 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include "opt_ddb.h" 31 #include "opt_inet.h" 32 #include "opt_inet6.h" 33 #include "opt_rss.h" 34 35 #ifdef HAVE_KERNEL_OPTION_HEADERS 36 #include "opt_device_polling.h" 37 #endif 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #ifdef DDB 42 #include <sys/types.h> 43 #include <ddb/ddb.h> 44 #endif 45 #include <sys/buf_ring.h> 46 #include <sys/bus.h> 47 #include <sys/endian.h> 48 #include <sys/kernel.h> 49 #include <sys/kthread.h> 50 #include <sys/malloc.h> 51 #include <sys/mbuf.h> 52 #include <sys/module.h> 53 #include <sys/rman.h> 54 #include <sys/smp.h> 55 #include <sys/socket.h> 56 #include <sys/sockio.h> 57 #include <sys/sysctl.h> 58 #include <sys/taskqueue.h> 59 #include <sys/eventhandler.h> 60 #include <machine/bus.h> 61 #include <machine/resource.h> 62 63 #include <net/bpf.h> 64 #include <net/ethernet.h> 65 #include <net/if.h> 66 #include <net/if_var.h> 67 #include <net/if_arp.h> 68 #include <net/if_dl.h> 69 #include <net/if_media.h> 70 #include <net/iflib.h> 71 72 #include <net/if_types.h> 73 #include <net/if_vlan_var.h> 74 75 #include <netinet/in_systm.h> 76 #include <netinet/in.h> 77 #include <netinet/if_ether.h> 78 #include <netinet/ip.h> 79 #include <netinet/ip6.h> 80 #include <netinet/tcp.h> 81 #include <netinet/udp.h> 82 83 #include <machine/in_cksum.h> 84 #include <dev/led/led.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pcireg.h> 87 88 #include "igc_api.h" 89 #include "igc_i225.h" 90 #include "ifdi_if.h" 91 92 93 #ifndef _IGC_H_DEFINED_ 94 #define _IGC_H_DEFINED_ 95 96 97 /* Tunables */ 98 99 /* 100 * IGC_MAX_TXD: Maximum number of Transmit Descriptors 101 * Valid Range: 128-4096 102 * Default Value: 1024 103 * This value is the number of transmit descriptors allocated by the driver. 104 * Increasing this value allows the driver to queue more transmits. Each 105 * descriptor is 16 bytes. 106 * Since TDLEN should be multiple of 128bytes, the number of transmit 107 * desscriptors should meet the following condition. 108 * (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0 109 */ 110 #define IGC_MIN_TXD 128 111 #define IGC_MAX_TXD 4096 112 #define IGC_DEFAULT_TXD 1024 113 #define IGC_DEFAULT_MULTI_TXD 4096 114 #define IGC_MAX_TXD 4096 115 116 /* 117 * IGC_MAX_RXD - Maximum number of receive Descriptors 118 * Valid Range: 128-4096 119 * Default Value: 1024 120 * This value is the number of receive descriptors allocated by the driver. 121 * Increasing this value allows the driver to buffer more incoming packets. 122 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 123 * descriptor. The maximum MTU size is 16110. 124 * Since TDLEN should be multiple of 128bytes, the number of transmit 125 * desscriptors should meet the following condition. 126 * (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0 127 */ 128 #define IGC_MIN_RXD 128 129 #define IGC_MAX_RXD 4096 130 #define IGC_DEFAULT_RXD 1024 131 #define IGC_DEFAULT_MULTI_RXD 4096 132 #define IGC_MAX_RXD 4096 133 134 /* 135 * This parameter controls whether or not autonegotation is enabled. 136 * 0 - Disable autonegotiation 137 * 1 - Enable autonegotiation 138 */ 139 #define DO_AUTO_NEG true 140 141 /* Tunables -- End */ 142 143 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 144 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 145 ADVERTISE_1000_FULL | ADVERTISE_2500_FULL) 146 147 #define AUTO_ALL_MODES 0 148 149 /* 150 * Micellaneous constants 151 */ 152 #define MAX_NUM_MULTICAST_ADDRESSES 128 153 #define IGC_FC_PAUSE_TIME 0x0680 154 155 #define IGC_TXPBSIZE 20408 156 #define IGC_PKTTYPE_MASK 0x0000FFF0 157 #define IGC_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 158 159 #define IGC_RX_PTHRESH 8 160 #define IGC_RX_HTHRESH 8 161 #define IGC_RX_WTHRESH 4 162 163 #define IGC_TX_PTHRESH 8 164 #define IGC_TX_HTHRESH 1 165 166 /* 167 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be 168 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will 169 * also optimize cache line size effect. H/W supports up to cache line size 128. 170 */ 171 #define IGC_DBA_ALIGN 128 172 173 #define IGC_MSIX_BAR 3 174 175 /* Defines for printing debug information */ 176 #define DEBUG_INIT 0 177 #define DEBUG_IOCTL 0 178 #define DEBUG_HW 0 179 180 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 181 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 182 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 183 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 184 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 185 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 186 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 187 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 188 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 189 190 #define IGC_MAX_SCATTER 40 191 #define IGC_VFTA_SIZE 128 192 #define IGC_TSO_SIZE 65535 193 #define IGC_TSO_SEG_SIZE 4096 /* Max dma segment size */ 194 #define IGC_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ 195 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ 196 CSUM_IP6_SCTP) /* Offload bits in mbuf flag */ 197 198 struct igc_adapter; 199 200 struct igc_int_delay_info { 201 struct igc_adapter *adapter; /* Back-pointer to the adapter struct */ 202 int offset; /* Register offset to read/write */ 203 int value; /* Current value in usecs */ 204 }; 205 206 /* 207 * The transmit ring, one per tx queue 208 */ 209 struct tx_ring { 210 struct igc_adapter *adapter; 211 struct igc_tx_desc *tx_base; 212 uint64_t tx_paddr; 213 qidx_t *tx_rsq; 214 uint8_t me; 215 qidx_t tx_rs_cidx; 216 qidx_t tx_rs_pidx; 217 qidx_t tx_cidx_processed; 218 /* Interrupt resources */ 219 void *tag; 220 struct resource *res; 221 unsigned long tx_irq; 222 223 /* Saved csum offloading context information */ 224 int csum_flags; 225 int csum_lhlen; 226 int csum_iphlen; 227 228 int csum_thlen; 229 int csum_mss; 230 int csum_pktlen; 231 232 uint32_t csum_txd_upper; 233 uint32_t csum_txd_lower; /* last field */ 234 }; 235 236 /* 237 * The Receive ring, one per rx queue 238 */ 239 struct rx_ring { 240 struct igc_adapter *adapter; 241 struct igc_rx_queue *que; 242 u32 me; 243 u32 payload; 244 union igc_rx_desc_extended *rx_base; 245 uint64_t rx_paddr; 246 247 /* Interrupt resources */ 248 void *tag; 249 struct resource *res; 250 251 /* Soft stats */ 252 unsigned long rx_irq; 253 unsigned long rx_discarded; 254 unsigned long rx_packets; 255 unsigned long rx_bytes; 256 }; 257 258 struct igc_tx_queue { 259 struct igc_adapter *adapter; 260 u32 msix; 261 u32 eims; /* This queue's EIMS bit */ 262 u32 me; 263 struct tx_ring txr; 264 }; 265 266 struct igc_rx_queue { 267 struct igc_adapter *adapter; 268 u32 me; 269 u32 msix; 270 u32 eims; 271 struct rx_ring rxr; 272 u64 irqs; 273 struct if_irq que_irq; 274 }; 275 276 /* Our adapter structure */ 277 struct igc_adapter { 278 if_t ifp; 279 struct igc_hw hw; 280 281 if_softc_ctx_t shared; 282 if_ctx_t ctx; 283 #define tx_num_queues shared->isc_ntxqsets 284 #define rx_num_queues shared->isc_nrxqsets 285 #define intr_type shared->isc_intr 286 /* FreeBSD operating-system-specific structures. */ 287 struct igc_osdep osdep; 288 device_t dev; 289 struct cdev *led_dev; 290 291 struct igc_tx_queue *tx_queues; 292 struct igc_rx_queue *rx_queues; 293 struct if_irq irq; 294 295 struct resource *memory; 296 struct resource *flash; 297 struct resource *ioport; 298 299 struct resource *res; 300 void *tag; 301 u32 linkvec; 302 u32 ivars; 303 304 struct ifmedia *media; 305 int msix; 306 int if_flags; 307 int igc_insert_vlan_header; 308 u32 ims; 309 310 u32 flags; 311 /* Task for FAST handling */ 312 struct grouptask link_task; 313 314 u32 txd_cmd; 315 316 u32 rx_mbuf_sz; 317 318 /* Management and WOL features */ 319 u32 wol; 320 321 /* Multicast array memory */ 322 u8 *mta; 323 324 /* Info about the interface */ 325 u16 link_active; 326 u16 fc; 327 u16 link_speed; 328 u16 link_duplex; 329 u32 smartspeed; 330 u32 dmac; 331 int link_mask; 332 333 u64 que_mask; 334 335 struct igc_fw_version fw_ver; 336 337 struct igc_int_delay_info tx_int_delay; 338 struct igc_int_delay_info tx_abs_int_delay; 339 struct igc_int_delay_info rx_int_delay; 340 struct igc_int_delay_info rx_abs_int_delay; 341 struct igc_int_delay_info tx_itr; 342 343 /* Misc stats maintained by the driver */ 344 unsigned long dropped_pkts; 345 unsigned long link_irq; 346 unsigned long rx_overruns; 347 unsigned long watchdog_events; 348 349 struct igc_hw_stats stats; 350 u16 vf_ifp; 351 }; 352 353 void igc_dump_rs(struct igc_adapter *); 354 355 #define IGC_RSSRK_SIZE 4 356 #define IGC_RSSRK_VAL(key, i) (key[(i) * IGC_RSSRK_SIZE] | \ 357 key[(i) * IGC_RSSRK_SIZE + 1] << 8 | \ 358 key[(i) * IGC_RSSRK_SIZE + 2] << 16 | \ 359 key[(i) * IGC_RSSRK_SIZE + 3] << 24) 360 #endif /* _IGC_H_DEFINED_ */ 361