1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org> 5 * All rights reserved. 6 * Copyright (c) 2021 Rubicon Communications, LLC (Netgate) 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include "opt_ddb.h" 31 #include "opt_inet.h" 32 #include "opt_inet6.h" 33 #include "opt_rss.h" 34 35 #ifdef HAVE_KERNEL_OPTION_HEADERS 36 #include "opt_device_polling.h" 37 #endif 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #ifdef DDB 42 #include <sys/types.h> 43 #include <ddb/ddb.h> 44 #endif 45 #include <sys/buf_ring.h> 46 #include <sys/bus.h> 47 #include <sys/endian.h> 48 #include <sys/kernel.h> 49 #include <sys/kthread.h> 50 #include <sys/malloc.h> 51 #include <sys/mbuf.h> 52 #include <sys/module.h> 53 #include <sys/rman.h> 54 #include <sys/smp.h> 55 #include <sys/socket.h> 56 #include <sys/sockio.h> 57 #include <sys/sysctl.h> 58 #include <sys/taskqueue.h> 59 #include <sys/eventhandler.h> 60 #include <machine/bus.h> 61 #include <machine/resource.h> 62 63 #include <net/bpf.h> 64 #include <net/ethernet.h> 65 #include <net/if.h> 66 #include <net/if_var.h> 67 #include <net/if_arp.h> 68 #include <net/if_dl.h> 69 #include <net/if_media.h> 70 #include <net/iflib.h> 71 72 #include <net/if_types.h> 73 #include <net/if_vlan_var.h> 74 75 #include <netinet/in_systm.h> 76 #include <netinet/in.h> 77 #include <netinet/if_ether.h> 78 #include <netinet/ip.h> 79 #include <netinet/ip6.h> 80 #include <netinet/tcp.h> 81 #include <netinet/udp.h> 82 83 #include <machine/in_cksum.h> 84 #include <dev/led/led.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pcireg.h> 87 88 #include "igc_api.h" 89 #include "igc_i225.h" 90 #include "ifdi_if.h" 91 92 93 #ifndef _IGC_H_DEFINED_ 94 #define _IGC_H_DEFINED_ 95 96 97 /* Tunables */ 98 99 /* 100 * IGC_MAX_TXD: Maximum number of Transmit Descriptors 101 * Valid Range: 128-4096 102 * Default Value: 1024 103 * This value is the number of transmit descriptors allocated by the driver. 104 * Increasing this value allows the driver to queue more transmits. Each 105 * descriptor is 16 bytes. 106 * Since TDLEN should be multiple of 128bytes, the number of transmit 107 * desscriptors should meet the following condition. 108 * (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0 109 */ 110 #define IGC_MIN_TXD 128 111 #define IGC_MAX_TXD 4096 112 #define IGC_DEFAULT_TXD 1024 113 #define IGC_DEFAULT_MULTI_TXD 4096 114 #define IGC_MAX_TXD 4096 115 116 /* 117 * IGC_MAX_RXD - Maximum number of receive Descriptors 118 * Valid Range: 128-4096 119 * Default Value: 1024 120 * This value is the number of receive descriptors allocated by the driver. 121 * Increasing this value allows the driver to buffer more incoming packets. 122 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 123 * descriptor. The maximum MTU size is 16110. 124 * Since TDLEN should be multiple of 128bytes, the number of transmit 125 * desscriptors should meet the following condition. 126 * (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0 127 */ 128 #define IGC_MIN_RXD 128 129 #define IGC_MAX_RXD 4096 130 #define IGC_DEFAULT_RXD 1024 131 #define IGC_DEFAULT_MULTI_RXD 4096 132 #define IGC_MAX_RXD 4096 133 134 /* 135 * IGC_TIDV_VAL - Transmit Interrupt Delay Value 136 * Valid Range: 0-65535 (0=off) 137 * Default Value: 64 138 * This value delays the generation of transmit interrupts in units of 139 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 140 * efficiency if properly tuned for specific network traffic. If the 141 * system is reporting dropped transmits, this value may be set too high 142 * causing the driver to run out of available transmit descriptors. 143 */ 144 #define IGC_TIDV_VAL 64 145 146 /* 147 * IGC_TADV_VAL - Transmit Absolute Interrupt Delay Value 148 * Valid Range: 0-65535 (0=off) 149 * Default Value: 64 150 * This value, in units of 1.024 microseconds, limits the delay in which a 151 * transmit interrupt is generated. Useful only if IGC_TIDV is non-zero, 152 * this value ensures that an interrupt is generated after the initial 153 * packet is sent on the wire within the set amount of time. Proper tuning, 154 * along with IGC_TIDV_VAL, may improve traffic throughput in specific 155 * network conditions. 156 */ 157 #define IGC_TADV_VAL 64 158 159 /* 160 * IGC_RDTR_VAL - Receive Interrupt Delay Timer (Packet Timer) 161 * Valid Range: 0-65535 (0=off) 162 * Default Value: 0 163 * This value delays the generation of receive interrupts in units of 1.024 164 * microseconds. Receive interrupt reduction can improve CPU efficiency if 165 * properly tuned for specific network traffic. Increasing this value adds 166 * extra latency to frame reception and can end up decreasing the throughput 167 * of TCP traffic. If the system is reporting dropped receives, this value 168 * may be set too high, causing the driver to run out of available receive 169 * descriptors. 170 * 171 * CAUTION: When setting IGC_RDTR to a value other than 0, adapters 172 * may hang (stop transmitting) under certain network conditions. 173 * If this occurs a WATCHDOG message is logged in the system 174 * event log. In addition, the controller is automatically reset, 175 * restoring the network connection. To eliminate the potential 176 * for the hang ensure that IGC_RDTR is set to 0. 177 */ 178 #define IGC_RDTR_VAL 0 179 180 /* 181 * Receive Interrupt Absolute Delay Timer 182 * Valid Range: 0-65535 (0=off) 183 * Default Value: 64 184 * This value, in units of 1.024 microseconds, limits the delay in which a 185 * receive interrupt is generated. Useful only if IGC_RDTR is non-zero, 186 * this value ensures that an interrupt is generated after the initial 187 * packet is received within the set amount of time. Proper tuning, 188 * along with IGC_RDTR, may improve traffic throughput in specific network 189 * conditions. 190 */ 191 #define IGC_RADV_VAL 64 192 193 /* 194 * This parameter controls whether or not autonegotation is enabled. 195 * 0 - Disable autonegotiation 196 * 1 - Enable autonegotiation 197 */ 198 #define DO_AUTO_NEG true 199 200 /* Tunables -- End */ 201 202 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 203 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 204 ADVERTISE_1000_FULL | ADVERTISE_2500_FULL) 205 206 #define AUTO_ALL_MODES 0 207 208 /* 209 * Micellaneous constants 210 */ 211 #define MAX_NUM_MULTICAST_ADDRESSES 128 212 #define IGC_FC_PAUSE_TIME 0x0680 213 214 #define IGC_TXPBSIZE 20408 215 #define IGC_PKTTYPE_MASK 0x0000FFF0 216 #define IGC_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 217 218 #define IGC_RX_PTHRESH 8 219 #define IGC_RX_HTHRESH 8 220 #define IGC_RX_WTHRESH 4 221 222 #define IGC_TX_PTHRESH 8 223 #define IGC_TX_HTHRESH 1 224 225 /* 226 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be 227 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will 228 * also optimize cache line size effect. H/W supports up to cache line size 128. 229 */ 230 #define IGC_DBA_ALIGN 128 231 232 #define IGC_MSIX_BAR 3 233 234 /* Defines for printing debug information */ 235 #define DEBUG_INIT 0 236 #define DEBUG_IOCTL 0 237 #define DEBUG_HW 0 238 239 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 240 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 241 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 242 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 243 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 244 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 245 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 246 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 247 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 248 249 #define IGC_MAX_SCATTER 40 250 #define IGC_VFTA_SIZE 128 251 #define IGC_TSO_SIZE 65535 252 #define IGC_TSO_SEG_SIZE 4096 /* Max dma segment size */ 253 #define IGC_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ 254 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ 255 CSUM_IP6_SCTP) /* Offload bits in mbuf flag */ 256 257 struct igc_adapter; 258 259 struct igc_int_delay_info { 260 struct igc_adapter *adapter; /* Back-pointer to the adapter struct */ 261 int offset; /* Register offset to read/write */ 262 int value; /* Current value in usecs */ 263 }; 264 265 /* 266 * The transmit ring, one per tx queue 267 */ 268 struct tx_ring { 269 struct igc_adapter *adapter; 270 struct igc_tx_desc *tx_base; 271 uint64_t tx_paddr; 272 qidx_t *tx_rsq; 273 uint8_t me; 274 qidx_t tx_rs_cidx; 275 qidx_t tx_rs_pidx; 276 qidx_t tx_cidx_processed; 277 /* Interrupt resources */ 278 void *tag; 279 struct resource *res; 280 unsigned long tx_irq; 281 282 /* Saved csum offloading context information */ 283 int csum_flags; 284 int csum_lhlen; 285 int csum_iphlen; 286 287 int csum_thlen; 288 int csum_mss; 289 int csum_pktlen; 290 291 uint32_t csum_txd_upper; 292 uint32_t csum_txd_lower; /* last field */ 293 }; 294 295 /* 296 * The Receive ring, one per rx queue 297 */ 298 struct rx_ring { 299 struct igc_adapter *adapter; 300 struct igc_rx_queue *que; 301 u32 me; 302 u32 payload; 303 union igc_rx_desc_extended *rx_base; 304 uint64_t rx_paddr; 305 306 /* Interrupt resources */ 307 void *tag; 308 struct resource *res; 309 310 /* Soft stats */ 311 unsigned long rx_irq; 312 unsigned long rx_discarded; 313 unsigned long rx_packets; 314 unsigned long rx_bytes; 315 }; 316 317 struct igc_tx_queue { 318 struct igc_adapter *adapter; 319 u32 msix; 320 u32 eims; /* This queue's EIMS bit */ 321 u32 me; 322 struct tx_ring txr; 323 }; 324 325 struct igc_rx_queue { 326 struct igc_adapter *adapter; 327 u32 me; 328 u32 msix; 329 u32 eims; 330 struct rx_ring rxr; 331 u64 irqs; 332 struct if_irq que_irq; 333 }; 334 335 /* Our adapter structure */ 336 struct igc_adapter { 337 if_t ifp; 338 struct igc_hw hw; 339 340 if_softc_ctx_t shared; 341 if_ctx_t ctx; 342 #define tx_num_queues shared->isc_ntxqsets 343 #define rx_num_queues shared->isc_nrxqsets 344 #define intr_type shared->isc_intr 345 /* FreeBSD operating-system-specific structures. */ 346 struct igc_osdep osdep; 347 device_t dev; 348 struct cdev *led_dev; 349 350 struct igc_tx_queue *tx_queues; 351 struct igc_rx_queue *rx_queues; 352 struct if_irq irq; 353 354 struct resource *memory; 355 struct resource *flash; 356 struct resource *ioport; 357 358 struct resource *res; 359 void *tag; 360 u32 linkvec; 361 u32 ivars; 362 363 struct ifmedia *media; 364 int msix; 365 int if_flags; 366 int igc_insert_vlan_header; 367 u32 ims; 368 369 u32 flags; 370 /* Task for FAST handling */ 371 struct grouptask link_task; 372 373 u32 txd_cmd; 374 375 u32 tx_process_limit; 376 u32 rx_process_limit; 377 u32 rx_mbuf_sz; 378 379 /* Management and WOL features */ 380 u32 wol; 381 382 /* Multicast array memory */ 383 u8 *mta; 384 385 /* Info about the interface */ 386 u16 link_active; 387 u16 fc; 388 u16 link_speed; 389 u16 link_duplex; 390 u32 smartspeed; 391 u32 dmac; 392 int link_mask; 393 394 u64 que_mask; 395 396 struct igc_int_delay_info tx_int_delay; 397 struct igc_int_delay_info tx_abs_int_delay; 398 struct igc_int_delay_info rx_int_delay; 399 struct igc_int_delay_info rx_abs_int_delay; 400 struct igc_int_delay_info tx_itr; 401 402 /* Misc stats maintained by the driver */ 403 unsigned long dropped_pkts; 404 unsigned long link_irq; 405 unsigned long rx_overruns; 406 unsigned long watchdog_events; 407 408 struct igc_hw_stats stats; 409 u16 vf_ifp; 410 }; 411 412 void igc_dump_rs(struct igc_adapter *); 413 414 #define IGC_RSSRK_SIZE 4 415 #define IGC_RSSRK_VAL(key, i) (key[(i) * IGC_RSSRK_SIZE] | \ 416 key[(i) * IGC_RSSRK_SIZE + 1] << 8 | \ 417 key[(i) * IGC_RSSRK_SIZE + 2] << 16 | \ 418 key[(i) * IGC_RSSRK_SIZE + 3] << 24) 419 #endif /* _IGC_H_DEFINED_ */ 420